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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2007-07-24 10:17:48 -0400
committerJeff Garzik <jeff@garzik.org>2007-07-24 16:55:02 -0400
commit64a8170975947978ea4094dd6c4b1f41119d6ae6 (patch)
tree5bceaf47ad8b34f71e189ceac0095235c3347f5d /drivers/ata
parent5c8d52015c09b42632a73896f8a80cff64c5c1d1 (diff)
pata_hpt37x: Fix 2.6.22 clock PLL regression
Just one version of Linux ago The PLL code broke - oh no! But set the right mode And fix up the code Makes the PLL timing sync go [whatever happened to the sailor from Nantucket, hero of many limericks? -jg] Closes-bug: #8791 Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/pata_hpt37x.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index b0af65aadde3..84d9c5568567 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -26,7 +26,7 @@
26#include <linux/libata.h> 26#include <linux/libata.h>
27 27
28#define DRV_NAME "pata_hpt37x" 28#define DRV_NAME "pata_hpt37x"
29#define DRV_VERSION "0.6.6" 29#define DRV_VERSION "0.6.7"
30 30
31struct hpt_clock { 31struct hpt_clock {
32 u8 xfer_speed; 32 u8 xfer_speed;
@@ -1103,17 +1103,17 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1103 1103
1104 /* Select the DPLL clock. */ 1104 /* Select the DPLL clock. */
1105 pci_write_config_byte(dev, 0x5b, 0x21); 1105 pci_write_config_byte(dev, 0x5b, 0x21);
1106 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); 1106 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
1107 1107
1108 for(adjust = 0; adjust < 8; adjust++) { 1108 for(adjust = 0; adjust < 8; adjust++) {
1109 if (hpt37x_calibrate_dpll(dev)) 1109 if (hpt37x_calibrate_dpll(dev))
1110 break; 1110 break;
1111 /* See if it'll settle at a fractionally different clock */ 1111 /* See if it'll settle at a fractionally different clock */
1112 if ((adjust & 3) == 3) { 1112 if (adjust & 1)
1113 f_low --; 1113 f_low -= adjust >> 1;
1114 f_high ++; 1114 else
1115 } 1115 f_high += adjust >> 1;
1116 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); 1116 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
1117 } 1117 }
1118 if (adjust == 8) { 1118 if (adjust == 8) {
1119 printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n"); 1119 printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n");