diff options
author | Tejun Heo <htejun@gmail.com> | 2007-04-17 10:44:08 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-04-28 14:16:03 -0400 |
commit | 9a829ccfc833269bdb85751f5048288ab93678ac (patch) | |
tree | 89732ae0da2ce1b1076d6ce8e80ac6aad8d9deb0 /drivers/ata | |
parent | eca25dca17630ae354f4b1df559ed90578b794fe (diff) |
libata: convert ata_pci_init_native_mode() users to new init model
Convert drivers which use ata_pci_init_native_mode() to new init
model. ata_pci_init_native_host() is used instead. sata_nv, sata_uli
and sata_sis are in this category.
Tested on nVidia Corporation CK804 Serial ATA Controller [10de:0054]
in both BMDMA and ADMA mode.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/sata_nv.c | 97 | ||||
-rw-r--r-- | drivers/ata/sata_sis.c | 50 | ||||
-rw-r--r-- | drivers/ata/sata_uli.c | 65 |
3 files changed, 80 insertions, 132 deletions
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 8a9473b16ec3..02169740ed24 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -369,7 +369,6 @@ static const struct ata_port_operations nv_generic_ops = { | |||
369 | .error_handler = nv_error_handler, | 369 | .error_handler = nv_error_handler, |
370 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 370 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
371 | .data_xfer = ata_data_xfer, | 371 | .data_xfer = ata_data_xfer, |
372 | .irq_handler = nv_generic_interrupt, | ||
373 | .irq_clear = ata_bmdma_irq_clear, | 372 | .irq_clear = ata_bmdma_irq_clear, |
374 | .irq_on = ata_irq_on, | 373 | .irq_on = ata_irq_on, |
375 | .irq_ack = ata_irq_ack, | 374 | .irq_ack = ata_irq_ack, |
@@ -396,7 +395,6 @@ static const struct ata_port_operations nv_nf2_ops = { | |||
396 | .error_handler = nv_error_handler, | 395 | .error_handler = nv_error_handler, |
397 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 396 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
398 | .data_xfer = ata_data_xfer, | 397 | .data_xfer = ata_data_xfer, |
399 | .irq_handler = nv_nf2_interrupt, | ||
400 | .irq_clear = ata_bmdma_irq_clear, | 398 | .irq_clear = ata_bmdma_irq_clear, |
401 | .irq_on = ata_irq_on, | 399 | .irq_on = ata_irq_on, |
402 | .irq_ack = ata_irq_ack, | 400 | .irq_ack = ata_irq_ack, |
@@ -423,7 +421,6 @@ static const struct ata_port_operations nv_ck804_ops = { | |||
423 | .error_handler = nv_error_handler, | 421 | .error_handler = nv_error_handler, |
424 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 422 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
425 | .data_xfer = ata_data_xfer, | 423 | .data_xfer = ata_data_xfer, |
426 | .irq_handler = nv_ck804_interrupt, | ||
427 | .irq_clear = ata_bmdma_irq_clear, | 424 | .irq_clear = ata_bmdma_irq_clear, |
428 | .irq_on = ata_irq_on, | 425 | .irq_on = ata_irq_on, |
429 | .irq_ack = ata_irq_ack, | 426 | .irq_ack = ata_irq_ack, |
@@ -452,7 +449,6 @@ static const struct ata_port_operations nv_adma_ops = { | |||
452 | .error_handler = nv_adma_error_handler, | 449 | .error_handler = nv_adma_error_handler, |
453 | .post_internal_cmd = nv_adma_post_internal_cmd, | 450 | .post_internal_cmd = nv_adma_post_internal_cmd, |
454 | .data_xfer = ata_data_xfer, | 451 | .data_xfer = ata_data_xfer, |
455 | .irq_handler = nv_adma_interrupt, | ||
456 | .irq_clear = nv_adma_irq_clear, | 452 | .irq_clear = nv_adma_irq_clear, |
457 | .irq_on = ata_irq_on, | 453 | .irq_on = ata_irq_on, |
458 | .irq_ack = ata_irq_ack, | 454 | .irq_ack = ata_irq_ack, |
@@ -477,6 +473,7 @@ static struct ata_port_info nv_port_info[] = { | |||
477 | .mwdma_mask = NV_MWDMA_MASK, | 473 | .mwdma_mask = NV_MWDMA_MASK, |
478 | .udma_mask = NV_UDMA_MASK, | 474 | .udma_mask = NV_UDMA_MASK, |
479 | .port_ops = &nv_generic_ops, | 475 | .port_ops = &nv_generic_ops, |
476 | .irq_handler = nv_generic_interrupt, | ||
480 | }, | 477 | }, |
481 | /* nforce2/3 */ | 478 | /* nforce2/3 */ |
482 | { | 479 | { |
@@ -487,6 +484,7 @@ static struct ata_port_info nv_port_info[] = { | |||
487 | .mwdma_mask = NV_MWDMA_MASK, | 484 | .mwdma_mask = NV_MWDMA_MASK, |
488 | .udma_mask = NV_UDMA_MASK, | 485 | .udma_mask = NV_UDMA_MASK, |
489 | .port_ops = &nv_nf2_ops, | 486 | .port_ops = &nv_nf2_ops, |
487 | .irq_handler = nv_nf2_interrupt, | ||
490 | }, | 488 | }, |
491 | /* ck804 */ | 489 | /* ck804 */ |
492 | { | 490 | { |
@@ -497,6 +495,7 @@ static struct ata_port_info nv_port_info[] = { | |||
497 | .mwdma_mask = NV_MWDMA_MASK, | 495 | .mwdma_mask = NV_MWDMA_MASK, |
498 | .udma_mask = NV_UDMA_MASK, | 496 | .udma_mask = NV_UDMA_MASK, |
499 | .port_ops = &nv_ck804_ops, | 497 | .port_ops = &nv_ck804_ops, |
498 | .irq_handler = nv_ck804_interrupt, | ||
500 | }, | 499 | }, |
501 | /* ADMA */ | 500 | /* ADMA */ |
502 | { | 501 | { |
@@ -508,6 +507,7 @@ static struct ata_port_info nv_port_info[] = { | |||
508 | .mwdma_mask = NV_MWDMA_MASK, | 507 | .mwdma_mask = NV_MWDMA_MASK, |
509 | .udma_mask = NV_UDMA_MASK, | 508 | .udma_mask = NV_UDMA_MASK, |
510 | .port_ops = &nv_adma_ops, | 509 | .port_ops = &nv_adma_ops, |
510 | .irq_handler = nv_adma_interrupt, | ||
511 | }, | 511 | }, |
512 | }; | 512 | }; |
513 | 513 | ||
@@ -1079,14 +1079,14 @@ static int nv_adma_port_resume(struct ata_port *ap) | |||
1079 | } | 1079 | } |
1080 | #endif | 1080 | #endif |
1081 | 1081 | ||
1082 | static void nv_adma_setup_port(struct ata_probe_ent *probe_ent, unsigned int port) | 1082 | static void nv_adma_setup_port(struct ata_port *ap) |
1083 | { | 1083 | { |
1084 | void __iomem *mmio = probe_ent->iomap[NV_MMIO_BAR]; | 1084 | void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; |
1085 | struct ata_ioports *ioport = &probe_ent->port[port]; | 1085 | struct ata_ioports *ioport = &ap->ioaddr; |
1086 | 1086 | ||
1087 | VPRINTK("ENTER\n"); | 1087 | VPRINTK("ENTER\n"); |
1088 | 1088 | ||
1089 | mmio += NV_ADMA_PORT + port * NV_ADMA_PORT_SIZE; | 1089 | mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE; |
1090 | 1090 | ||
1091 | ioport->cmd_addr = mmio; | 1091 | ioport->cmd_addr = mmio; |
1092 | ioport->data_addr = mmio + (ATA_REG_DATA * 4); | 1092 | ioport->data_addr = mmio + (ATA_REG_DATA * 4); |
@@ -1103,9 +1103,9 @@ static void nv_adma_setup_port(struct ata_probe_ent *probe_ent, unsigned int por | |||
1103 | ioport->ctl_addr = mmio + 0x20; | 1103 | ioport->ctl_addr = mmio + 0x20; |
1104 | } | 1104 | } |
1105 | 1105 | ||
1106 | static int nv_adma_host_init(struct ata_probe_ent *probe_ent) | 1106 | static int nv_adma_host_init(struct ata_host *host) |
1107 | { | 1107 | { |
1108 | struct pci_dev *pdev = to_pci_dev(probe_ent->dev); | 1108 | struct pci_dev *pdev = to_pci_dev(host->dev); |
1109 | unsigned int i; | 1109 | unsigned int i; |
1110 | u32 tmp32; | 1110 | u32 tmp32; |
1111 | 1111 | ||
@@ -1120,8 +1120,8 @@ static int nv_adma_host_init(struct ata_probe_ent *probe_ent) | |||
1120 | 1120 | ||
1121 | pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); | 1121 | pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); |
1122 | 1122 | ||
1123 | for (i = 0; i < probe_ent->n_ports; i++) | 1123 | for (i = 0; i < host->n_ports; i++) |
1124 | nv_adma_setup_port(probe_ent, i); | 1124 | nv_adma_setup_port(host->ports[i]); |
1125 | 1125 | ||
1126 | return 0; | 1126 | return 0; |
1127 | } | 1127 | } |
@@ -1480,14 +1480,13 @@ static void nv_adma_error_handler(struct ata_port *ap) | |||
1480 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 1480 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
1481 | { | 1481 | { |
1482 | static int printed_version = 0; | 1482 | static int printed_version = 0; |
1483 | struct ata_port_info *ppi[2]; | 1483 | const struct ata_port_info *ppi[2]; |
1484 | struct ata_probe_ent *probe_ent; | 1484 | struct ata_host *host; |
1485 | struct nv_host_priv *hpriv; | 1485 | struct nv_host_priv *hpriv; |
1486 | int rc; | 1486 | int rc; |
1487 | u32 bar; | 1487 | u32 bar; |
1488 | void __iomem *base; | 1488 | void __iomem *base; |
1489 | unsigned long type = ent->driver_data; | 1489 | unsigned long type = ent->driver_data; |
1490 | int mask_set = 0; | ||
1491 | 1490 | ||
1492 | // Make sure this is a SATA controller by counting the number of bars | 1491 | // Make sure this is a SATA controller by counting the number of bars |
1493 | // (NVIDIA SATA controllers will always have six bars). Otherwise, | 1492 | // (NVIDIA SATA controllers will always have six bars). Otherwise, |
@@ -1503,50 +1502,38 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1503 | if (rc) | 1502 | if (rc) |
1504 | return rc; | 1503 | return rc; |
1505 | 1504 | ||
1506 | rc = pci_request_regions(pdev, DRV_NAME); | 1505 | /* determine type and allocate host */ |
1507 | if (rc) { | 1506 | if (type >= CK804 && adma_enabled) { |
1508 | pcim_pin_device(pdev); | ||
1509 | return rc; | ||
1510 | } | ||
1511 | |||
1512 | if(type >= CK804 && adma_enabled) { | ||
1513 | dev_printk(KERN_NOTICE, &pdev->dev, "Using ADMA mode\n"); | 1507 | dev_printk(KERN_NOTICE, &pdev->dev, "Using ADMA mode\n"); |
1514 | type = ADMA; | 1508 | type = ADMA; |
1515 | if(!pci_set_dma_mask(pdev, DMA_64BIT_MASK) && | ||
1516 | !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) | ||
1517 | mask_set = 1; | ||
1518 | } | ||
1519 | |||
1520 | if(!mask_set) { | ||
1521 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | ||
1522 | if (rc) | ||
1523 | return rc; | ||
1524 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | ||
1525 | if (rc) | ||
1526 | return rc; | ||
1527 | } | 1509 | } |
1528 | 1510 | ||
1529 | rc = -ENOMEM; | 1511 | ppi[0] = ppi[1] = &nv_port_info[type]; |
1512 | rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host); | ||
1513 | if (rc) | ||
1514 | return rc; | ||
1530 | 1515 | ||
1531 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); | 1516 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); |
1532 | if (!hpriv) | 1517 | if (!hpriv) |
1533 | return -ENOMEM; | 1518 | return -ENOMEM; |
1519 | hpriv->type = type; | ||
1520 | host->private_data = hpriv; | ||
1534 | 1521 | ||
1535 | ppi[0] = ppi[1] = &nv_port_info[type]; | 1522 | /* set 64bit dma masks, may fail */ |
1536 | probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | 1523 | if (type == ADMA) { |
1537 | if (!probe_ent) | 1524 | if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0) |
1538 | return -ENOMEM; | 1525 | pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
1539 | 1526 | } | |
1540 | if (!pcim_iomap(pdev, NV_MMIO_BAR, 0)) | ||
1541 | return -EIO; | ||
1542 | probe_ent->iomap = pcim_iomap_table(pdev); | ||
1543 | 1527 | ||
1544 | probe_ent->private_data = hpriv; | 1528 | /* request and iomap NV_MMIO_BAR */ |
1545 | hpriv->type = type; | 1529 | rc = pcim_iomap_regions(pdev, 1 << NV_MMIO_BAR, DRV_NAME); |
1530 | if (rc) | ||
1531 | return rc; | ||
1546 | 1532 | ||
1547 | base = probe_ent->iomap[NV_MMIO_BAR]; | 1533 | /* configure SCR access */ |
1548 | probe_ent->port[0].scr_addr = base + NV_PORT0_SCR_REG_OFFSET; | 1534 | base = host->iomap[NV_MMIO_BAR]; |
1549 | probe_ent->port[1].scr_addr = base + NV_PORT1_SCR_REG_OFFSET; | 1535 | host->ports[0]->ioaddr.scr_addr = base + NV_PORT0_SCR_REG_OFFSET; |
1536 | host->ports[1]->ioaddr.scr_addr = base + NV_PORT1_SCR_REG_OFFSET; | ||
1550 | 1537 | ||
1551 | /* enable SATA space for CK804 */ | 1538 | /* enable SATA space for CK804 */ |
1552 | if (type >= CK804) { | 1539 | if (type >= CK804) { |
@@ -1557,20 +1544,16 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1557 | pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval); | 1544 | pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval); |
1558 | } | 1545 | } |
1559 | 1546 | ||
1560 | pci_set_master(pdev); | 1547 | /* init ADMA */ |
1561 | |||
1562 | if (type == ADMA) { | 1548 | if (type == ADMA) { |
1563 | rc = nv_adma_host_init(probe_ent); | 1549 | rc = nv_adma_host_init(host); |
1564 | if (rc) | 1550 | if (rc) |
1565 | return rc; | 1551 | return rc; |
1566 | } | 1552 | } |
1567 | 1553 | ||
1568 | rc = ata_device_add(probe_ent); | 1554 | pci_set_master(pdev); |
1569 | if (rc != NV_PORTS) | 1555 | return ata_host_activate(host, pdev->irq, ppi[0]->irq_handler, |
1570 | return -ENODEV; | 1556 | IRQF_SHARED, ppi[0]->sht); |
1571 | |||
1572 | devm_kfree(&pdev->dev, probe_ent); | ||
1573 | return 0; | ||
1574 | } | 1557 | } |
1575 | 1558 | ||
1576 | static void nv_remove_one (struct pci_dev *pdev) | 1559 | static void nv_remove_one (struct pci_dev *pdev) |
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index a787f0d4a5ba..d8ee062e82fc 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
@@ -121,7 +121,6 @@ static const struct ata_port_operations sis_ops = { | |||
121 | .thaw = ata_bmdma_thaw, | 121 | .thaw = ata_bmdma_thaw, |
122 | .error_handler = ata_bmdma_error_handler, | 122 | .error_handler = ata_bmdma_error_handler, |
123 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 123 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
124 | .irq_handler = ata_interrupt, | ||
125 | .irq_clear = ata_bmdma_irq_clear, | 124 | .irq_clear = ata_bmdma_irq_clear, |
126 | .irq_on = ata_irq_on, | 125 | .irq_on = ata_irq_on, |
127 | .irq_ack = ata_irq_ack, | 126 | .irq_ack = ata_irq_ack, |
@@ -131,7 +130,6 @@ static const struct ata_port_operations sis_ops = { | |||
131 | }; | 130 | }; |
132 | 131 | ||
133 | static struct ata_port_info sis_port_info = { | 132 | static struct ata_port_info sis_port_info = { |
134 | .sht = &sis_sht, | ||
135 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, | 133 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, |
136 | .pio_mask = 0x1f, | 134 | .pio_mask = 0x1f, |
137 | .mwdma_mask = 0x7, | 135 | .mwdma_mask = 0x7, |
@@ -256,12 +254,13 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
256 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 254 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
257 | { | 255 | { |
258 | static int printed_version; | 256 | static int printed_version; |
259 | struct ata_probe_ent *probe_ent = NULL; | 257 | struct ata_port_info pi = sis_port_info; |
260 | int rc; | 258 | const struct ata_port_info *ppi[2] = { &pi, &pi }; |
259 | struct ata_host *host; | ||
261 | u32 genctl, val; | 260 | u32 genctl, val; |
262 | struct ata_port_info pi = sis_port_info, *ppi[2] = { &pi, &pi }; | ||
263 | u8 pmr; | 261 | u8 pmr; |
264 | u8 port2_start = 0x20; | 262 | u8 port2_start = 0x20; |
263 | int rc; | ||
265 | 264 | ||
266 | if (!printed_version++) | 265 | if (!printed_version++) |
267 | dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); | 266 | dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); |
@@ -270,19 +269,6 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
270 | if (rc) | 269 | if (rc) |
271 | return rc; | 270 | return rc; |
272 | 271 | ||
273 | rc = pci_request_regions(pdev, DRV_NAME); | ||
274 | if (rc) { | ||
275 | pcim_pin_device(pdev); | ||
276 | return rc; | ||
277 | } | ||
278 | |||
279 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | ||
280 | if (rc) | ||
281 | return rc; | ||
282 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | ||
283 | if (rc) | ||
284 | return rc; | ||
285 | |||
286 | /* check and see if the SCRs are in IO space or PCI cfg space */ | 272 | /* check and see if the SCRs are in IO space or PCI cfg space */ |
287 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); | 273 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); |
288 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) | 274 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) |
@@ -349,30 +335,26 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
349 | break; | 335 | break; |
350 | } | 336 | } |
351 | 337 | ||
352 | probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | 338 | rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host); |
353 | if (!probe_ent) | 339 | if (rc) |
354 | return -ENOMEM; | 340 | return rc; |
355 | 341 | ||
356 | if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) { | 342 | if (!(pi.flags & SIS_FLAG_CFGSCR)) { |
357 | void __iomem *mmio; | 343 | void __iomem *mmio; |
358 | 344 | ||
359 | mmio = pcim_iomap(pdev, SIS_SCR_PCI_BAR, 0); | 345 | rc = pcim_iomap_regions(pdev, 1 << SIS_SCR_PCI_BAR, DRV_NAME); |
360 | if (!mmio) | 346 | if (rc) |
361 | return -ENOMEM; | 347 | return rc; |
348 | mmio = host->iomap[SIS_SCR_PCI_BAR]; | ||
362 | 349 | ||
363 | probe_ent->port[0].scr_addr = mmio; | 350 | host->ports[0]->ioaddr.scr_addr = mmio; |
364 | probe_ent->port[1].scr_addr = mmio + port2_start; | 351 | host->ports[1]->ioaddr.scr_addr = mmio + port2_start; |
365 | } | 352 | } |
366 | 353 | ||
367 | pci_set_master(pdev); | 354 | pci_set_master(pdev); |
368 | pci_intx(pdev, 1); | 355 | pci_intx(pdev, 1); |
369 | 356 | return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, | |
370 | if (!ata_device_add(probe_ent)) | 357 | &sis_sht); |
371 | return -EIO; | ||
372 | |||
373 | devm_kfree(&pdev->dev, probe_ent); | ||
374 | return 0; | ||
375 | |||
376 | } | 358 | } |
377 | 359 | ||
378 | static int __init sis_init(void) | 360 | static int __init sis_init(void) |
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c index d659ace80f4f..f74e383de083 100644 --- a/drivers/ata/sata_uli.c +++ b/drivers/ata/sata_uli.c | |||
@@ -115,7 +115,6 @@ static const struct ata_port_operations uli_ops = { | |||
115 | .error_handler = ata_bmdma_error_handler, | 115 | .error_handler = ata_bmdma_error_handler, |
116 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 116 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
117 | 117 | ||
118 | .irq_handler = ata_interrupt, | ||
119 | .irq_clear = ata_bmdma_irq_clear, | 118 | .irq_clear = ata_bmdma_irq_clear, |
120 | .irq_on = ata_irq_on, | 119 | .irq_on = ata_irq_on, |
121 | .irq_ack = ata_irq_ack, | 120 | .irq_ack = ata_irq_ack, |
@@ -127,7 +126,6 @@ static const struct ata_port_operations uli_ops = { | |||
127 | }; | 126 | }; |
128 | 127 | ||
129 | static struct ata_port_info uli_port_info = { | 128 | static struct ata_port_info uli_port_info = { |
130 | .sht = &uli_sht, | ||
131 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 129 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
132 | ATA_FLAG_IGN_SIMPLEX, | 130 | ATA_FLAG_IGN_SIMPLEX, |
133 | .pio_mask = 0x1f, /* pio0-4 */ | 131 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -185,12 +183,13 @@ static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
185 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 183 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
186 | { | 184 | { |
187 | static int printed_version; | 185 | static int printed_version; |
188 | struct ata_probe_ent *probe_ent; | 186 | const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; |
189 | struct ata_port_info *ppi[2]; | ||
190 | int rc; | ||
191 | unsigned int board_idx = (unsigned int) ent->driver_data; | 187 | unsigned int board_idx = (unsigned int) ent->driver_data; |
188 | struct ata_host *host; | ||
192 | struct uli_priv *hpriv; | 189 | struct uli_priv *hpriv; |
193 | void __iomem * const *iomap; | 190 | void __iomem * const *iomap; |
191 | struct ata_ioports *ioaddr; | ||
192 | int n_ports, rc; | ||
194 | 193 | ||
195 | if (!printed_version++) | 194 | if (!printed_version++) |
196 | dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); | 195 | dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); |
@@ -199,54 +198,42 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
199 | if (rc) | 198 | if (rc) |
200 | return rc; | 199 | return rc; |
201 | 200 | ||
202 | rc = pci_request_regions(pdev, DRV_NAME); | 201 | n_ports = 2; |
203 | if (rc) { | 202 | if (board_idx == uli_5287) |
204 | pcim_pin_device(pdev); | 203 | n_ports = 4; |
205 | return rc; | 204 | rc = ata_pci_prepare_native_host(pdev, ppi, n_ports, &host); |
206 | } | ||
207 | |||
208 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | ||
209 | if (rc) | ||
210 | return rc; | ||
211 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | ||
212 | if (rc) | 205 | if (rc) |
213 | return rc; | 206 | return rc; |
214 | 207 | ||
215 | ppi[0] = ppi[1] = &uli_port_info; | ||
216 | probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | ||
217 | if (!probe_ent) | ||
218 | return -ENOMEM; | ||
219 | |||
220 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); | 208 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); |
221 | if (!hpriv) | 209 | if (!hpriv) |
222 | return -ENOMEM; | 210 | return -ENOMEM; |
211 | host->private_data = hpriv; | ||
223 | 212 | ||
224 | probe_ent->private_data = hpriv; | 213 | iomap = host->iomap; |
225 | |||
226 | iomap = pcim_iomap_table(pdev); | ||
227 | 214 | ||
228 | switch (board_idx) { | 215 | switch (board_idx) { |
229 | case uli_5287: | 216 | case uli_5287: |
230 | hpriv->scr_cfg_addr[0] = ULI5287_BASE; | 217 | hpriv->scr_cfg_addr[0] = ULI5287_BASE; |
231 | hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; | 218 | hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; |
232 | probe_ent->n_ports = 4; | ||
233 | 219 | ||
234 | probe_ent->port[2].cmd_addr = iomap[0] + 8; | 220 | ioaddr = &host->ports[2]->ioaddr; |
235 | probe_ent->port[2].altstatus_addr = | 221 | ioaddr->cmd_addr = iomap[0] + 8; |
236 | probe_ent->port[2].ctl_addr = (void __iomem *) | 222 | ioaddr->altstatus_addr = |
223 | ioaddr->ctl_addr = (void __iomem *) | ||
237 | ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; | 224 | ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; |
238 | probe_ent->port[2].bmdma_addr = iomap[4] + 16; | 225 | ioaddr->bmdma_addr = iomap[4] + 16; |
239 | hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; | 226 | hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; |
227 | ata_std_ports(ioaddr); | ||
240 | 228 | ||
241 | probe_ent->port[3].cmd_addr = iomap[2] + 8; | 229 | ioaddr = &host->ports[3]->ioaddr; |
242 | probe_ent->port[3].altstatus_addr = | 230 | ioaddr->cmd_addr = iomap[2] + 8; |
243 | probe_ent->port[3].ctl_addr = (void __iomem *) | 231 | ioaddr->altstatus_addr = |
232 | ioaddr->ctl_addr = (void __iomem *) | ||
244 | ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; | 233 | ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; |
245 | probe_ent->port[3].bmdma_addr = iomap[4] + 24; | 234 | ioaddr->bmdma_addr = iomap[4] + 24; |
246 | hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; | 235 | hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; |
247 | 236 | ata_std_ports(ioaddr); | |
248 | ata_std_ports(&probe_ent->port[2]); | ||
249 | ata_std_ports(&probe_ent->port[3]); | ||
250 | break; | 237 | break; |
251 | 238 | ||
252 | case uli_5289: | 239 | case uli_5289: |
@@ -266,12 +253,8 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
266 | 253 | ||
267 | pci_set_master(pdev); | 254 | pci_set_master(pdev); |
268 | pci_intx(pdev, 1); | 255 | pci_intx(pdev, 1); |
269 | 256 | return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, | |
270 | if (!ata_device_add(probe_ent)) | 257 | &uli_sht); |
271 | return -ENODEV; | ||
272 | |||
273 | devm_kfree(&pdev->dev, probe_ent); | ||
274 | return 0; | ||
275 | } | 258 | } |
276 | 259 | ||
277 | static int __init uli_init(void) | 260 | static int __init uli_init(void) |