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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2011-10-11 14:17:05 -0400
committerJeff Garzik <jgarzik@redhat.com>2011-10-14 12:41:30 -0400
commit6352187ee886811afe7f8f3cc08664f59b364aa8 (patch)
tree5472a4854ab2232f09673f4813011a65ba855c9f /drivers/ata
parent6013995af69a2f4f22b3f3274972742edacc44ac (diff)
pata_sil680: documentation fixes
Fix documentation for sil680_sel[reg,dev]() and sil680_set_[pio,dma]mode(). Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/pata_sil680.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 31f759b0ab71..0e2a5d22bbd3 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -38,11 +38,12 @@
38 38
39/** 39/**
40 * sil680_selreg - return register base 40 * sil680_selreg - return register base
41 * @hwif: interface 41 * @ap: ATA interface
42 * @r: config offset 42 * @r: config offset
43 * 43 *
44 * Turn a config register offset into the right address in either 44 * Turn a config register offset into the right address in PCI space
45 * PCI space or MMIO space to access the control register in question 45 * to access the control register in question.
46 *
46 * Thankfully this is a configuration operation so isn't performance 47 * Thankfully this is a configuration operation so isn't performance
47 * criticial. 48 * criticial.
48 */ 49 */
@@ -56,12 +57,12 @@ static unsigned long sil680_selreg(struct ata_port *ap, int r)
56 57
57/** 58/**
58 * sil680_seldev - return register base 59 * sil680_seldev - return register base
59 * @hwif: interface 60 * @ap: ATA interface
60 * @r: config offset 61 * @r: config offset
61 * 62 *
62 * Turn a config register offset into the right address in either 63 * Turn a config register offset into the right address in PCI space
63 * PCI space or MMIO space to access the control register in question 64 * to access the control register in question including accounting for
64 * including accounting for the unit shift. 65 * the unit shift.
65 */ 66 */
66 67
67static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) 68static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r)
@@ -93,7 +94,7 @@ static int sil680_cable_detect(struct ata_port *ap) {
93} 94}
94 95
95/** 96/**
96 * sil680_set_piomode - set initial PIO mode data 97 * sil680_set_piomode - set PIO mode data
97 * @ap: ATA interface 98 * @ap: ATA interface
98 * @adev: ATA device 99 * @adev: ATA device
99 * 100 *
@@ -140,12 +141,13 @@ static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev)
140} 141}
141 142
142/** 143/**
143 * sil680_set_dmamode - set initial DMA mode data 144 * sil680_set_dmamode - set DMA mode data
144 * @ap: ATA interface 145 * @ap: ATA interface
145 * @adev: ATA device 146 * @adev: ATA device
146 * 147 *
147 * Program the MWDMA/UDMA modes for the sil680 k 148 * Program the MWDMA/UDMA modes for the sil680 chipset.
148 * chipset. The MWDMA mode values are pulled from a lookup table 149 *
150 * The MWDMA mode values are pulled from a lookup table
149 * while the chipset uses mode number for UDMA. 151 * while the chipset uses mode number for UDMA.
150 */ 152 */
151 153