diff options
author | Tejun Heo <htejun@gmail.com> | 2007-07-16 01:29:40 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-07-20 08:02:11 -0400 |
commit | da3dbb17a0e9a9ec7f5aed95f1fddadb790edc9d (patch) | |
tree | 289239e1eb60168321e905c545aa2e2f3a2b5475 /drivers/ata | |
parent | 5335b729064e03319cd2d5219770451dbb1d7f67 (diff) |
libata: make ->scr_read/write callbacks return error code
Convert ->scr_read/write callbacks to return error code to better
indicate failure. This will help handling of SCR_NOTIFICATION.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/ahci.c | 23 | ||||
-rw-r--r-- | drivers/ata/libata-core.c | 21 | ||||
-rw-r--r-- | drivers/ata/sata_inic162x.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_mv.c | 72 | ||||
-rw-r--r-- | drivers/ata/sata_nv.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_promise.c | 25 | ||||
-rw-r--r-- | drivers/ata/sata_qstor.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_sil.c | 25 | ||||
-rw-r--r-- | drivers/ata/sata_sil24.c | 17 | ||||
-rw-r--r-- | drivers/ata/sata_sis.c | 22 | ||||
-rw-r--r-- | drivers/ata/sata_svw.c | 13 | ||||
-rw-r--r-- | drivers/ata/sata_uli.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_via.c | 27 | ||||
-rw-r--r-- | drivers/ata/sata_vsc.c | 13 |
14 files changed, 189 insertions, 133 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 210292cd8ad1..e044d6477a0f 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -216,8 +216,8 @@ struct ahci_port_priv { | |||
216 | unsigned int ncq_saw_sdb:1; | 216 | unsigned int ncq_saw_sdb:1; |
217 | }; | 217 | }; |
218 | 218 | ||
219 | static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg); | 219 | static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
220 | static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 220 | static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
221 | static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 221 | static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
222 | static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); | 222 | static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); |
223 | static void ahci_irq_clear(struct ata_port *ap); | 223 | static void ahci_irq_clear(struct ata_port *ap); |
@@ -625,7 +625,7 @@ static void ahci_restore_initial_config(struct ata_host *host) | |||
625 | (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ | 625 | (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ |
626 | } | 626 | } |
627 | 627 | ||
628 | static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in) | 628 | static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) |
629 | { | 629 | { |
630 | unsigned int sc_reg; | 630 | unsigned int sc_reg; |
631 | 631 | ||
@@ -635,15 +635,15 @@ static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in) | |||
635 | case SCR_ERROR: sc_reg = 2; break; | 635 | case SCR_ERROR: sc_reg = 2; break; |
636 | case SCR_ACTIVE: sc_reg = 3; break; | 636 | case SCR_ACTIVE: sc_reg = 3; break; |
637 | default: | 637 | default: |
638 | return 0xffffffffU; | 638 | return -EINVAL; |
639 | } | 639 | } |
640 | 640 | ||
641 | return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 641 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); |
642 | return 0; | ||
642 | } | 643 | } |
643 | 644 | ||
644 | 645 | ||
645 | static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in, | 646 | static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) |
646 | u32 val) | ||
647 | { | 647 | { |
648 | unsigned int sc_reg; | 648 | unsigned int sc_reg; |
649 | 649 | ||
@@ -653,10 +653,11 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in, | |||
653 | case SCR_ERROR: sc_reg = 2; break; | 653 | case SCR_ERROR: sc_reg = 2; break; |
654 | case SCR_ACTIVE: sc_reg = 3; break; | 654 | case SCR_ACTIVE: sc_reg = 3; break; |
655 | default: | 655 | default: |
656 | return; | 656 | return -EINVAL; |
657 | } | 657 | } |
658 | 658 | ||
659 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 659 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
660 | return 0; | ||
660 | } | 661 | } |
661 | 662 | ||
662 | static void ahci_start_engine(struct ata_port *ap) | 663 | static void ahci_start_engine(struct ata_port *ap) |
@@ -1133,6 +1134,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class, | |||
1133 | static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class, | 1134 | static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class, |
1134 | unsigned long deadline) | 1135 | unsigned long deadline) |
1135 | { | 1136 | { |
1137 | u32 serror; | ||
1136 | int rc; | 1138 | int rc; |
1137 | 1139 | ||
1138 | DPRINTK("ENTER\n"); | 1140 | DPRINTK("ENTER\n"); |
@@ -1143,7 +1145,8 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class, | |||
1143 | deadline); | 1145 | deadline); |
1144 | 1146 | ||
1145 | /* vt8251 needs SError cleared for the port to operate */ | 1147 | /* vt8251 needs SError cleared for the port to operate */ |
1146 | ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR)); | 1148 | ahci_scr_read(ap, SCR_ERROR, &serror); |
1149 | ahci_scr_write(ap, SCR_ERROR, serror); | ||
1147 | 1150 | ||
1148 | ahci_start_engine(ap); | 1151 | ahci_start_engine(ap); |
1149 | 1152 | ||
@@ -1265,7 +1268,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) | |||
1265 | ata_ehi_clear_desc(ehi); | 1268 | ata_ehi_clear_desc(ehi); |
1266 | 1269 | ||
1267 | /* AHCI needs SError cleared; otherwise, it might lock up */ | 1270 | /* AHCI needs SError cleared; otherwise, it might lock up */ |
1268 | serror = ahci_scr_read(ap, SCR_ERROR); | 1271 | ahci_scr_read(ap, SCR_ERROR, &serror); |
1269 | ahci_scr_write(ap, SCR_ERROR, serror); | 1272 | ahci_scr_write(ap, SCR_ERROR, serror); |
1270 | 1273 | ||
1271 | /* analyze @irq_stat */ | 1274 | /* analyze @irq_stat */ |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index ecbc3278238a..5718c247e23a 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -5732,10 +5732,8 @@ int sata_scr_valid(struct ata_port *ap) | |||
5732 | */ | 5732 | */ |
5733 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | 5733 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) |
5734 | { | 5734 | { |
5735 | if (sata_scr_valid(ap)) { | 5735 | if (sata_scr_valid(ap)) |
5736 | *val = ap->ops->scr_read(ap, reg); | 5736 | return ap->ops->scr_read(ap, reg, val); |
5737 | return 0; | ||
5738 | } | ||
5739 | return -EOPNOTSUPP; | 5737 | return -EOPNOTSUPP; |
5740 | } | 5738 | } |
5741 | 5739 | ||
@@ -5757,10 +5755,8 @@ int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |||
5757 | */ | 5755 | */ |
5758 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | 5756 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) |
5759 | { | 5757 | { |
5760 | if (sata_scr_valid(ap)) { | 5758 | if (sata_scr_valid(ap)) |
5761 | ap->ops->scr_write(ap, reg, val); | 5759 | return ap->ops->scr_write(ap, reg, val); |
5762 | return 0; | ||
5763 | } | ||
5764 | return -EOPNOTSUPP; | 5760 | return -EOPNOTSUPP; |
5765 | } | 5761 | } |
5766 | 5762 | ||
@@ -5781,10 +5777,13 @@ int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |||
5781 | */ | 5777 | */ |
5782 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | 5778 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) |
5783 | { | 5779 | { |
5780 | int rc; | ||
5781 | |||
5784 | if (sata_scr_valid(ap)) { | 5782 | if (sata_scr_valid(ap)) { |
5785 | ap->ops->scr_write(ap, reg, val); | 5783 | rc = ap->ops->scr_write(ap, reg, val); |
5786 | ap->ops->scr_read(ap, reg); | 5784 | if (rc == 0) |
5787 | return 0; | 5785 | rc = ap->ops->scr_read(ap, reg, &val); |
5786 | return rc; | ||
5788 | } | 5787 | } |
5789 | return -EOPNOTSUPP; | 5788 | return -EOPNOTSUPP; |
5790 | } | 5789 | } |
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index 3de183461c3c..a9c948d7604a 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -190,34 +190,34 @@ static void inic_reset_port(void __iomem *port_base) | |||
190 | writew(ctl, idma_ctl); | 190 | writew(ctl, idma_ctl); |
191 | } | 191 | } |
192 | 192 | ||
193 | static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) | 193 | static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) |
194 | { | 194 | { |
195 | void __iomem *scr_addr = ap->ioaddr.scr_addr; | 195 | void __iomem *scr_addr = ap->ioaddr.scr_addr; |
196 | void __iomem *addr; | 196 | void __iomem *addr; |
197 | u32 val; | ||
198 | 197 | ||
199 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | 198 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
200 | return 0xffffffffU; | 199 | return -EINVAL; |
201 | 200 | ||
202 | addr = scr_addr + scr_map[sc_reg] * 4; | 201 | addr = scr_addr + scr_map[sc_reg] * 4; |
203 | val = readl(scr_addr + scr_map[sc_reg] * 4); | 202 | *val = readl(scr_addr + scr_map[sc_reg] * 4); |
204 | 203 | ||
205 | /* this controller has stuck DIAG.N, ignore it */ | 204 | /* this controller has stuck DIAG.N, ignore it */ |
206 | if (sc_reg == SCR_ERROR) | 205 | if (sc_reg == SCR_ERROR) |
207 | val &= ~SERR_PHYRDY_CHG; | 206 | *val &= ~SERR_PHYRDY_CHG; |
208 | return val; | 207 | return 0; |
209 | } | 208 | } |
210 | 209 | ||
211 | static void inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | 210 | static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) |
212 | { | 211 | { |
213 | void __iomem *scr_addr = ap->ioaddr.scr_addr; | 212 | void __iomem *scr_addr = ap->ioaddr.scr_addr; |
214 | void __iomem *addr; | 213 | void __iomem *addr; |
215 | 214 | ||
216 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | 215 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
217 | return; | 216 | return -EINVAL; |
218 | 217 | ||
219 | addr = scr_addr + scr_map[sc_reg] * 4; | 218 | addr = scr_addr + scr_map[sc_reg] * 4; |
220 | writel(val, scr_addr + scr_map[sc_reg] * 4); | 219 | writel(val, scr_addr + scr_map[sc_reg] * 4); |
220 | return 0; | ||
221 | } | 221 | } |
222 | 222 | ||
223 | /* | 223 | /* |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index b4b737e081e8..8ec520885b95 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -404,10 +404,10 @@ struct mv_host_priv { | |||
404 | }; | 404 | }; |
405 | 405 | ||
406 | static void mv_irq_clear(struct ata_port *ap); | 406 | static void mv_irq_clear(struct ata_port *ap); |
407 | static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in); | 407 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); |
408 | static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | 408 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); |
409 | static u32 mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in); | 409 | static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); |
410 | static void mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | 410 | static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); |
411 | static int mv_port_start(struct ata_port *ap); | 411 | static int mv_port_start(struct ata_port *ap); |
412 | static void mv_port_stop(struct ata_port *ap); | 412 | static void mv_port_stop(struct ata_port *ap); |
413 | static void mv_qc_prep(struct ata_queued_cmd *qc); | 413 | static void mv_qc_prep(struct ata_queued_cmd *qc); |
@@ -974,22 +974,26 @@ static unsigned int mv_scr_offset(unsigned int sc_reg_in) | |||
974 | return ofs; | 974 | return ofs; |
975 | } | 975 | } |
976 | 976 | ||
977 | static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in) | 977 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) |
978 | { | 978 | { |
979 | unsigned int ofs = mv_scr_offset(sc_reg_in); | 979 | unsigned int ofs = mv_scr_offset(sc_reg_in); |
980 | 980 | ||
981 | if (ofs != 0xffffffffU) | 981 | if (ofs != 0xffffffffU) { |
982 | return readl(mv_ap_base(ap) + ofs); | 982 | *val = readl(mv_ap_base(ap) + ofs); |
983 | else | 983 | return 0; |
984 | return (u32) ofs; | 984 | } else |
985 | return -EINVAL; | ||
985 | } | 986 | } |
986 | 987 | ||
987 | static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | 988 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) |
988 | { | 989 | { |
989 | unsigned int ofs = mv_scr_offset(sc_reg_in); | 990 | unsigned int ofs = mv_scr_offset(sc_reg_in); |
990 | 991 | ||
991 | if (ofs != 0xffffffffU) | 992 | if (ofs != 0xffffffffU) { |
992 | writelfl(val, mv_ap_base(ap) + ofs); | 993 | writelfl(val, mv_ap_base(ap) + ofs); |
994 | return 0; | ||
995 | } else | ||
996 | return -EINVAL; | ||
993 | } | 997 | } |
994 | 998 | ||
995 | static void mv_edma_cfg(struct ata_port *ap, struct mv_host_priv *hpriv, | 999 | static void mv_edma_cfg(struct ata_port *ap, struct mv_host_priv *hpriv, |
@@ -1752,26 +1756,30 @@ static unsigned int mv5_scr_offset(unsigned int sc_reg_in) | |||
1752 | return ofs; | 1756 | return ofs; |
1753 | } | 1757 | } |
1754 | 1758 | ||
1755 | static u32 mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in) | 1759 | static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) |
1756 | { | 1760 | { |
1757 | void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; | 1761 | void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; |
1758 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | 1762 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); |
1759 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | 1763 | unsigned int ofs = mv5_scr_offset(sc_reg_in); |
1760 | 1764 | ||
1761 | if (ofs != 0xffffffffU) | 1765 | if (ofs != 0xffffffffU) { |
1762 | return readl(addr + ofs); | 1766 | *val = readl(addr + ofs); |
1763 | else | 1767 | return 0; |
1764 | return (u32) ofs; | 1768 | } else |
1769 | return -EINVAL; | ||
1765 | } | 1770 | } |
1766 | 1771 | ||
1767 | static void mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | 1772 | static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) |
1768 | { | 1773 | { |
1769 | void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; | 1774 | void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; |
1770 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | 1775 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); |
1771 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | 1776 | unsigned int ofs = mv5_scr_offset(sc_reg_in); |
1772 | 1777 | ||
1773 | if (ofs != 0xffffffffU) | 1778 | if (ofs != 0xffffffffU) { |
1774 | writelfl(val, addr + ofs); | 1779 | writelfl(val, addr + ofs); |
1780 | return 0; | ||
1781 | } else | ||
1782 | return -EINVAL; | ||
1775 | } | 1783 | } |
1776 | 1784 | ||
1777 | static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) | 1785 | static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) |
@@ -2149,9 +2157,17 @@ static void mv_phy_reset(struct ata_port *ap, unsigned int *class, | |||
2149 | 2157 | ||
2150 | VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio); | 2158 | VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio); |
2151 | 2159 | ||
2152 | DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " | 2160 | #ifdef DEBUG |
2153 | "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS), | 2161 | { |
2154 | mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL)); | 2162 | u32 sstatus, serror, scontrol; |
2163 | |||
2164 | mv_scr_read(ap, SCR_STATUS, &sstatus); | ||
2165 | mv_scr_read(ap, SCR_ERROR, &serror); | ||
2166 | mv_scr_read(ap, SCR_CONTROL, &scontrol); | ||
2167 | DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " | ||
2168 | "SCtrl 0x%08x\n", status, serror, scontrol); | ||
2169 | } | ||
2170 | #endif | ||
2155 | 2171 | ||
2156 | /* Issue COMRESET via SControl */ | 2172 | /* Issue COMRESET via SControl */ |
2157 | comreset_retry: | 2173 | comreset_retry: |
@@ -2175,9 +2191,17 @@ comreset_retry: | |||
2175 | (retry-- > 0)) | 2191 | (retry-- > 0)) |
2176 | goto comreset_retry; | 2192 | goto comreset_retry; |
2177 | 2193 | ||
2178 | DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x " | 2194 | #ifdef DEBUG |
2179 | "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS), | 2195 | { |
2180 | mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL)); | 2196 | u32 sstatus, serror, scontrol; |
2197 | |||
2198 | mv_scr_read(ap, SCR_STATUS, &sstatus); | ||
2199 | mv_scr_read(ap, SCR_ERROR, &serror); | ||
2200 | mv_scr_read(ap, SCR_CONTROL, &scontrol); | ||
2201 | DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x " | ||
2202 | "SCtrl 0x%08x\n", sstatus, serror, scontrol); | ||
2203 | } | ||
2204 | #endif | ||
2181 | 2205 | ||
2182 | if (ata_port_offline(ap)) { | 2206 | if (ata_port_offline(ap)) { |
2183 | *class = ATA_DEV_NONE; | 2207 | *class = ATA_DEV_NONE; |
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 5d943da042f7..0b58c4df6fd2 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -236,8 +236,8 @@ static void nv_ck804_host_stop(struct ata_host *host); | |||
236 | static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); | 236 | static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); |
237 | static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); | 237 | static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); |
238 | static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); | 238 | static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); |
239 | static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg); | 239 | static int nv_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); |
240 | static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 240 | static int nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
241 | 241 | ||
242 | static void nv_nf2_freeze(struct ata_port *ap); | 242 | static void nv_nf2_freeze(struct ata_port *ap); |
243 | static void nv_nf2_thaw(struct ata_port *ap); | 243 | static void nv_nf2_thaw(struct ata_port *ap); |
@@ -1393,20 +1393,22 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance) | |||
1393 | return ret; | 1393 | return ret; |
1394 | } | 1394 | } |
1395 | 1395 | ||
1396 | static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg) | 1396 | static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
1397 | { | 1397 | { |
1398 | if (sc_reg > SCR_CONTROL) | 1398 | if (sc_reg > SCR_CONTROL) |
1399 | return 0xffffffffU; | 1399 | return -EINVAL; |
1400 | 1400 | ||
1401 | return ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); | 1401 | *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); |
1402 | return 0; | ||
1402 | } | 1403 | } |
1403 | 1404 | ||
1404 | static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 1405 | static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
1405 | { | 1406 | { |
1406 | if (sc_reg > SCR_CONTROL) | 1407 | if (sc_reg > SCR_CONTROL) |
1407 | return; | 1408 | return -EINVAL; |
1408 | 1409 | ||
1409 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 1410 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
1411 | return 0; | ||
1410 | } | 1412 | } |
1411 | 1413 | ||
1412 | static void nv_nf2_freeze(struct ata_port *ap) | 1414 | static void nv_nf2_freeze(struct ata_port *ap) |
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index d2fcb9a6bec2..d39ebc23c4a9 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c | |||
@@ -128,8 +128,8 @@ struct pdc_port_priv { | |||
128 | dma_addr_t pkt_dma; | 128 | dma_addr_t pkt_dma; |
129 | }; | 129 | }; |
130 | 130 | ||
131 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); | 131 | static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
132 | static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 132 | static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
133 | static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 133 | static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
134 | static int pdc_common_port_start(struct ata_port *ap); | 134 | static int pdc_common_port_start(struct ata_port *ap); |
135 | static int pdc_sata_port_start(struct ata_port *ap); | 135 | static int pdc_sata_port_start(struct ata_port *ap); |
@@ -427,19 +427,20 @@ static int pdc_sata_cable_detect(struct ata_port *ap) | |||
427 | return ATA_CBL_SATA; | 427 | return ATA_CBL_SATA; |
428 | } | 428 | } |
429 | 429 | ||
430 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) | 430 | static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
431 | { | 431 | { |
432 | if (sc_reg > SCR_CONTROL) | 432 | if (sc_reg > SCR_CONTROL) |
433 | return 0xffffffffU; | 433 | return -EINVAL; |
434 | return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 434 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); |
435 | return 0; | ||
435 | } | 436 | } |
436 | 437 | ||
437 | static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, | 438 | static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
438 | u32 val) | ||
439 | { | 439 | { |
440 | if (sc_reg > SCR_CONTROL) | 440 | if (sc_reg > SCR_CONTROL) |
441 | return; | 441 | return -EINVAL; |
442 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 442 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
443 | return 0; | ||
443 | } | 444 | } |
444 | 445 | ||
445 | static void pdc_atapi_pkt(struct ata_queued_cmd *qc) | 446 | static void pdc_atapi_pkt(struct ata_queued_cmd *qc) |
@@ -642,8 +643,12 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc, | |||
642 | | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR)) | 643 | | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR)) |
643 | ac_err_mask |= AC_ERR_HOST_BUS; | 644 | ac_err_mask |= AC_ERR_HOST_BUS; |
644 | 645 | ||
645 | if (sata_scr_valid(ap)) | 646 | if (sata_scr_valid(ap)) { |
646 | ehi->serror |= pdc_sata_scr_read(ap, SCR_ERROR); | 647 | u32 serror; |
648 | |||
649 | pdc_sata_scr_read(ap, SCR_ERROR, &serror); | ||
650 | ehi->serror |= serror; | ||
651 | } | ||
647 | 652 | ||
648 | qc->err_mask |= ac_err_mask; | 653 | qc->err_mask |= ac_err_mask; |
649 | 654 | ||
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c index 5aef4ac37012..c8f9242e7f44 100644 --- a/drivers/ata/sata_qstor.c +++ b/drivers/ata/sata_qstor.c | |||
@@ -111,8 +111,8 @@ struct qs_port_priv { | |||
111 | qs_state_t state; | 111 | qs_state_t state; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg); | 114 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
115 | static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 115 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
116 | static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 116 | static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
117 | static int qs_port_start(struct ata_port *ap); | 117 | static int qs_port_start(struct ata_port *ap); |
118 | static void qs_host_stop(struct ata_host *host); | 118 | static void qs_host_stop(struct ata_host *host); |
@@ -255,18 +255,20 @@ static void qs_eng_timeout(struct ata_port *ap) | |||
255 | ata_eng_timeout(ap); | 255 | ata_eng_timeout(ap); |
256 | } | 256 | } |
257 | 257 | ||
258 | static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg) | 258 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
259 | { | 259 | { |
260 | if (sc_reg > SCR_CONTROL) | 260 | if (sc_reg > SCR_CONTROL) |
261 | return ~0U; | 261 | return -EINVAL; |
262 | return readl(ap->ioaddr.scr_addr + (sc_reg * 8)); | 262 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 8)); |
263 | return 0; | ||
263 | } | 264 | } |
264 | 265 | ||
265 | static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 266 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
266 | { | 267 | { |
267 | if (sc_reg > SCR_CONTROL) | 268 | if (sc_reg > SCR_CONTROL) |
268 | return; | 269 | return -EINVAL; |
269 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 8)); | 270 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 8)); |
271 | return 0; | ||
270 | } | 272 | } |
271 | 273 | ||
272 | static unsigned int qs_fill_sg(struct ata_queued_cmd *qc) | 274 | static unsigned int qs_fill_sg(struct ata_queued_cmd *qc) |
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 2a86dc4598d0..db6763758952 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c | |||
@@ -115,8 +115,8 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | |||
115 | static int sil_pci_device_resume(struct pci_dev *pdev); | 115 | static int sil_pci_device_resume(struct pci_dev *pdev); |
116 | #endif | 116 | #endif |
117 | static void sil_dev_config(struct ata_device *dev); | 117 | static void sil_dev_config(struct ata_device *dev); |
118 | static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg); | 118 | static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
119 | static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 119 | static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
120 | static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed); | 120 | static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed); |
121 | static void sil_freeze(struct ata_port *ap); | 121 | static void sil_freeze(struct ata_port *ap); |
122 | static void sil_thaw(struct ata_port *ap); | 122 | static void sil_thaw(struct ata_port *ap); |
@@ -350,19 +350,26 @@ static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_re | |||
350 | return NULL; | 350 | return NULL; |
351 | } | 351 | } |
352 | 352 | ||
353 | static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) | 353 | static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
354 | { | 354 | { |
355 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); | 355 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); |
356 | if (mmio) | 356 | |
357 | return readl(mmio); | 357 | if (mmio) { |
358 | return 0xffffffffU; | 358 | *val = readl(mmio); |
359 | return 0; | ||
360 | } | ||
361 | return -EINVAL; | ||
359 | } | 362 | } |
360 | 363 | ||
361 | static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 364 | static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
362 | { | 365 | { |
363 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); | 366 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); |
364 | if (mmio) | 367 | |
368 | if (mmio) { | ||
365 | writel(val, mmio); | 369 | writel(val, mmio); |
370 | return 0; | ||
371 | } | ||
372 | return -EINVAL; | ||
366 | } | 373 | } |
367 | 374 | ||
368 | static void sil_host_intr(struct ata_port *ap, u32 bmdma2) | 375 | static void sil_host_intr(struct ata_port *ap, u32 bmdma2) |
@@ -378,7 +385,7 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) | |||
378 | * controllers continue to assert IRQ as long as | 385 | * controllers continue to assert IRQ as long as |
379 | * SError bits are pending. Clear SError immediately. | 386 | * SError bits are pending. Clear SError immediately. |
380 | */ | 387 | */ |
381 | serror = sil_scr_read(ap, SCR_ERROR); | 388 | sil_scr_read(ap, SCR_ERROR, &serror); |
382 | sil_scr_write(ap, SCR_ERROR, serror); | 389 | sil_scr_write(ap, SCR_ERROR, serror); |
383 | 390 | ||
384 | /* Trigger hotplug and accumulate SError only if the | 391 | /* Trigger hotplug and accumulate SError only if the |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index e201f1cab66d..46fbbe7f121c 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -326,8 +326,8 @@ struct sil24_port_priv { | |||
326 | 326 | ||
327 | static void sil24_dev_config(struct ata_device *dev); | 327 | static void sil24_dev_config(struct ata_device *dev); |
328 | static u8 sil24_check_status(struct ata_port *ap); | 328 | static u8 sil24_check_status(struct ata_port *ap); |
329 | static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg); | 329 | static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val); |
330 | static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); | 330 | static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); |
331 | static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf); | 331 | static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf); |
332 | static void sil24_qc_prep(struct ata_queued_cmd *qc); | 332 | static void sil24_qc_prep(struct ata_queued_cmd *qc); |
333 | static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); | 333 | static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); |
@@ -488,25 +488,30 @@ static int sil24_scr_map[] = { | |||
488 | [SCR_ACTIVE] = 3, | 488 | [SCR_ACTIVE] = 3, |
489 | }; | 489 | }; |
490 | 490 | ||
491 | static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg) | 491 | static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) |
492 | { | 492 | { |
493 | void __iomem *scr_addr = ap->ioaddr.scr_addr; | 493 | void __iomem *scr_addr = ap->ioaddr.scr_addr; |
494 | |||
494 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | 495 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { |
495 | void __iomem *addr; | 496 | void __iomem *addr; |
496 | addr = scr_addr + sil24_scr_map[sc_reg] * 4; | 497 | addr = scr_addr + sil24_scr_map[sc_reg] * 4; |
497 | return readl(scr_addr + sil24_scr_map[sc_reg] * 4); | 498 | *val = readl(scr_addr + sil24_scr_map[sc_reg] * 4); |
499 | return 0; | ||
498 | } | 500 | } |
499 | return 0xffffffffU; | 501 | return -EINVAL; |
500 | } | 502 | } |
501 | 503 | ||
502 | static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | 504 | static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) |
503 | { | 505 | { |
504 | void __iomem *scr_addr = ap->ioaddr.scr_addr; | 506 | void __iomem *scr_addr = ap->ioaddr.scr_addr; |
507 | |||
505 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | 508 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { |
506 | void __iomem *addr; | 509 | void __iomem *addr; |
507 | addr = scr_addr + sil24_scr_map[sc_reg] * 4; | 510 | addr = scr_addr + sil24_scr_map[sc_reg] * 4; |
508 | writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); | 511 | writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); |
512 | return 0; | ||
509 | } | 513 | } |
514 | return -EINVAL; | ||
510 | } | 515 | } |
511 | 516 | ||
512 | static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | 517 | static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index 33716b00c6b7..31a2f55aae66 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
@@ -64,8 +64,8 @@ enum { | |||
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 66 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
67 | static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg); | 67 | static int sis_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); |
68 | static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 68 | static int sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
69 | 69 | ||
70 | static const struct pci_device_id sis_pci_tbl[] = { | 70 | static const struct pci_device_id sis_pci_tbl[] = { |
71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ | 71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ |
@@ -207,36 +207,37 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val | |||
207 | pci_write_config_dword(pdev, cfg_addr+0x10, val); | 207 | pci_write_config_dword(pdev, cfg_addr+0x10, val); |
208 | } | 208 | } |
209 | 209 | ||
210 | static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg) | 210 | static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
211 | { | 211 | { |
212 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 212 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
213 | u32 val, val2 = 0; | ||
214 | u8 pmr; | 213 | u8 pmr; |
215 | 214 | ||
216 | if (sc_reg > SCR_CONTROL) | 215 | if (sc_reg > SCR_CONTROL) |
217 | return 0xffffffffU; | 216 | return -EINVAL; |
218 | 217 | ||
219 | if (ap->flags & SIS_FLAG_CFGSCR) | 218 | if (ap->flags & SIS_FLAG_CFGSCR) |
220 | return sis_scr_cfg_read(ap, sc_reg); | 219 | return sis_scr_cfg_read(ap, sc_reg); |
221 | 220 | ||
222 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 221 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
223 | 222 | ||
224 | val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); | 223 | *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); |
225 | 224 | ||
226 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || | 225 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || |
227 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) | 226 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) |
228 | val2 = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10); | 227 | *val |= ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10); |
228 | |||
229 | *val &= 0xfffffffb; | ||
229 | 230 | ||
230 | return (val | val2) & 0xfffffffb; | 231 | return 0; |
231 | } | 232 | } |
232 | 233 | ||
233 | static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 234 | static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
234 | { | 235 | { |
235 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 236 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
236 | u8 pmr; | 237 | u8 pmr; |
237 | 238 | ||
238 | if (sc_reg > SCR_CONTROL) | 239 | if (sc_reg > SCR_CONTROL) |
239 | return; | 240 | return -EINVAL; |
240 | 241 | ||
241 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 242 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
242 | 243 | ||
@@ -248,6 +249,7 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
248 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) | 249 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) |
249 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); | 250 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); |
250 | } | 251 | } |
252 | return 0; | ||
251 | } | 253 | } |
252 | 254 | ||
253 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 255 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c index 63fe99afd59f..92e877075037 100644 --- a/drivers/ata/sata_svw.c +++ b/drivers/ata/sata_svw.c | |||
@@ -103,20 +103,21 @@ static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc) | |||
103 | return 0; | 103 | return 0; |
104 | } | 104 | } |
105 | 105 | ||
106 | static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) | 106 | static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
107 | { | 107 | { |
108 | if (sc_reg > SCR_CONTROL) | 108 | if (sc_reg > SCR_CONTROL) |
109 | return 0xffffffffU; | 109 | return -EINVAL; |
110 | return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 110 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); |
111 | return 0; | ||
111 | } | 112 | } |
112 | 113 | ||
113 | 114 | ||
114 | static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, | 115 | static int k2_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
115 | u32 val) | ||
116 | { | 116 | { |
117 | if (sc_reg > SCR_CONTROL) | 117 | if (sc_reg > SCR_CONTROL) |
118 | return; | 118 | return -EINVAL; |
119 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 119 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
120 | return 0; | ||
120 | } | 121 | } |
121 | 122 | ||
122 | 123 | ||
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c index b52f83ab056a..78c28512f01c 100644 --- a/drivers/ata/sata_uli.c +++ b/drivers/ata/sata_uli.c | |||
@@ -57,8 +57,8 @@ struct uli_priv { | |||
57 | }; | 57 | }; |
58 | 58 | ||
59 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 59 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
60 | static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg); | 60 | static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); |
61 | static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 61 | static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
62 | 62 | ||
63 | static const struct pci_device_id uli_pci_tbl[] = { | 63 | static const struct pci_device_id uli_pci_tbl[] = { |
64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, | 64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, |
@@ -164,20 +164,22 @@ static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) | |||
164 | pci_write_config_dword(pdev, cfg_addr, val); | 164 | pci_write_config_dword(pdev, cfg_addr, val); |
165 | } | 165 | } |
166 | 166 | ||
167 | static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg) | 167 | static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) |
168 | { | 168 | { |
169 | if (sc_reg > SCR_CONTROL) | 169 | if (sc_reg > SCR_CONTROL) |
170 | return 0xffffffffU; | 170 | return -EINVAL; |
171 | 171 | ||
172 | return uli_scr_cfg_read(ap, sc_reg); | 172 | *val = uli_scr_cfg_read(ap, sc_reg); |
173 | return 0; | ||
173 | } | 174 | } |
174 | 175 | ||
175 | static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 176 | static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) |
176 | { | 177 | { |
177 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 | 178 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 |
178 | return; | 179 | return -EINVAL; |
179 | 180 | ||
180 | uli_scr_cfg_write(ap, sc_reg, val); | 181 | uli_scr_cfg_write(ap, sc_reg, val); |
182 | return 0; | ||
181 | } | 183 | } |
182 | 184 | ||
183 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 185 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index c4124475f754..86b7bfc17324 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -72,8 +72,8 @@ enum { | |||
72 | }; | 72 | }; |
73 | 73 | ||
74 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 74 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
75 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg); | 75 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
76 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 76 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
77 | static void svia_noop_freeze(struct ata_port *ap); | 77 | static void svia_noop_freeze(struct ata_port *ap); |
78 | static void vt6420_error_handler(struct ata_port *ap); | 78 | static void vt6420_error_handler(struct ata_port *ap); |
79 | static int vt6421_pata_cable_detect(struct ata_port *ap); | 79 | static int vt6421_pata_cable_detect(struct ata_port *ap); |
@@ -249,18 +249,20 @@ MODULE_LICENSE("GPL"); | |||
249 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); | 249 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); |
250 | MODULE_VERSION(DRV_VERSION); | 250 | MODULE_VERSION(DRV_VERSION); |
251 | 251 | ||
252 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg) | 252 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
253 | { | 253 | { |
254 | if (sc_reg > SCR_CONTROL) | 254 | if (sc_reg > SCR_CONTROL) |
255 | return 0xffffffffU; | 255 | return -EINVAL; |
256 | return ioread32(ap->ioaddr.scr_addr + (4 * sc_reg)); | 256 | *val = ioread32(ap->ioaddr.scr_addr + (4 * sc_reg)); |
257 | return 0; | ||
257 | } | 258 | } |
258 | 259 | ||
259 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 260 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
260 | { | 261 | { |
261 | if (sc_reg > SCR_CONTROL) | 262 | if (sc_reg > SCR_CONTROL) |
262 | return; | 263 | return -EINVAL; |
263 | iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg)); | 264 | iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg)); |
265 | return 0; | ||
264 | } | 266 | } |
265 | 267 | ||
266 | static void svia_noop_freeze(struct ata_port *ap) | 268 | static void svia_noop_freeze(struct ata_port *ap) |
@@ -305,18 +307,19 @@ static int vt6420_prereset(struct ata_port *ap, unsigned long deadline) | |||
305 | 307 | ||
306 | /* Resume phy. This is the old SATA resume sequence */ | 308 | /* Resume phy. This is the old SATA resume sequence */ |
307 | svia_scr_write(ap, SCR_CONTROL, 0x300); | 309 | svia_scr_write(ap, SCR_CONTROL, 0x300); |
308 | svia_scr_read(ap, SCR_CONTROL); /* flush */ | 310 | svia_scr_read(ap, SCR_CONTROL, &scontrol); /* flush */ |
309 | 311 | ||
310 | /* wait for phy to become ready, if necessary */ | 312 | /* wait for phy to become ready, if necessary */ |
311 | do { | 313 | do { |
312 | msleep(200); | 314 | msleep(200); |
313 | if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1) | 315 | svia_scr_read(ap, SCR_STATUS, &sstatus); |
316 | if ((sstatus & 0xf) != 1) | ||
314 | break; | 317 | break; |
315 | } while (time_before(jiffies, timeout)); | 318 | } while (time_before(jiffies, timeout)); |
316 | 319 | ||
317 | /* open code sata_print_link_status() */ | 320 | /* open code sata_print_link_status() */ |
318 | sstatus = svia_scr_read(ap, SCR_STATUS); | 321 | svia_scr_read(ap, SCR_STATUS, &sstatus); |
319 | scontrol = svia_scr_read(ap, SCR_CONTROL); | 322 | svia_scr_read(ap, SCR_CONTROL, &scontrol); |
320 | 323 | ||
321 | online = (sstatus & 0xf) == 0x3; | 324 | online = (sstatus & 0xf) == 0x3; |
322 | 325 | ||
@@ -325,7 +328,7 @@ static int vt6420_prereset(struct ata_port *ap, unsigned long deadline) | |||
325 | online ? "up" : "down", sstatus, scontrol); | 328 | online ? "up" : "down", sstatus, scontrol); |
326 | 329 | ||
327 | /* SStatus is read one more time */ | 330 | /* SStatus is read one more time */ |
328 | svia_scr_read(ap, SCR_STATUS); | 331 | svia_scr_read(ap, SCR_STATUS, &sstatus); |
329 | 332 | ||
330 | if (!online) { | 333 | if (!online) { |
331 | /* tell EH to bail */ | 334 | /* tell EH to bail */ |
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c index 1b5d81faa102..24344d0d0575 100644 --- a/drivers/ata/sata_vsc.c +++ b/drivers/ata/sata_vsc.c | |||
@@ -98,20 +98,21 @@ enum { | |||
98 | VSC_SATA_INT_PHY_CHANGE), | 98 | VSC_SATA_INT_PHY_CHANGE), |
99 | }; | 99 | }; |
100 | 100 | ||
101 | static u32 vsc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) | 101 | static int vsc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
102 | { | 102 | { |
103 | if (sc_reg > SCR_CONTROL) | 103 | if (sc_reg > SCR_CONTROL) |
104 | return 0xffffffffU; | 104 | return -EINVAL; |
105 | return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 105 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); |
106 | return 0; | ||
106 | } | 107 | } |
107 | 108 | ||
108 | 109 | ||
109 | static void vsc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, | 110 | static int vsc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
110 | u32 val) | ||
111 | { | 111 | { |
112 | if (sc_reg > SCR_CONTROL) | 112 | if (sc_reg > SCR_CONTROL) |
113 | return; | 113 | return -EINVAL; |
114 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 114 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
115 | return 0; | ||
115 | } | 116 | } |
116 | 117 | ||
117 | 118 | ||