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authorJeff Garzik <jeff@garzik.org>2007-07-13 17:06:45 -0400
committerJeff Garzik <jeff@garzik.org>2007-07-20 05:58:25 -0400
commit0ea9e179f436f153fc19fdaef7abbc1e0da20762 (patch)
treeaf89a85b97cf1eb34396d5941bb7a86d45904726 /drivers/ata
parent6c1153e00af8de755ec278d873a97c9ce2a72d10 (diff)
[libata] sata_mv: minor cleanups
* trim trailing whitespace * document some flags, registers, and register bits * fix locking around EDMA on/off and configuration * continue replacing "constant OP var" with "var OP constant" * use new pci_try_set_mwi() Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/sata_mv.c62
1 files changed, 38 insertions, 24 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 0ccd990c8dac..80ade5b93b86 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -35,8 +35,6 @@
35 35
36 6) Add port multiplier support (intermediate) 36 6) Add port multiplier support (intermediate)
37 37
38 7) Test and verify 3.0 Gbps support
39
40 8) Develop a low-power-consumption strategy, and implement it. 38 8) Develop a low-power-consumption strategy, and implement it.
41 39
42 9) [Experiment, low priority] See if ATAPI can be supported using 40 9) [Experiment, low priority] See if ATAPI can be supported using
@@ -286,10 +284,10 @@ enum {
286 EDMA_RSP_Q_OUT_PTR_OFS = 0x24, /* also contains BASE_LO */ 284 EDMA_RSP_Q_OUT_PTR_OFS = 0x24, /* also contains BASE_LO */
287 EDMA_RSP_Q_PTR_SHIFT = 3, 285 EDMA_RSP_Q_PTR_SHIFT = 3,
288 286
289 EDMA_CMD_OFS = 0x28, 287 EDMA_CMD_OFS = 0x28, /* EDMA command register */
290 EDMA_EN = (1 << 0), 288 EDMA_EN = (1 << 0), /* enable EDMA */
291 EDMA_DS = (1 << 1), 289 EDMA_DS = (1 << 1), /* disable EDMA; self-negated */
292 ATA_RST = (1 << 2), 290 ATA_RST = (1 << 2), /* reset trans/link/phy */
293 291
294 EDMA_IORDY_TMOUT = 0x34, 292 EDMA_IORDY_TMOUT = 0x34,
295 EDMA_ARB_CFG = 0x38, 293 EDMA_ARB_CFG = 0x38,
@@ -301,14 +299,13 @@ enum {
301 MV_HP_ERRATA_60X1B2 = (1 << 3), 299 MV_HP_ERRATA_60X1B2 = (1 << 3),
302 MV_HP_ERRATA_60X1C0 = (1 << 4), 300 MV_HP_ERRATA_60X1C0 = (1 << 4),
303 MV_HP_ERRATA_XX42A0 = (1 << 5), 301 MV_HP_ERRATA_XX42A0 = (1 << 5),
304 MV_HP_GEN_I = (1 << 6), 302 MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */
305 MV_HP_GEN_II = (1 << 7), 303 MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */
306 MV_HP_GEN_IIE = (1 << 8), 304 MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */
307 305
308 /* Port private flags (pp_flags) */ 306 /* Port private flags (pp_flags) */
309 MV_PP_FLAG_EDMA_EN = (1 << 0), 307 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
310 MV_PP_FLAG_EDMA_DS_ACT = (1 << 1), 308 MV_PP_FLAG_HAD_A_RESET = (1 << 2), /* 1st hard reset complete? */
311 MV_PP_FLAG_HAD_A_RESET = (1 << 2),
312}; 309};
313 310
314#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I) 311#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
@@ -318,8 +315,12 @@ enum {
318enum { 315enum {
319 MV_DMA_BOUNDARY = 0xffffffffU, 316 MV_DMA_BOUNDARY = 0xffffffffU,
320 317
318 /* mask of register bits containing lower 32 bits
319 * of EDMA request queue DMA address
320 */
321 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U, 321 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
322 322
323 /* ditto, for response queue */
323 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U, 324 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U,
324}; 325};
325 326
@@ -823,7 +824,7 @@ static void mv_start_dma(void __iomem *base, struct mv_host_priv *hpriv,
823} 824}
824 825
825/** 826/**
826 * mv_stop_dma - Disable eDMA engine 827 * __mv_stop_dma - Disable eDMA engine
827 * @ap: ATA channel to manipulate 828 * @ap: ATA channel to manipulate
828 * 829 *
829 * Verify the local cache of the eDMA state is accurate with a 830 * Verify the local cache of the eDMA state is accurate with a
@@ -832,7 +833,7 @@ static void mv_start_dma(void __iomem *base, struct mv_host_priv *hpriv,
832 * LOCKING: 833 * LOCKING:
833 * Inherited from caller. 834 * Inherited from caller.
834 */ 835 */
835static int mv_stop_dma(struct ata_port *ap) 836static int __mv_stop_dma(struct ata_port *ap)
836{ 837{
837 void __iomem *port_mmio = mv_ap_base(ap); 838 void __iomem *port_mmio = mv_ap_base(ap);
838 struct mv_port_priv *pp = ap->private_data; 839 struct mv_port_priv *pp = ap->private_data;
@@ -865,6 +866,18 @@ static int mv_stop_dma(struct ata_port *ap)
865 return err; 866 return err;
866} 867}
867 868
869static int mv_stop_dma(struct ata_port *ap)
870{
871 unsigned long flags;
872 int rc;
873
874 spin_lock_irqsave(&ap->host->lock, flags);
875 rc = __mv_stop_dma(ap);
876 spin_unlock_irqrestore(&ap->host->lock, flags);
877
878 return rc;
879}
880
868#ifdef ATA_DEBUG 881#ifdef ATA_DEBUG
869static void mv_dump_mem(void __iomem *start, unsigned bytes) 882static void mv_dump_mem(void __iomem *start, unsigned bytes)
870{ 883{
@@ -965,7 +978,7 @@ static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in)
965{ 978{
966 unsigned int ofs = mv_scr_offset(sc_reg_in); 979 unsigned int ofs = mv_scr_offset(sc_reg_in);
967 980
968 if (0xffffffffU != ofs) 981 if (ofs != 0xffffffffU)
969 return readl(mv_ap_base(ap) + ofs); 982 return readl(mv_ap_base(ap) + ofs);
970 else 983 else
971 return (u32) ofs; 984 return (u32) ofs;
@@ -975,7 +988,7 @@ static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
975{ 988{
976 unsigned int ofs = mv_scr_offset(sc_reg_in); 989 unsigned int ofs = mv_scr_offset(sc_reg_in);
977 990
978 if (0xffffffffU != ofs) 991 if (ofs != 0xffffffffU)
979 writelfl(val, mv_ap_base(ap) + ofs); 992 writelfl(val, mv_ap_base(ap) + ofs);
980} 993}
981 994
@@ -1029,6 +1042,7 @@ static int mv_port_start(struct ata_port *ap)
1029 void __iomem *port_mmio = mv_ap_base(ap); 1042 void __iomem *port_mmio = mv_ap_base(ap);
1030 void *mem; 1043 void *mem;
1031 dma_addr_t mem_dma; 1044 dma_addr_t mem_dma;
1045 unsigned long flags;
1032 int rc; 1046 int rc;
1033 1047
1034 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); 1048 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
@@ -1067,10 +1081,14 @@ static int mv_port_start(struct ata_port *ap)
1067 pp->sg_tbl = mem; 1081 pp->sg_tbl = mem;
1068 pp->sg_tbl_dma = mem_dma; 1082 pp->sg_tbl_dma = mem_dma;
1069 1083
1084 spin_lock_irqsave(&ap->host->lock, flags);
1085
1070 mv_edma_cfg(ap, hpriv, port_mmio); 1086 mv_edma_cfg(ap, hpriv, port_mmio);
1071 1087
1072 mv_set_edma_ptrs(port_mmio, hpriv, pp); 1088 mv_set_edma_ptrs(port_mmio, hpriv, pp);
1073 1089
1090 spin_unlock_irqrestore(&ap->host->lock, flags);
1091
1074 /* Don't turn on EDMA here...do it before DMA commands only. Else 1092 /* Don't turn on EDMA here...do it before DMA commands only. Else
1075 * we'll be unable to send non-data, PIO, etc due to restricted access 1093 * we'll be unable to send non-data, PIO, etc due to restricted access
1076 * to shadow regs. 1094 * to shadow regs.
@@ -1090,11 +1108,7 @@ static int mv_port_start(struct ata_port *ap)
1090 */ 1108 */
1091static void mv_port_stop(struct ata_port *ap) 1109static void mv_port_stop(struct ata_port *ap)
1092{ 1110{
1093 unsigned long flags;
1094
1095 spin_lock_irqsave(&ap->host->lock, flags);
1096 mv_stop_dma(ap); 1111 mv_stop_dma(ap);
1097 spin_unlock_irqrestore(&ap->host->lock, flags);
1098} 1112}
1099 1113
1100/** 1114/**
@@ -1325,7 +1339,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
1325 * port. Turn off EDMA so there won't be problems accessing 1339 * port. Turn off EDMA so there won't be problems accessing
1326 * shadow block, etc registers. 1340 * shadow block, etc registers.
1327 */ 1341 */
1328 mv_stop_dma(ap); 1342 __mv_stop_dma(ap);
1329 return ata_qc_issue_prot(qc); 1343 return ata_qc_issue_prot(qc);
1330 } 1344 }
1331 1345
@@ -1497,7 +1511,7 @@ static void mv_intr_edma(struct ata_port *ap)
1497 break; 1511 break;
1498 1512
1499 /* 50xx: get active ATA command */ 1513 /* 50xx: get active ATA command */
1500 if (IS_GEN_I(hpriv)) 1514 if (IS_GEN_I(hpriv))
1501 tag = ap->active_tag; 1515 tag = ap->active_tag;
1502 1516
1503 /* Gen II/IIE: get active ATA command via tag, to enable 1517 /* Gen II/IIE: get active ATA command via tag, to enable
@@ -1532,7 +1546,7 @@ static void mv_intr_edma(struct ata_port *ap)
1532 ata_qc_complete(qc); 1546 ata_qc_complete(qc);
1533 } 1547 }
1534 1548
1535 /* advance software response queue pointer, to 1549 /* advance software response queue pointer, to
1536 * indicate (after the loop completes) to hardware 1550 * indicate (after the loop completes) to hardware
1537 * that we have consumed a response queue entry. 1551 * that we have consumed a response queue entry.
1538 */ 1552 */
@@ -2206,7 +2220,7 @@ static int mv_prereset(struct ata_port *ap, unsigned long deadline)
2206 struct mv_port_priv *pp = ap->private_data; 2220 struct mv_port_priv *pp = ap->private_data;
2207 struct ata_eh_context *ehc = &ap->eh_context; 2221 struct ata_eh_context *ehc = &ap->eh_context;
2208 int rc; 2222 int rc;
2209 2223
2210 rc = mv_stop_dma(ap); 2224 rc = mv_stop_dma(ap);
2211 if (rc) 2225 if (rc)
2212 ehc->i.action |= ATA_EH_HARDRESET; 2226 ehc->i.action |= ATA_EH_HARDRESET;