sata_mv: implement SoC guideline SATA_S11

The 5182 System-On-Chip (SOC) variant wants certain lower
bits to be cleared on any write to the PHY_MODE3 register.

If/when support is added for other SOC variants, we'll need
some way to uniquely identify the 5182, and not perform this
workaround for the others.

But for now, it is the only SOC variant we support here.

Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

1 files changed, 5 insertions, 1 deletions

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 17093e600d80..acf347f71a2f 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -72,7 +72,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME        "sata_mv"
-#define DRV_VERSION     "1.23"
+#define DRV_VERSION     "1.24"
 
 enum {
         /* BAR's are enumerated in terms of pci_resource_start() terms */
@@ -2558,6 +2558,10 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
         m3 = readl(port_mmio + PHY_MODE3);
         m3 = (m3 & 0x1f) | (0x5555601 << 5);
 
+        /* Guideline 88F5182 (GL# SATA-S11) */
+        if (IS_SOC(hpriv))
+                m3 &= ~0x1c;
+
         if (fix_phy_mode4) {
                 u32 m4;