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authorMark Lord <liml@rtr.ca>2008-04-16 14:58:13 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-04-17 15:56:16 -0400
commit02c1f32f1c524d2a389989f2482121f7c7d9b164 (patch)
tree985654343ad8aeec6e621e6df5449b3200da0c18 /drivers/ata
parent40f0bc2d77d2d9ead3812f4eec2eefc11455e5de (diff)
sata_mv fix SOC flags, enable NCQ on SOC
The System-On-Chip (SOC) core supports all of the same features as the other recent Marvell chips, including NCQ and IRQ coalescing. Fix the chip_soc flags to enable these capabilities (note that the driver currently does nothing special for IRQ coalescing, though). Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/sata_mv.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 162260d6fe19..6a7420546609 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -626,7 +626,8 @@ static const struct ata_port_info mv_port_info[] = {
626 .port_ops = &mv_iie_ops, 626 .port_ops = &mv_iie_ops,
627 }, 627 },
628 { /* chip_soc */ 628 { /* chip_soc */
629 .flags = MV_COMMON_FLAGS | MV_FLAG_SOC, 629 .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS |
630 ATA_FLAG_NCQ | MV_FLAG_SOC,
630 .pio_mask = 0x1f, /* pio0-4 */ 631 .pio_mask = 0x1f, /* pio0-4 */
631 .udma_mask = ATA_UDMA6, 632 .udma_mask = ATA_UDMA6,
632 .port_ops = &mv_iie_ops, 633 .port_ops = &mv_iie_ops,