diff options
| author | Jeff Garzik <jeff@garzik.org> | 2006-08-31 00:03:49 -0400 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-08-31 00:03:49 -0400 |
| commit | 85cd7251b9112e3dabeac9fd3b175601ca607241 (patch) | |
| tree | b33b80f54883e224a586661165bd0aee2c47ed39 /drivers/ata | |
| parent | 481ff126e8d9be63809e7854badf815e54066eed (diff) | |
[libata #pata-drivers] Trim trailing whitespace.
Diffstat (limited to 'drivers/ata')
| -rw-r--r-- | drivers/ata/ata_generic.c | 36 | ||||
| -rw-r--r-- | drivers/ata/ata_piix.c | 36 | ||||
| -rw-r--r-- | drivers/ata/pata_ali.c | 4 | ||||
| -rw-r--r-- | drivers/ata/pata_amd.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_cmd64x.c | 88 | ||||
| -rw-r--r-- | drivers/ata/pata_cypress.c | 32 | ||||
| -rw-r--r-- | drivers/ata/pata_hpt366.c | 40 | ||||
| -rw-r--r-- | drivers/ata/pata_hpt37x.c | 138 | ||||
| -rw-r--r-- | drivers/ata/pata_hpt3x2n.c | 94 | ||||
| -rw-r--r-- | drivers/ata/pata_hpt3x3.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_it8172.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_it821x.c | 70 | ||||
| -rw-r--r-- | drivers/ata/pata_legacy.c | 18 | ||||
| -rw-r--r-- | drivers/ata/pata_netcell.c | 4 | ||||
| -rw-r--r-- | drivers/ata/pata_optidma.c | 52 | ||||
| -rw-r--r-- | drivers/ata/pata_pcmcia.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_pdc202xx_old.c | 64 | ||||
| -rw-r--r-- | drivers/ata/pata_qdi.c | 64 | ||||
| -rw-r--r-- | drivers/ata/pata_radisys.c | 16 | ||||
| -rw-r--r-- | drivers/ata/pata_sc1200.c | 30 | ||||
| -rw-r--r-- | drivers/ata/pata_serverworks.c | 58 | ||||
| -rw-r--r-- | drivers/ata/pata_sis.c | 8 | ||||
| -rw-r--r-- | drivers/ata/pata_sl82c105.c | 48 | ||||
| -rw-r--r-- | drivers/ata/pata_triflex.c | 2 | ||||
| -rw-r--r-- | drivers/ata/pata_via.c | 2 |
25 files changed, 456 insertions, 456 deletions
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c index 20b191dcf7ed..1d1c30a2fcd0 100644 --- a/drivers/ata/ata_generic.c +++ b/drivers/ata/ata_generic.c | |||
| @@ -2,18 +2,18 @@ | |||
| 2 | * ata_generic.c - Generic PATA/SATA controller driver. | 2 | * ata_generic.c - Generic PATA/SATA controller driver. |
| 3 | * Copyright 2005 Red Hat Inc <alan@redhat.com>, all rights reserved. | 3 | * Copyright 2005 Red Hat Inc <alan@redhat.com>, all rights reserved. |
| 4 | * | 4 | * |
| 5 | * Elements from ide/pci/generic.c | 5 | * Elements from ide/pci/generic.c |
| 6 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> | 6 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
| 7 | * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com> | 7 | * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com> |
| 8 | * | 8 | * |
| 9 | * May be copied or modified under the terms of the GNU General Public License | 9 | * May be copied or modified under the terms of the GNU General Public License |
| 10 | * | 10 | * |
| 11 | * Driver for PCI IDE interfaces implementing the standard bus mastering | 11 | * Driver for PCI IDE interfaces implementing the standard bus mastering |
| 12 | * interface functionality. This assumes the BIOS did the drive set up and | 12 | * interface functionality. This assumes the BIOS did the drive set up and |
| 13 | * tuning for us. By default we do not grab all IDE class devices as they | 13 | * tuning for us. By default we do not grab all IDE class devices as they |
| 14 | * may have other drivers or need fixups to avoid problems. Instead we keep | 14 | * may have other drivers or need fixups to avoid problems. Instead we keep |
| 15 | * a default list of stuff without documentation/driver that appears to | 15 | * a default list of stuff without documentation/driver that appears to |
| 16 | * work. | 16 | * work. |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
| @@ -38,7 +38,7 @@ | |||
| 38 | * | 38 | * |
| 39 | * Set up cable type and use generic probe init | 39 | * Set up cable type and use generic probe init |
| 40 | */ | 40 | */ |
| 41 | 41 | ||
| 42 | static int generic_pre_reset(struct ata_port *ap) | 42 | static int generic_pre_reset(struct ata_port *ap) |
| 43 | { | 43 | { |
| 44 | ap->cbl = ATA_CBL_PATA80; | 44 | ap->cbl = ATA_CBL_PATA80; |
| @@ -55,7 +55,7 @@ static int generic_pre_reset(struct ata_port *ap) | |||
| 55 | * None (inherited from caller). | 55 | * None (inherited from caller). |
| 56 | */ | 56 | */ |
| 57 | 57 | ||
| 58 | 58 | ||
| 59 | static void generic_error_handler(struct ata_port *ap) | 59 | static void generic_error_handler(struct ata_port *ap) |
| 60 | { | 60 | { |
| 61 | ata_bmdma_drive_eh(ap, generic_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | 61 | ata_bmdma_drive_eh(ap, generic_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| @@ -68,9 +68,9 @@ static void generic_error_handler(struct ata_port *ap) | |||
| 68 | * Use a non standard set_mode function. We don't want to be tuned. | 68 | * Use a non standard set_mode function. We don't want to be tuned. |
| 69 | * The BIOS configured everything. Our job is not to fiddle. We | 69 | * The BIOS configured everything. Our job is not to fiddle. We |
| 70 | * read the dma enabled bits from the PCI configuration of the device | 70 | * read the dma enabled bits from the PCI configuration of the device |
| 71 | * and respect them. | 71 | * and respect them. |
| 72 | */ | 72 | */ |
| 73 | 73 | ||
| 74 | static void generic_set_mode(struct ata_port *ap) | 74 | static void generic_set_mode(struct ata_port *ap) |
| 75 | { | 75 | { |
| 76 | int dma_enabled = 0; | 76 | int dma_enabled = 0; |
| @@ -79,14 +79,14 @@ static void generic_set_mode(struct ata_port *ap) | |||
| 79 | /* Bits 5 and 6 indicate if DMA is active on master/slave */ | 79 | /* Bits 5 and 6 indicate if DMA is active on master/slave */ |
| 80 | if (ap->ioaddr.bmdma_addr) | 80 | if (ap->ioaddr.bmdma_addr) |
| 81 | dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | 81 | dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 82 | 82 | ||
| 83 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 83 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
| 84 | struct ata_device *dev = &ap->device[i]; | 84 | struct ata_device *dev = &ap->device[i]; |
| 85 | if (ata_dev_enabled(dev)) { | 85 | if (ata_dev_enabled(dev)) { |
| 86 | /* We don't really care */ | 86 | /* We don't really care */ |
| 87 | dev->pio_mode = XFER_PIO_0; | 87 | dev->pio_mode = XFER_PIO_0; |
| 88 | dev->dma_mode = XFER_MW_DMA_0; | 88 | dev->dma_mode = XFER_MW_DMA_0; |
| 89 | /* We do need the right mode information for DMA or PIO | 89 | /* We do need the right mode information for DMA or PIO |
| 90 | and this comes from the current configuration flags */ | 90 | and this comes from the current configuration flags */ |
| 91 | if (dma_enabled & (1 << (5 + i))) { | 91 | if (dma_enabled & (1 << (5 + i))) { |
| 92 | dev->xfer_mode = XFER_MW_DMA_0; | 92 | dev->xfer_mode = XFER_MW_DMA_0; |
| @@ -121,7 +121,7 @@ static struct scsi_host_template generic_sht = { | |||
| 121 | 121 | ||
| 122 | static struct ata_port_operations generic_port_ops = { | 122 | static struct ata_port_operations generic_port_ops = { |
| 123 | .set_mode = generic_set_mode, | 123 | .set_mode = generic_set_mode, |
| 124 | 124 | ||
| 125 | .port_disable = ata_port_disable, | 125 | .port_disable = ata_port_disable, |
| 126 | .tf_load = ata_tf_load, | 126 | .tf_load = ata_tf_load, |
| 127 | .tf_read = ata_tf_read, | 127 | .tf_read = ata_tf_read, |
| @@ -133,7 +133,7 @@ static struct ata_port_operations generic_port_ops = { | |||
| 133 | .bmdma_start = ata_bmdma_start, | 133 | .bmdma_start = ata_bmdma_start, |
| 134 | .bmdma_stop = ata_bmdma_stop, | 134 | .bmdma_stop = ata_bmdma_stop, |
| 135 | .bmdma_status = ata_bmdma_status, | 135 | .bmdma_status = ata_bmdma_status, |
| 136 | 136 | ||
| 137 | .data_xfer = ata_pio_data_xfer, | 137 | .data_xfer = ata_pio_data_xfer, |
| 138 | 138 | ||
| 139 | .freeze = ata_bmdma_freeze, | 139 | .freeze = ata_bmdma_freeze, |
| @@ -150,8 +150,8 @@ static struct ata_port_operations generic_port_ops = { | |||
| 150 | .port_start = ata_port_start, | 150 | .port_start = ata_port_start, |
| 151 | .port_stop = ata_port_stop, | 151 | .port_stop = ata_port_stop, |
| 152 | .host_stop = ata_host_stop | 152 | .host_stop = ata_host_stop |
| 153 | }; | 153 | }; |
| 154 | 154 | ||
| 155 | static int all_generic_ide; /* Set to claim all devices */ | 155 | static int all_generic_ide; /* Set to claim all devices */ |
| 156 | 156 | ||
| 157 | /** | 157 | /** |
| @@ -160,10 +160,10 @@ static int all_generic_ide; /* Set to claim all devices */ | |||
| 160 | * @id: match entry | 160 | * @id: match entry |
| 161 | * | 161 | * |
| 162 | * Called each time a matching IDE interface is found. We check if the | 162 | * Called each time a matching IDE interface is found. We check if the |
| 163 | * interface is one we wish to claim and if so we perform any chip | 163 | * interface is one we wish to claim and if so we perform any chip |
| 164 | * specific hacks then let the ATA layer do the heavy lifting. | 164 | * specific hacks then let the ATA layer do the heavy lifting. |
| 165 | */ | 165 | */ |
| 166 | 166 | ||
| 167 | static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 167 | static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 168 | { | 168 | { |
| 169 | u16 command; | 169 | u16 command; |
| @@ -176,7 +176,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id | |||
| 176 | .port_ops = &generic_port_ops | 176 | .port_ops = &generic_port_ops |
| 177 | }; | 177 | }; |
| 178 | static struct ata_port_info *port_info[2] = { &info, &info }; | 178 | static struct ata_port_info *port_info[2] = { &info, &info }; |
| 179 | 179 | ||
| 180 | /* Don't use the generic entry unless instructed to do so */ | 180 | /* Don't use the generic entry unless instructed to do so */ |
| 181 | if (id->driver_data == 1 && all_generic_ide == 0) | 181 | if (id->driver_data == 1 && all_generic_ide == 0) |
| 182 | return -ENODEV; | 182 | return -ENODEV; |
| @@ -197,7 +197,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id | |||
| 197 | pci_read_config_word(dev, PCI_COMMAND, &command); | 197 | pci_read_config_word(dev, PCI_COMMAND, &command); |
| 198 | if (!(command & PCI_COMMAND_IO)) | 198 | if (!(command & PCI_COMMAND_IO)) |
| 199 | return -ENODEV; | 199 | return -ENODEV; |
| 200 | 200 | ||
| 201 | if (dev->vendor == PCI_VENDOR_ID_AL) | 201 | if (dev->vendor == PCI_VENDOR_ID_AL) |
| 202 | ata_pci_clear_simplex(dev); | 202 | ata_pci_clear_simplex(dev); |
| 203 | 203 | ||
| @@ -207,7 +207,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id | |||
| 207 | static struct pci_device_id ata_generic[] = { | 207 | static struct pci_device_id ata_generic[] = { |
| 208 | { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), }, | 208 | { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), }, |
| 209 | { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), }, | 209 | { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), }, |
| 210 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), }, | 210 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), }, |
| 211 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), }, | 211 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), }, |
| 212 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), }, | 212 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), }, |
| 213 | { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), }, | 213 | { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), }, |
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 12b3a42fb356..1a4c03d5de9f 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
| @@ -127,7 +127,7 @@ enum { | |||
| 127 | ich6_sata_ahci = 8, | 127 | ich6_sata_ahci = 8, |
| 128 | ich6m_sata_ahci = 9, | 128 | ich6m_sata_ahci = 9, |
| 129 | ich8_sata_ahci = 10, | 129 | ich8_sata_ahci = 10, |
| 130 | 130 | ||
| 131 | /* constants for mapping table */ | 131 | /* constants for mapping table */ |
| 132 | P0 = 0, /* port 0 */ | 132 | P0 = 0, /* port 0 */ |
| 133 | P1 = 1, /* port 1 */ | 133 | P1 = 1, /* port 1 */ |
| @@ -196,7 +196,7 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
| 196 | { 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 }, | 196 | { 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 }, |
| 197 | /* C-ICH (i810E2) */ | 197 | /* C-ICH (i810E2) */ |
| 198 | { 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, | 198 | { 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, |
| 199 | /* ESB (855GME/875P + 6300ESB) UDMA 100 */ | 199 | /* ESB (855GME/875P + 6300ESB) UDMA 100 */ |
| 200 | { 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, | 200 | { 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, |
| 201 | /* ICH6 (and 6) (i915) UDMA 100 */ | 201 | /* ICH6 (and 6) (i915) UDMA 100 */ |
| 202 | { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, | 202 | { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, |
| @@ -458,7 +458,7 @@ static struct ata_port_info piix_port_info[] = { | |||
| 458 | .udma_mask = ATA_UDMA4, | 458 | .udma_mask = ATA_UDMA4, |
| 459 | .port_ops = &ich_pata_ops, | 459 | .port_ops = &ich_pata_ops, |
| 460 | }, | 460 | }, |
| 461 | 461 | ||
| 462 | /* ich_pata_100: 3 */ | 462 | /* ich_pata_100: 3 */ |
| 463 | { | 463 | { |
| 464 | .sht = &piix_sht, | 464 | .sht = &piix_sht, |
| @@ -759,7 +759,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
| 759 | u8 slave_data; | 759 | u8 slave_data; |
| 760 | u8 udma_enable; | 760 | u8 udma_enable; |
| 761 | int control = 0; | 761 | int control = 0; |
| 762 | 762 | ||
| 763 | /* | 763 | /* |
| 764 | * See Intel Document 298600-004 for the timing programing rules | 764 | * See Intel Document 298600-004 for the timing programing rules |
| 765 | * for ICH controllers. | 765 | * for ICH controllers. |
| @@ -777,7 +777,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
| 777 | if (ata_pio_need_iordy(adev)) | 777 | if (ata_pio_need_iordy(adev)) |
| 778 | control |= 2; /* IE enable */ | 778 | control |= 2; /* IE enable */ |
| 779 | 779 | ||
| 780 | /* Intel specifies that the PPE functionality is for disk only */ | 780 | /* Intel specifies that the PPE functionality is for disk only */ |
| 781 | if (adev->class == ATA_DEV_ATA) | 781 | if (adev->class == ATA_DEV_ATA) |
| 782 | control |= 4; /* PPE enable */ | 782 | control |= 4; /* PPE enable */ |
| 783 | 783 | ||
| @@ -806,7 +806,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
| 806 | 806 | ||
| 807 | /* Ensure the UDMA bit is off - it will be turned back on if | 807 | /* Ensure the UDMA bit is off - it will be turned back on if |
| 808 | UDMA is selected */ | 808 | UDMA is selected */ |
| 809 | 809 | ||
| 810 | if (ap->udma_mask) { | 810 | if (ap->udma_mask) { |
| 811 | pci_read_config_byte(dev, 0x48, &udma_enable); | 811 | pci_read_config_byte(dev, 0x48, &udma_enable); |
| 812 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); | 812 | udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); |
| @@ -835,7 +835,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i | |||
| 835 | u8 speed = adev->dma_mode; | 835 | u8 speed = adev->dma_mode; |
| 836 | int devid = adev->devno + 2 * ap->port_no; | 836 | int devid = adev->devno + 2 * ap->port_no; |
| 837 | u8 udma_enable; | 837 | u8 udma_enable; |
| 838 | 838 | ||
| 839 | static const /* ISP RTC */ | 839 | static const /* ISP RTC */ |
| 840 | u8 timings[][2] = { { 0, 0 }, | 840 | u8 timings[][2] = { { 0, 0 }, |
| 841 | { 0, 0 }, | 841 | { 0, 0 }, |
| @@ -851,13 +851,13 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i | |||
| 851 | u16 udma_timing; | 851 | u16 udma_timing; |
| 852 | u16 ideconf; | 852 | u16 ideconf; |
| 853 | int u_clock, u_speed; | 853 | int u_clock, u_speed; |
| 854 | 854 | ||
| 855 | /* | 855 | /* |
| 856 | * UDMA is handled by a combination of clock switching and | 856 | * UDMA is handled by a combination of clock switching and |
| 857 | * selection of dividers | 857 | * selection of dividers |
| 858 | * | 858 | * |
| 859 | * Handy rule: Odd modes are UDMATIMx 01, even are 02 | 859 | * Handy rule: Odd modes are UDMATIMx 01, even are 02 |
| 860 | * except UDMA0 which is 00 | 860 | * except UDMA0 which is 00 |
| 861 | */ | 861 | */ |
| 862 | u_speed = min(2 - (udma & 1), udma); | 862 | u_speed = min(2 - (udma & 1), udma); |
| 863 | if (udma == 5) | 863 | if (udma == 5) |
| @@ -866,16 +866,16 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i | |||
| 866 | u_clock = 1; /* 66Mhz */ | 866 | u_clock = 1; /* 66Mhz */ |
| 867 | else | 867 | else |
| 868 | u_clock = 0; /* 33Mhz */ | 868 | u_clock = 0; /* 33Mhz */ |
| 869 | 869 | ||
| 870 | udma_enable |= (1 << devid); | 870 | udma_enable |= (1 << devid); |
| 871 | 871 | ||
| 872 | /* Load the CT/RP selection */ | 872 | /* Load the CT/RP selection */ |
| 873 | pci_read_config_word(dev, 0x4A, &udma_timing); | 873 | pci_read_config_word(dev, 0x4A, &udma_timing); |
| 874 | udma_timing &= ~(3 << (4 * devid)); | 874 | udma_timing &= ~(3 << (4 * devid)); |
| 875 | udma_timing |= u_speed << (4 * devid); | 875 | udma_timing |= u_speed << (4 * devid); |
| 876 | pci_write_config_word(dev, 0x4A, udma_timing); | 876 | pci_write_config_word(dev, 0x4A, udma_timing); |
| 877 | 877 | ||
| 878 | if (isich) { | 878 | if (isich) { |
| 879 | /* Select a 33/66/100Mhz clock */ | 879 | /* Select a 33/66/100Mhz clock */ |
| 880 | pci_read_config_word(dev, 0x54, &ideconf); | 880 | pci_read_config_word(dev, 0x54, &ideconf); |
| 881 | ideconf &= ~(0x1001 << devid); | 881 | ideconf &= ~(0x1001 << devid); |
| @@ -897,12 +897,12 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i | |||
| 897 | XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 | 897 | XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 |
| 898 | }; | 898 | }; |
| 899 | int pio = needed_pio[mwdma] - XFER_PIO_0; | 899 | int pio = needed_pio[mwdma] - XFER_PIO_0; |
| 900 | 900 | ||
| 901 | control = 3; /* IORDY|TIME1 */ | 901 | control = 3; /* IORDY|TIME1 */ |
| 902 | 902 | ||
| 903 | /* If the drive MWDMA is faster than it can do PIO then | 903 | /* If the drive MWDMA is faster than it can do PIO then |
| 904 | we must force PIO into PIO0 */ | 904 | we must force PIO into PIO0 */ |
| 905 | 905 | ||
| 906 | if (adev->pio_mode < needed_pio[mwdma]) | 906 | if (adev->pio_mode < needed_pio[mwdma]) |
| 907 | /* Enable DMA timing only */ | 907 | /* Enable DMA timing only */ |
| 908 | control |= 8; /* PIO cycles in PIO0 */ | 908 | control |= 8; /* PIO cycles in PIO0 */ |
| @@ -916,7 +916,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i | |||
| 916 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); | 916 | slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); |
| 917 | pci_write_config_byte(dev, 0x44, slave_data); | 917 | pci_write_config_byte(dev, 0x44, slave_data); |
| 918 | } else { /* Master */ | 918 | } else { /* Master */ |
| 919 | master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY | 919 | master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY |
| 920 | and master timing bits */ | 920 | and master timing bits */ |
| 921 | master_data |= control; | 921 | master_data |= control; |
| 922 | master_data |= | 922 | master_data |= |
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c index 0e0415ecfce7..8448ee6e0eed 100644 --- a/drivers/ata/pata_ali.c +++ b/drivers/ata/pata_ali.c | |||
| @@ -184,7 +184,7 @@ static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int o | |||
| 184 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | 184 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to |
| 185 | 0x00. Not all the docs agree but the behaviour we now use is the | 185 | 0x00. Not all the docs agree but the behaviour we now use is the |
| 186 | one stated in the BIOS Programming Guide */ | 186 | one stated in the BIOS Programming Guide */ |
| 187 | 187 | ||
| 188 | pci_read_config_byte(pdev, pio_fifo, &fifo); | 188 | pci_read_config_byte(pdev, pio_fifo, &fifo); |
| 189 | fifo &= ~(0x0F << shift); | 189 | fifo &= ~(0x0F << shift); |
| 190 | if (on) | 190 | if (on) |
| @@ -526,7 +526,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 526 | .sht = &ali_sht, | 526 | .sht = &ali_sht, |
| 527 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | 527 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, |
| 528 | .pio_mask = 0x1f, | 528 | .pio_mask = 0x1f, |
| 529 | .mwdma_mask = 0x07, | 529 | .mwdma_mask = 0x07, |
| 530 | .udma_mask = 0x07, /* UDMA33 */ | 530 | .udma_mask = 0x07, /* UDMA33 */ |
| 531 | .port_ops = &ali_20_port_ops | 531 | .port_ops = &ali_20_port_ops |
| 532 | }; | 532 | }; |
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c index 6ab568428a14..b3f60fdb02d0 100644 --- a/drivers/ata/pata_amd.c +++ b/drivers/ata/pata_amd.c | |||
| @@ -136,7 +136,7 @@ static int amd_pre_reset(struct ata_port *ap) | |||
| 136 | 136 | ||
| 137 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 137 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 138 | u8 ata66; | 138 | u8 ata66; |
| 139 | 139 | ||
| 140 | if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) { | 140 | if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) { |
| 141 | ata_port_disable(ap); | 141 | ata_port_disable(ap); |
| 142 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); | 142 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c index 03284611a727..abf1bb7bd322 100644 --- a/drivers/ata/pata_cmd64x.c +++ b/drivers/ata/pata_cmd64x.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * TODO | 20 | * TODO |
| 21 | * Testing work | 21 | * Testing work |
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
| 25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
| 26 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
| @@ -36,7 +36,7 @@ | |||
| 36 | /* | 36 | /* |
| 37 | * CMD64x specific registers definition. | 37 | * CMD64x specific registers definition. |
| 38 | */ | 38 | */ |
| 39 | 39 | ||
| 40 | enum { | 40 | enum { |
| 41 | CFR = 0x50, | 41 | CFR = 0x50, |
| 42 | CFR_INTR_CH0 = 0x02, | 42 | CFR_INTR_CH0 = 0x02, |
| @@ -90,9 +90,9 @@ static int cmd648_pre_reset(struct ata_port *ap) | |||
| 90 | pci_read_config_byte(pdev, BMIDECSR, &r); | 90 | pci_read_config_byte(pdev, BMIDECSR, &r); |
| 91 | if (r & (1 << ap->port_no)) | 91 | if (r & (1 << ap->port_no)) |
| 92 | ap->cbl = ATA_CBL_PATA80; | 92 | ap->cbl = ATA_CBL_PATA80; |
| 93 | else | 93 | else |
| 94 | ap->cbl = ATA_CBL_PATA40; | 94 | ap->cbl = ATA_CBL_PATA40; |
| 95 | 95 | ||
| 96 | return ata_std_prereset(ap); | 96 | return ata_std_prereset(ap); |
| 97 | } | 97 | } |
| 98 | 98 | ||
| @@ -113,18 +113,18 @@ static void cmd648_error_handler(struct ata_port *ap) | |||
| 113 | * | 113 | * |
| 114 | * Called to do the PIO mode setup. | 114 | * Called to do the PIO mode setup. |
| 115 | */ | 115 | */ |
| 116 | 116 | ||
| 117 | static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) | 117 | static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 118 | { | 118 | { |
| 119 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 119 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 120 | struct ata_timing t; | 120 | struct ata_timing t; |
| 121 | const unsigned long T = 1000000 / 33; | 121 | const unsigned long T = 1000000 / 33; |
| 122 | const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 }; | 122 | const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 }; |
| 123 | 123 | ||
| 124 | u8 reg; | 124 | u8 reg; |
| 125 | 125 | ||
| 126 | /* Port layout is not logical so use a table */ | 126 | /* Port layout is not logical so use a table */ |
| 127 | const u8 arttim_port[2][2] = { | 127 | const u8 arttim_port[2][2] = { |
| 128 | { ARTTIM0, ARTTIM1 }, | 128 | { ARTTIM0, ARTTIM1 }, |
| 129 | { ARTTIM23, ARTTIM23 } | 129 | { ARTTIM23, ARTTIM23 } |
| 130 | }; | 130 | }; |
| @@ -132,11 +132,11 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 132 | { DRWTIM0, DRWTIM1 }, | 132 | { DRWTIM0, DRWTIM1 }, |
| 133 | { DRWTIM2, DRWTIM3 } | 133 | { DRWTIM2, DRWTIM3 } |
| 134 | }; | 134 | }; |
| 135 | 135 | ||
| 136 | int arttim = arttim_port[ap->port_no][adev->devno]; | 136 | int arttim = arttim_port[ap->port_no][adev->devno]; |
| 137 | int drwtim = drwtim_port[ap->port_no][adev->devno]; | 137 | int drwtim = drwtim_port[ap->port_no][adev->devno]; |
| 138 | 138 | ||
| 139 | 139 | ||
| 140 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) { | 140 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) { |
| 141 | printk(KERN_ERR DRV_NAME ": mode computation failed.\n"); | 141 | printk(KERN_ERR DRV_NAME ": mode computation failed.\n"); |
| 142 | return; | 142 | return; |
| @@ -144,14 +144,14 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 144 | if (ap->port_no) { | 144 | if (ap->port_no) { |
| 145 | /* Slave has shared address setup */ | 145 | /* Slave has shared address setup */ |
| 146 | struct ata_device *pair = ata_dev_pair(adev); | 146 | struct ata_device *pair = ata_dev_pair(adev); |
| 147 | 147 | ||
| 148 | if (pair) { | 148 | if (pair) { |
| 149 | struct ata_timing tp; | 149 | struct ata_timing tp; |
| 150 | ata_timing_compute(pair, pair->pio_mode, &tp, T, 0); | 150 | ata_timing_compute(pair, pair->pio_mode, &tp, T, 0); |
| 151 | ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); | 151 | ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); |
| 152 | } | 152 | } |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n", | 155 | printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n", |
| 156 | t.active, t.recover, t.setup); | 156 | t.active, t.recover, t.setup); |
| 157 | if (t.recover > 16) { | 157 | if (t.recover > 16) { |
| @@ -160,30 +160,30 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 160 | } | 160 | } |
| 161 | if (t.active > 16) | 161 | if (t.active > 16) |
| 162 | t.active = 16; | 162 | t.active = 16; |
| 163 | 163 | ||
| 164 | /* Now convert the clocks into values we can actually stuff into | 164 | /* Now convert the clocks into values we can actually stuff into |
| 165 | the chip */ | 165 | the chip */ |
| 166 | 166 | ||
| 167 | if (t.recover > 1) | 167 | if (t.recover > 1) |
| 168 | t.recover--; | 168 | t.recover--; |
| 169 | else | 169 | else |
| 170 | t.recover = 15; | 170 | t.recover = 15; |
| 171 | 171 | ||
| 172 | if (t.setup > 4) | 172 | if (t.setup > 4) |
| 173 | t.setup = 0xC0; | 173 | t.setup = 0xC0; |
| 174 | else | 174 | else |
| 175 | t.setup = setup_data[t.setup]; | 175 | t.setup = setup_data[t.setup]; |
| 176 | 176 | ||
| 177 | t.active &= 0x0F; /* 0 = 16 */ | 177 | t.active &= 0x0F; /* 0 = 16 */ |
| 178 | 178 | ||
| 179 | /* Load setup timing */ | 179 | /* Load setup timing */ |
| 180 | pci_read_config_byte(pdev, arttim, ®); | 180 | pci_read_config_byte(pdev, arttim, ®); |
| 181 | reg &= 0x3F; | 181 | reg &= 0x3F; |
| 182 | reg |= t.setup; | 182 | reg |= t.setup; |
| 183 | pci_write_config_byte(pdev, arttim, reg); | 183 | pci_write_config_byte(pdev, arttim, reg); |
| 184 | 184 | ||
| 185 | /* Load active/recovery */ | 185 | /* Load active/recovery */ |
| 186 | pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover); | 186 | pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover); |
| 187 | } | 187 | } |
| 188 | 188 | ||
| 189 | /** | 189 | /** |
| @@ -193,29 +193,29 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 193 | * | 193 | * |
| 194 | * Called to do the DMA mode setup. | 194 | * Called to do the DMA mode setup. |
| 195 | */ | 195 | */ |
| 196 | 196 | ||
| 197 | static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 197 | static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 198 | { | 198 | { |
| 199 | static const u8 udma_data[] = { | 199 | static const u8 udma_data[] = { |
| 200 | 0x31, 0x21, 0x11, 0x25, 0x15, 0x05 | 200 | 0x31, 0x21, 0x11, 0x25, 0x15, 0x05 |
| 201 | }; | 201 | }; |
| 202 | static const u8 mwdma_data[] = { | 202 | static const u8 mwdma_data[] = { |
| 203 | 0x30, 0x20, 0x10 | 203 | 0x30, 0x20, 0x10 |
| 204 | }; | 204 | }; |
| 205 | 205 | ||
| 206 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 206 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 207 | u8 regU, regD; | 207 | u8 regU, regD; |
| 208 | 208 | ||
| 209 | int pciU = UDIDETCR0 + 8 * ap->port_no; | 209 | int pciU = UDIDETCR0 + 8 * ap->port_no; |
| 210 | int pciD = BMIDESR0 + 8 * ap->port_no; | 210 | int pciD = BMIDESR0 + 8 * ap->port_no; |
| 211 | int shift = 2 * adev->devno; | 211 | int shift = 2 * adev->devno; |
| 212 | 212 | ||
| 213 | pci_read_config_byte(pdev, pciD, ®D); | 213 | pci_read_config_byte(pdev, pciD, ®D); |
| 214 | pci_read_config_byte(pdev, pciU, ®U); | 214 | pci_read_config_byte(pdev, pciU, ®U); |
| 215 | 215 | ||
| 216 | regD &= ~(0x20 << shift); | 216 | regD &= ~(0x20 << shift); |
| 217 | regU &= ~(0x35 << shift); | 217 | regU &= ~(0x35 << shift); |
| 218 | 218 | ||
| 219 | if (adev->dma_mode >= XFER_UDMA_0) | 219 | if (adev->dma_mode >= XFER_UDMA_0) |
| 220 | regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; | 220 | regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; |
| 221 | else | 221 | else |
| @@ -241,13 +241,13 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 241 | u8 dma_intr; | 241 | u8 dma_intr; |
| 242 | int dma_reg = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; | 242 | int dma_reg = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; |
| 243 | int dma_mask = ap->port_no ? ARTTIM2 : CFR; | 243 | int dma_mask = ap->port_no ? ARTTIM2 : CFR; |
| 244 | 244 | ||
| 245 | ata_bmdma_stop(qc); | 245 | ata_bmdma_stop(qc); |
| 246 | 246 | ||
| 247 | pci_read_config_byte(pdev, dma_reg, &dma_intr); | 247 | pci_read_config_byte(pdev, dma_reg, &dma_intr); |
| 248 | pci_write_config_byte(pdev, dma_reg, dma_intr | dma_mask); | 248 | pci_write_config_byte(pdev, dma_reg, dma_intr | dma_mask); |
| 249 | } | 249 | } |
| 250 | 250 | ||
| 251 | /** | 251 | /** |
| 252 | * cmd646r1_dma_stop - DMA stop callback | 252 | * cmd646r1_dma_stop - DMA stop callback |
| 253 | * @qc: Command in progress | 253 | * @qc: Command in progress |
| @@ -259,7 +259,7 @@ static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 259 | { | 259 | { |
| 260 | ata_bmdma_stop(qc); | 260 | ata_bmdma_stop(qc); |
| 261 | } | 261 | } |
| 262 | 262 | ||
| 263 | static struct scsi_host_template cmd64x_sht = { | 263 | static struct scsi_host_template cmd64x_sht = { |
| 264 | .module = THIS_MODULE, | 264 | .module = THIS_MODULE, |
| 265 | .name = DRV_NAME, | 265 | .name = DRV_NAME, |
| @@ -306,11 +306,11 @@ static struct ata_port_operations cmd64x_port_ops = { | |||
| 306 | 306 | ||
| 307 | .irq_handler = ata_interrupt, | 307 | .irq_handler = ata_interrupt, |
| 308 | .irq_clear = ata_bmdma_irq_clear, | 308 | .irq_clear = ata_bmdma_irq_clear, |
| 309 | 309 | ||
| 310 | .port_start = ata_port_start, | 310 | .port_start = ata_port_start, |
| 311 | .port_stop = ata_port_stop, | 311 | .port_stop = ata_port_stop, |
| 312 | .host_stop = ata_host_stop | 312 | .host_stop = ata_host_stop |
| 313 | }; | 313 | }; |
| 314 | 314 | ||
| 315 | static struct ata_port_operations cmd646r1_port_ops = { | 315 | static struct ata_port_operations cmd646r1_port_ops = { |
| 316 | .port_disable = ata_port_disable, | 316 | .port_disable = ata_port_disable, |
| @@ -340,11 +340,11 @@ static struct ata_port_operations cmd646r1_port_ops = { | |||
| 340 | 340 | ||
| 341 | .irq_handler = ata_interrupt, | 341 | .irq_handler = ata_interrupt, |
| 342 | .irq_clear = ata_bmdma_irq_clear, | 342 | .irq_clear = ata_bmdma_irq_clear, |
| 343 | 343 | ||
| 344 | .port_start = ata_port_start, | 344 | .port_start = ata_port_start, |
| 345 | .port_stop = ata_port_stop, | 345 | .port_stop = ata_port_stop, |
| 346 | .host_stop = ata_host_stop | 346 | .host_stop = ata_host_stop |
| 347 | }; | 347 | }; |
| 348 | 348 | ||
| 349 | static struct ata_port_operations cmd648_port_ops = { | 349 | static struct ata_port_operations cmd648_port_ops = { |
| 350 | .port_disable = ata_port_disable, | 350 | .port_disable = ata_port_disable, |
| @@ -374,16 +374,16 @@ static struct ata_port_operations cmd648_port_ops = { | |||
| 374 | 374 | ||
| 375 | .irq_handler = ata_interrupt, | 375 | .irq_handler = ata_interrupt, |
| 376 | .irq_clear = ata_bmdma_irq_clear, | 376 | .irq_clear = ata_bmdma_irq_clear, |
| 377 | 377 | ||
| 378 | .port_start = ata_port_start, | 378 | .port_start = ata_port_start, |
| 379 | .port_stop = ata_port_stop, | 379 | .port_stop = ata_port_stop, |
| 380 | .host_stop = ata_host_stop | 380 | .host_stop = ata_host_stop |
| 381 | }; | 381 | }; |
| 382 | 382 | ||
| 383 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 383 | static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
| 384 | { | 384 | { |
| 385 | u32 class_rev; | 385 | u32 class_rev; |
| 386 | 386 | ||
| 387 | static struct ata_port_info cmd_info[6] = { | 387 | static struct ata_port_info cmd_info[6] = { |
| 388 | { /* CMD 643 - no UDMA */ | 388 | { /* CMD 643 - no UDMA */ |
| 389 | .sht = &cmd64x_sht, | 389 | .sht = &cmd64x_sht, |
| @@ -433,15 +433,15 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 433 | }; | 433 | }; |
| 434 | static struct ata_port_info *port_info[2], *info; | 434 | static struct ata_port_info *port_info[2], *info; |
| 435 | u8 mrdmode; | 435 | u8 mrdmode; |
| 436 | 436 | ||
| 437 | info = &cmd_info[id->driver_data]; | 437 | info = &cmd_info[id->driver_data]; |
| 438 | 438 | ||
| 439 | pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); | 439 | pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); |
| 440 | class_rev &= 0xFF; | 440 | class_rev &= 0xFF; |
| 441 | 441 | ||
| 442 | if (id->driver_data == 0) /* 643 */ | 442 | if (id->driver_data == 0) /* 643 */ |
| 443 | ata_pci_clear_simplex(pdev); | 443 | ata_pci_clear_simplex(pdev); |
| 444 | 444 | ||
| 445 | if (pdev->device == PCI_DEVICE_ID_CMD_646) { | 445 | if (pdev->device == PCI_DEVICE_ID_CMD_646) { |
| 446 | /* Does UDMA work ? */ | 446 | /* Does UDMA work ? */ |
| 447 | if (class_rev > 4) | 447 | if (class_rev > 4) |
| @@ -456,14 +456,14 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 456 | mrdmode &= ~ 0x30; /* IRQ set up */ | 456 | mrdmode &= ~ 0x30; /* IRQ set up */ |
| 457 | mrdmode |= 0x02; /* Memory read line enable */ | 457 | mrdmode |= 0x02; /* Memory read line enable */ |
| 458 | pci_write_config_byte(pdev, MRDMODE, mrdmode); | 458 | pci_write_config_byte(pdev, MRDMODE, mrdmode); |
| 459 | 459 | ||
| 460 | /* Force PIO 0 here.. */ | 460 | /* Force PIO 0 here.. */ |
| 461 | 461 | ||
| 462 | /* PPC specific fixup copied from old driver */ | 462 | /* PPC specific fixup copied from old driver */ |
| 463 | #ifdef CONFIG_PPC | 463 | #ifdef CONFIG_PPC |
| 464 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); | 464 | pci_write_config_byte(pdev, UDIDETCR0, 0xF0); |
| 465 | #endif | 465 | #endif |
| 466 | 466 | ||
| 467 | port_info[0] = port_info[1] = info; | 467 | port_info[0] = port_info[1] = info; |
| 468 | return ata_pci_init_one(pdev, port_info, 2); | 468 | return ata_pci_init_one(pdev, port_info, 2); |
| 469 | } | 469 | } |
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c index 322043d8cf7f..fd55474e0d15 100644 --- a/drivers/ata/pata_cypress.c +++ b/drivers/ata/pata_cypress.c | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 | 7 | * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 |
| 8 | * | 8 | * |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
| 12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| 13 | #include <linux/pci.h> | 13 | #include <linux/pci.h> |
| @@ -59,7 +59,7 @@ static void cy82c693_error_handler(struct ata_port *ap) | |||
| 59 | * | 59 | * |
| 60 | * Called to do the PIO mode setup. | 60 | * Called to do the PIO mode setup. |
| 61 | */ | 61 | */ |
| 62 | 62 | ||
| 63 | static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) | 63 | static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 64 | { | 64 | { |
| 65 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 65 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -67,7 +67,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 67 | const unsigned long T = 1000000 / 33; | 67 | const unsigned long T = 1000000 / 33; |
| 68 | short time_16, time_8; | 68 | short time_16, time_8; |
| 69 | u32 addr; | 69 | u32 addr; |
| 70 | 70 | ||
| 71 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { | 71 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { |
| 72 | printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); | 72 | printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); |
| 73 | return; | 73 | return; |
| @@ -75,20 +75,20 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 75 | 75 | ||
| 76 | time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4); | 76 | time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4); |
| 77 | time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4); | 77 | time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4); |
| 78 | 78 | ||
| 79 | if (adev->devno == 0) { | 79 | if (adev->devno == 0) { |
| 80 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | 80 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); |
| 81 | 81 | ||
| 82 | addr &= ~0x0F; /* Mask bits */ | 82 | addr &= ~0x0F; /* Mask bits */ |
| 83 | addr |= FIT(t.setup, 0, 15); | 83 | addr |= FIT(t.setup, 0, 15); |
| 84 | 84 | ||
| 85 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); | 85 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); |
| 86 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); | 86 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); |
| 87 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16); | 87 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16); |
| 88 | pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8); | 88 | pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8); |
| 89 | } else { | 89 | } else { |
| 90 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | 90 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); |
| 91 | 91 | ||
| 92 | addr &= ~0xF0; /* Mask bits */ | 92 | addr &= ~0xF0; /* Mask bits */ |
| 93 | addr |= (FIT(t.setup, 0, 15) << 4); | 93 | addr |= (FIT(t.setup, 0, 15) << 4); |
| 94 | 94 | ||
| @@ -106,15 +106,15 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 106 | * | 106 | * |
| 107 | * Called to do the DMA mode setup. | 107 | * Called to do the DMA mode setup. |
| 108 | */ | 108 | */ |
| 109 | 109 | ||
| 110 | static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 110 | static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 111 | { | 111 | { |
| 112 | int reg = CY82_INDEX_CHANNEL0 + ap->port_no; | 112 | int reg = CY82_INDEX_CHANNEL0 + ap->port_no; |
| 113 | 113 | ||
| 114 | /* Be afraid, be very afraid. Magic registers in low I/O space */ | 114 | /* Be afraid, be very afraid. Magic registers in low I/O space */ |
| 115 | outb(reg, 0x22); | 115 | outb(reg, 0x22); |
| 116 | outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); | 116 | outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); |
| 117 | 117 | ||
| 118 | /* 0x50 gives the best behaviour on the Alpha's using this chip */ | 118 | /* 0x50 gives the best behaviour on the Alpha's using this chip */ |
| 119 | outb(CY82_INDEX_TIMEOUT, 0x22); | 119 | outb(CY82_INDEX_TIMEOUT, 0x22); |
| 120 | outb(0x50, 0x23); | 120 | outb(0x50, 0x23); |
| @@ -143,7 +143,7 @@ static struct ata_port_operations cy82c693_port_ops = { | |||
| 143 | .set_piomode = cy82c693_set_piomode, | 143 | .set_piomode = cy82c693_set_piomode, |
| 144 | .set_dmamode = cy82c693_set_dmamode, | 144 | .set_dmamode = cy82c693_set_dmamode, |
| 145 | .mode_filter = ata_pci_default_filter, | 145 | .mode_filter = ata_pci_default_filter, |
| 146 | 146 | ||
| 147 | .tf_load = ata_tf_load, | 147 | .tf_load = ata_tf_load, |
| 148 | .tf_read = ata_tf_read, | 148 | .tf_read = ata_tf_read, |
| 149 | .check_status = ata_check_status, | 149 | .check_status = ata_check_status, |
| @@ -167,11 +167,11 @@ static struct ata_port_operations cy82c693_port_ops = { | |||
| 167 | 167 | ||
| 168 | .irq_handler = ata_interrupt, | 168 | .irq_handler = ata_interrupt, |
| 169 | .irq_clear = ata_bmdma_irq_clear, | 169 | .irq_clear = ata_bmdma_irq_clear, |
| 170 | 170 | ||
| 171 | .port_start = ata_port_start, | 171 | .port_start = ata_port_start, |
| 172 | .port_stop = ata_port_stop, | 172 | .port_stop = ata_port_stop, |
| 173 | .host_stop = ata_host_stop | 173 | .host_stop = ata_host_stop |
| 174 | }; | 174 | }; |
| 175 | 175 | ||
| 176 | static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 176 | static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
| 177 | { | 177 | { |
| @@ -183,13 +183,13 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i | |||
| 183 | .port_ops = &cy82c693_port_ops | 183 | .port_ops = &cy82c693_port_ops |
| 184 | }; | 184 | }; |
| 185 | static struct ata_port_info *port_info[1] = { &info }; | 185 | static struct ata_port_info *port_info[1] = { &info }; |
| 186 | 186 | ||
| 187 | /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. For the | 187 | /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. For the |
| 188 | moment we don't handle the secondary. FIXME */ | 188 | moment we don't handle the secondary. FIXME */ |
| 189 | 189 | ||
| 190 | if (PCI_FUNC(pdev->devfn) != 1) | 190 | if (PCI_FUNC(pdev->devfn) != 1) |
| 191 | return -ENODEV; | 191 | return -ENODEV; |
| 192 | 192 | ||
| 193 | return ata_pci_init_one(pdev, port_info, 1); | 193 | return ata_pci_init_one(pdev, port_info, 1); |
| 194 | } | 194 | } |
| 195 | 195 | ||
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index e54a0c51681d..94bb1dfc3f19 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c | |||
| @@ -168,7 +168,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons | |||
| 168 | 168 | ||
| 169 | while(list[i] != NULL) { | 169 | while(list[i] != NULL) { |
| 170 | if (!strncmp(list[i], s, len)) { | 170 | if (!strncmp(list[i], s, len)) { |
| 171 | printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", | 171 | printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", |
| 172 | modestr, list[i]); | 172 | modestr, list[i]); |
| 173 | return 1; | 173 | return 1; |
| 174 | } | 174 | } |
| @@ -184,7 +184,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons | |||
| 184 | * | 184 | * |
| 185 | * Block UDMA on devices that cause trouble with this controller. | 185 | * Block UDMA on devices that cause trouble with this controller. |
| 186 | */ | 186 | */ |
| 187 | 187 | ||
| 188 | static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) | 188 | static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) |
| 189 | { | 189 | { |
| 190 | if (adev->class == ATA_DEV_ATA) { | 190 | if (adev->class == ATA_DEV_ATA) { |
| @@ -206,11 +206,11 @@ static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device | |||
| 206 | * Return the 32bit register programming information for this channel | 206 | * Return the 32bit register programming information for this channel |
| 207 | * that matches the speed provided. | 207 | * that matches the speed provided. |
| 208 | */ | 208 | */ |
| 209 | 209 | ||
| 210 | static u32 hpt36x_find_mode(struct ata_port *ap, int speed) | 210 | static u32 hpt36x_find_mode(struct ata_port *ap, int speed) |
| 211 | { | 211 | { |
| 212 | struct hpt_clock *clocks = ap->host->private_data; | 212 | struct hpt_clock *clocks = ap->host->private_data; |
| 213 | 213 | ||
| 214 | while(clocks->xfer_speed) { | 214 | while(clocks->xfer_speed) { |
| 215 | if (clocks->xfer_speed == speed) | 215 | if (clocks->xfer_speed == speed) |
| 216 | return clocks->timing; | 216 | return clocks->timing; |
| @@ -219,12 +219,12 @@ static u32 hpt36x_find_mode(struct ata_port *ap, int speed) | |||
| 219 | BUG(); | 219 | BUG(); |
| 220 | return 0xffffffffU; /* silence compiler warning */ | 220 | return 0xffffffffU; /* silence compiler warning */ |
| 221 | } | 221 | } |
| 222 | 222 | ||
| 223 | static int hpt36x_pre_reset(struct ata_port *ap) | 223 | static int hpt36x_pre_reset(struct ata_port *ap) |
| 224 | { | 224 | { |
| 225 | u8 ata66; | 225 | u8 ata66; |
| 226 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 226 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 227 | 227 | ||
| 228 | pci_read_config_byte(pdev, 0x5A, &ata66); | 228 | pci_read_config_byte(pdev, 0x5A, &ata66); |
| 229 | if (ata66 & (1 << ap->port_no)) | 229 | if (ata66 & (1 << ap->port_no)) |
| 230 | ap->cbl = ATA_CBL_PATA40; | 230 | ap->cbl = ATA_CBL_PATA40; |
| @@ -239,7 +239,7 @@ static int hpt36x_pre_reset(struct ata_port *ap) | |||
| 239 | * | 239 | * |
| 240 | * Perform the reset handling for the 366/368 | 240 | * Perform the reset handling for the 366/368 |
| 241 | */ | 241 | */ |
| 242 | 242 | ||
| 243 | static void hpt36x_error_handler(struct ata_port *ap) | 243 | static void hpt36x_error_handler(struct ata_port *ap) |
| 244 | { | 244 | { |
| 245 | ata_bmdma_drive_eh(ap, hpt36x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | 245 | ata_bmdma_drive_eh(ap, hpt36x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| @@ -250,9 +250,9 @@ static void hpt36x_error_handler(struct ata_port *ap) | |||
| 250 | * @ap: ATA interface | 250 | * @ap: ATA interface |
| 251 | * @adev: device on the interface | 251 | * @adev: device on the interface |
| 252 | * | 252 | * |
| 253 | * Perform PIO mode setup. | 253 | * Perform PIO mode setup. |
| 254 | */ | 254 | */ |
| 255 | 255 | ||
| 256 | static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) | 256 | static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 257 | { | 257 | { |
| 258 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 258 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -263,14 +263,14 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 263 | 263 | ||
| 264 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 264 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 265 | addr2 = 0x51 + 4 * ap->port_no; | 265 | addr2 = 0x51 + 4 * ap->port_no; |
| 266 | 266 | ||
| 267 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 267 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 268 | pci_read_config_byte(pdev, addr2, &fast); | 268 | pci_read_config_byte(pdev, addr2, &fast); |
| 269 | if (fast & 0x80) { | 269 | if (fast & 0x80) { |
| 270 | fast &= ~0x80; | 270 | fast &= ~0x80; |
| 271 | pci_write_config_byte(pdev, addr2, fast); | 271 | pci_write_config_byte(pdev, addr2, fast); |
| 272 | } | 272 | } |
| 273 | 273 | ||
| 274 | pci_read_config_dword(pdev, addr1, ®); | 274 | pci_read_config_dword(pdev, addr1, ®); |
| 275 | mode = hpt36x_find_mode(ap, adev->pio_mode); | 275 | mode = hpt36x_find_mode(ap, adev->pio_mode); |
| 276 | mode &= ~0x8000000; /* No FIFO in PIO */ | 276 | mode &= ~0x8000000; /* No FIFO in PIO */ |
| @@ -287,7 +287,7 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 287 | * Set up the channel for MWDMA or UDMA modes. Much the same as with | 287 | * Set up the channel for MWDMA or UDMA modes. Much the same as with |
| 288 | * PIO, load the mode number and then set MWDMA or UDMA flag. | 288 | * PIO, load the mode number and then set MWDMA or UDMA flag. |
| 289 | */ | 289 | */ |
| 290 | 290 | ||
| 291 | static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 291 | static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 292 | { | 292 | { |
| 293 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 293 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -298,14 +298,14 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 298 | 298 | ||
| 299 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 299 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 300 | addr2 = 0x51 + 4 * ap->port_no; | 300 | addr2 = 0x51 + 4 * ap->port_no; |
| 301 | 301 | ||
| 302 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 302 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 303 | pci_read_config_byte(pdev, addr2, &fast); | 303 | pci_read_config_byte(pdev, addr2, &fast); |
| 304 | if (fast & 0x80) { | 304 | if (fast & 0x80) { |
| 305 | fast &= ~0x80; | 305 | fast &= ~0x80; |
| 306 | pci_write_config_byte(pdev, addr2, fast); | 306 | pci_write_config_byte(pdev, addr2, fast); |
| 307 | } | 307 | } |
| 308 | 308 | ||
| 309 | pci_read_config_dword(pdev, addr1, ®); | 309 | pci_read_config_dword(pdev, addr1, ®); |
| 310 | mode = hpt36x_find_mode(ap, adev->dma_mode); | 310 | mode = hpt36x_find_mode(ap, adev->dma_mode); |
| 311 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ | 311 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ |
| @@ -335,13 +335,13 @@ static struct scsi_host_template hpt36x_sht = { | |||
| 335 | /* | 335 | /* |
| 336 | * Configuration for HPT366/68 | 336 | * Configuration for HPT366/68 |
| 337 | */ | 337 | */ |
| 338 | 338 | ||
| 339 | static struct ata_port_operations hpt366_port_ops = { | 339 | static struct ata_port_operations hpt366_port_ops = { |
| 340 | .port_disable = ata_port_disable, | 340 | .port_disable = ata_port_disable, |
| 341 | .set_piomode = hpt366_set_piomode, | 341 | .set_piomode = hpt366_set_piomode, |
| 342 | .set_dmamode = hpt366_set_dmamode, | 342 | .set_dmamode = hpt366_set_dmamode, |
| 343 | .mode_filter = hpt366_filter, | 343 | .mode_filter = hpt366_filter, |
| 344 | 344 | ||
| 345 | .tf_load = ata_tf_load, | 345 | .tf_load = ata_tf_load, |
| 346 | .tf_read = ata_tf_read, | 346 | .tf_read = ata_tf_read, |
| 347 | .check_status = ata_check_status, | 347 | .check_status = ata_check_status, |
| @@ -369,7 +369,7 @@ static struct ata_port_operations hpt366_port_ops = { | |||
| 369 | .port_start = ata_port_start, | 369 | .port_start = ata_port_start, |
| 370 | .port_stop = ata_port_stop, | 370 | .port_stop = ata_port_stop, |
| 371 | .host_stop = ata_host_stop | 371 | .host_stop = ata_host_stop |
| 372 | }; | 372 | }; |
| 373 | 373 | ||
| 374 | /** | 374 | /** |
| 375 | * hpt36x_init_one - Initialise an HPT366/368 | 375 | * hpt36x_init_one - Initialise an HPT366/368 |
| @@ -391,7 +391,7 @@ static struct ata_port_operations hpt366_port_ops = { | |||
| 391 | * HPT37x/30x 4 (HPT366) 3+ Other driver | 391 | * HPT37x/30x 4 (HPT366) 3+ Other driver |
| 392 | * | 392 | * |
| 393 | */ | 393 | */ |
| 394 | 394 | ||
| 395 | static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 395 | static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 396 | { | 396 | { |
| 397 | static struct ata_port_info info_hpt366 = { | 397 | static struct ata_port_info info_hpt366 = { |
| @@ -410,7 +410,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 410 | 410 | ||
| 411 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | 411 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); |
| 412 | class_rev &= 0xFF; | 412 | class_rev &= 0xFF; |
| 413 | 413 | ||
| 414 | /* May be a later chip in disguise. Check */ | 414 | /* May be a later chip in disguise. Check */ |
| 415 | /* Newer chips are not in the HPT36x driver. Ignore them */ | 415 | /* Newer chips are not in the HPT36x driver. Ignore them */ |
| 416 | if (class_rev > 2) | 416 | if (class_rev > 2) |
| @@ -426,7 +426,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 426 | pci_write_config_byte(dev, 0x51, drive_fast & ~0x80); | 426 | pci_write_config_byte(dev, 0x51, drive_fast & ~0x80); |
| 427 | 427 | ||
| 428 | pci_read_config_dword(dev, 0x40, ®1); | 428 | pci_read_config_dword(dev, 0x40, ®1); |
| 429 | 429 | ||
| 430 | /* PCI clocking determines the ATA timing values to use */ | 430 | /* PCI clocking determines the ATA timing values to use */ |
| 431 | /* info_hpt366 is safe against re-entry so we can scribble on it */ | 431 | /* info_hpt366 is safe against re-entry so we can scribble on it */ |
| 432 | switch(reg1 & 0x700) { | 432 | switch(reg1 & 0x700) { |
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c index 7c3da53f1e0c..532a7928f803 100644 --- a/drivers/ata/pata_hpt37x.c +++ b/drivers/ata/pata_hpt37x.c | |||
| @@ -134,7 +134,7 @@ static const struct hpt_clock hpt370a_timings_66[] = { | |||
| 134 | { XFER_UDMA_0, 0x14a0e73f }, | 134 | { XFER_UDMA_0, 0x14a0e73f }, |
| 135 | 135 | ||
| 136 | { XFER_MW_DMA_2, 0x2480fa73 }, | 136 | { XFER_MW_DMA_2, 0x2480fa73 }, |
| 137 | { XFER_MW_DMA_1, 0x2480fa77 }, | 137 | { XFER_MW_DMA_1, 0x2480fa77 }, |
| 138 | { XFER_MW_DMA_0, 0x2480fb3f }, | 138 | { XFER_MW_DMA_0, 0x2480fb3f }, |
| 139 | 139 | ||
| 140 | { XFER_PIO_4, 0x0c82be73 }, | 140 | { XFER_PIO_4, 0x0c82be73 }, |
| @@ -333,11 +333,11 @@ static const struct hpt_chip hpt374 = { | |||
| 333 | * Return the 32bit register programming information for this channel | 333 | * Return the 32bit register programming information for this channel |
| 334 | * that matches the speed provided. | 334 | * that matches the speed provided. |
| 335 | */ | 335 | */ |
| 336 | 336 | ||
| 337 | static u32 hpt37x_find_mode(struct ata_port *ap, int speed) | 337 | static u32 hpt37x_find_mode(struct ata_port *ap, int speed) |
| 338 | { | 338 | { |
| 339 | struct hpt_clock *clocks = ap->host->private_data; | 339 | struct hpt_clock *clocks = ap->host->private_data; |
| 340 | 340 | ||
| 341 | while(clocks->xfer_speed) { | 341 | while(clocks->xfer_speed) { |
| 342 | if (clocks->xfer_speed == speed) | 342 | if (clocks->xfer_speed == speed) |
| 343 | return clocks->timing; | 343 | return clocks->timing; |
| @@ -367,7 +367,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons | |||
| 367 | 367 | ||
| 368 | while(list[i] != NULL) { | 368 | while(list[i] != NULL) { |
| 369 | if (!strncmp(list[i], s, len)) { | 369 | if (!strncmp(list[i], s, len)) { |
| 370 | printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", | 370 | printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", |
| 371 | modestr, list[i]); | 371 | modestr, list[i]); |
| 372 | return 1; | 372 | return 1; |
| 373 | } | 373 | } |
| @@ -413,7 +413,7 @@ static const char *bad_ata100_5[] = { | |||
| 413 | * | 413 | * |
| 414 | * Block UDMA on devices that cause trouble with this controller. | 414 | * Block UDMA on devices that cause trouble with this controller. |
| 415 | */ | 415 | */ |
| 416 | 416 | ||
| 417 | static unsigned long hpt370_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) | 417 | static unsigned long hpt370_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) |
| 418 | { | 418 | { |
| 419 | if (adev->class != ATA_DEV_ATA) { | 419 | if (adev->class != ATA_DEV_ATA) { |
| @@ -432,7 +432,7 @@ static unsigned long hpt370_filter(const struct ata_port *ap, struct ata_device | |||
| 432 | * | 432 | * |
| 433 | * Block UDMA on devices that cause trouble with this controller. | 433 | * Block UDMA on devices that cause trouble with this controller. |
| 434 | */ | 434 | */ |
| 435 | 435 | ||
| 436 | static unsigned long hpt370a_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) | 436 | static unsigned long hpt370a_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) |
| 437 | { | 437 | { |
| 438 | if (adev->class != ATA_DEV_ATA) { | 438 | if (adev->class != ATA_DEV_ATA) { |
| @@ -441,36 +441,36 @@ static unsigned long hpt370a_filter(const struct ata_port *ap, struct ata_device | |||
| 441 | } | 441 | } |
| 442 | return ata_pci_default_filter(ap, adev, mask); | 442 | return ata_pci_default_filter(ap, adev, mask); |
| 443 | } | 443 | } |
| 444 | 444 | ||
| 445 | /** | 445 | /** |
| 446 | * hpt37x_pre_reset - reset the hpt37x bus | 446 | * hpt37x_pre_reset - reset the hpt37x bus |
| 447 | * @ap: ATA port to reset | 447 | * @ap: ATA port to reset |
| 448 | * | 448 | * |
| 449 | * Perform the initial reset handling for the 370/372 and 374 func 0 | 449 | * Perform the initial reset handling for the 370/372 and 374 func 0 |
| 450 | */ | 450 | */ |
| 451 | 451 | ||
| 452 | static int hpt37x_pre_reset(struct ata_port *ap) | 452 | static int hpt37x_pre_reset(struct ata_port *ap) |
| 453 | { | 453 | { |
| 454 | u8 scr2, ata66; | 454 | u8 scr2, ata66; |
| 455 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 455 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 456 | 456 | ||
| 457 | pci_read_config_byte(pdev, 0x5B, &scr2); | 457 | pci_read_config_byte(pdev, 0x5B, &scr2); |
| 458 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); | 458 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); |
| 459 | /* Cable register now active */ | 459 | /* Cable register now active */ |
| 460 | pci_read_config_byte(pdev, 0x5A, &ata66); | 460 | pci_read_config_byte(pdev, 0x5A, &ata66); |
| 461 | /* Restore state */ | 461 | /* Restore state */ |
| 462 | pci_write_config_byte(pdev, 0x5B, scr2); | 462 | pci_write_config_byte(pdev, 0x5B, scr2); |
| 463 | 463 | ||
| 464 | if (ata66 & (1 << ap->port_no)) | 464 | if (ata66 & (1 << ap->port_no)) |
| 465 | ap->cbl = ATA_CBL_PATA40; | 465 | ap->cbl = ATA_CBL_PATA40; |
| 466 | else | 466 | else |
| 467 | ap->cbl = ATA_CBL_PATA80; | 467 | ap->cbl = ATA_CBL_PATA80; |
| 468 | 468 | ||
| 469 | /* Reset the state machine */ | 469 | /* Reset the state machine */ |
| 470 | pci_write_config_byte(pdev, 0x50, 0x37); | 470 | pci_write_config_byte(pdev, 0x50, 0x37); |
| 471 | pci_write_config_byte(pdev, 0x54, 0x37); | 471 | pci_write_config_byte(pdev, 0x54, 0x37); |
| 472 | udelay(100); | 472 | udelay(100); |
| 473 | 473 | ||
| 474 | return ata_std_prereset(ap); | 474 | return ata_std_prereset(ap); |
| 475 | } | 475 | } |
| 476 | 476 | ||
| @@ -480,7 +480,7 @@ static int hpt37x_pre_reset(struct ata_port *ap) | |||
| 480 | * | 480 | * |
| 481 | * Perform probe for HPT37x, except for HPT374 channel 2 | 481 | * Perform probe for HPT37x, except for HPT374 channel 2 |
| 482 | */ | 482 | */ |
| 483 | 483 | ||
| 484 | static void hpt37x_error_handler(struct ata_port *ap) | 484 | static void hpt37x_error_handler(struct ata_port *ap) |
| 485 | { | 485 | { |
| 486 | ata_bmdma_drive_eh(ap, hpt37x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | 486 | ata_bmdma_drive_eh(ap, hpt37x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| @@ -490,7 +490,7 @@ static int hpt374_pre_reset(struct ata_port *ap) | |||
| 490 | { | 490 | { |
| 491 | u16 mcr3, mcr6; | 491 | u16 mcr3, mcr6; |
| 492 | u8 ata66; | 492 | u8 ata66; |
| 493 | 493 | ||
| 494 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 494 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 495 | /* Do the extra channel work */ | 495 | /* Do the extra channel work */ |
| 496 | pci_read_config_word(pdev, 0x52, &mcr3); | 496 | pci_read_config_word(pdev, 0x52, &mcr3); |
| @@ -504,17 +504,17 @@ static int hpt374_pre_reset(struct ata_port *ap) | |||
| 504 | /* Reset TCBLID/FCBLID to output */ | 504 | /* Reset TCBLID/FCBLID to output */ |
| 505 | pci_write_config_word(pdev, 0x52, mcr3); | 505 | pci_write_config_word(pdev, 0x52, mcr3); |
| 506 | pci_write_config_word(pdev, 0x56, mcr6); | 506 | pci_write_config_word(pdev, 0x56, mcr6); |
| 507 | 507 | ||
| 508 | if (ata66 & (1 << ap->port_no)) | 508 | if (ata66 & (1 << ap->port_no)) |
| 509 | ap->cbl = ATA_CBL_PATA40; | 509 | ap->cbl = ATA_CBL_PATA40; |
| 510 | else | 510 | else |
| 511 | ap->cbl = ATA_CBL_PATA80; | 511 | ap->cbl = ATA_CBL_PATA80; |
| 512 | 512 | ||
| 513 | /* Reset the state machine */ | 513 | /* Reset the state machine */ |
| 514 | pci_write_config_byte(pdev, 0x50, 0x37); | 514 | pci_write_config_byte(pdev, 0x50, 0x37); |
| 515 | pci_write_config_byte(pdev, 0x54, 0x37); | 515 | pci_write_config_byte(pdev, 0x54, 0x37); |
| 516 | udelay(100); | 516 | udelay(100); |
| 517 | 517 | ||
| 518 | return ata_std_prereset(ap); | 518 | return ata_std_prereset(ap); |
| 519 | } | 519 | } |
| 520 | 520 | ||
| @@ -526,11 +526,11 @@ static int hpt374_pre_reset(struct ata_port *ap) | |||
| 526 | * channels. The function 0 channels work like usual but function 1 | 526 | * channels. The function 0 channels work like usual but function 1 |
| 527 | * is special | 527 | * is special |
| 528 | */ | 528 | */ |
| 529 | 529 | ||
| 530 | static void hpt374_error_handler(struct ata_port *ap) | 530 | static void hpt374_error_handler(struct ata_port *ap) |
| 531 | { | 531 | { |
| 532 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 532 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 533 | 533 | ||
| 534 | if (!(PCI_FUNC(pdev->devfn) & 1)) | 534 | if (!(PCI_FUNC(pdev->devfn) & 1)) |
| 535 | hpt37x_error_handler(ap); | 535 | hpt37x_error_handler(ap); |
| 536 | else | 536 | else |
| @@ -542,9 +542,9 @@ static void hpt374_error_handler(struct ata_port *ap) | |||
| 542 | * @ap: ATA interface | 542 | * @ap: ATA interface |
| 543 | * @adev: device on the interface | 543 | * @adev: device on the interface |
| 544 | * | 544 | * |
| 545 | * Perform PIO mode setup. | 545 | * Perform PIO mode setup. |
| 546 | */ | 546 | */ |
| 547 | 547 | ||
| 548 | static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) | 548 | static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 549 | { | 549 | { |
| 550 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 550 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -555,13 +555,13 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 555 | 555 | ||
| 556 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 556 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 557 | addr2 = 0x51 + 4 * ap->port_no; | 557 | addr2 = 0x51 + 4 * ap->port_no; |
| 558 | 558 | ||
| 559 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 559 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 560 | pci_read_config_byte(pdev, addr2, &fast); | 560 | pci_read_config_byte(pdev, addr2, &fast); |
| 561 | fast &= ~0x02; | 561 | fast &= ~0x02; |
| 562 | fast |= 0x01; | 562 | fast |= 0x01; |
| 563 | pci_write_config_byte(pdev, addr2, fast); | 563 | pci_write_config_byte(pdev, addr2, fast); |
| 564 | 564 | ||
| 565 | pci_read_config_dword(pdev, addr1, ®); | 565 | pci_read_config_dword(pdev, addr1, ®); |
| 566 | mode = hpt37x_find_mode(ap, adev->pio_mode); | 566 | mode = hpt37x_find_mode(ap, adev->pio_mode); |
| 567 | mode &= ~0x8000000; /* No FIFO in PIO */ | 567 | mode &= ~0x8000000; /* No FIFO in PIO */ |
| @@ -578,7 +578,7 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 578 | * Set up the channel for MWDMA or UDMA modes. Much the same as with | 578 | * Set up the channel for MWDMA or UDMA modes. Much the same as with |
| 579 | * PIO, load the mode number and then set MWDMA or UDMA flag. | 579 | * PIO, load the mode number and then set MWDMA or UDMA flag. |
| 580 | */ | 580 | */ |
| 581 | 581 | ||
| 582 | static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 582 | static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 583 | { | 583 | { |
| 584 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 584 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -589,13 +589,13 @@ static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 589 | 589 | ||
| 590 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 590 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 591 | addr2 = 0x51 + 4 * ap->port_no; | 591 | addr2 = 0x51 + 4 * ap->port_no; |
| 592 | 592 | ||
| 593 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 593 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 594 | pci_read_config_byte(pdev, addr2, &fast); | 594 | pci_read_config_byte(pdev, addr2, &fast); |
| 595 | fast &= ~0x02; | 595 | fast &= ~0x02; |
| 596 | fast |= 0x01; | 596 | fast |= 0x01; |
| 597 | pci_write_config_byte(pdev, addr2, fast); | 597 | pci_write_config_byte(pdev, addr2, fast); |
| 598 | 598 | ||
| 599 | pci_read_config_dword(pdev, addr1, ®); | 599 | pci_read_config_dword(pdev, addr1, ®); |
| 600 | mode = hpt37x_find_mode(ap, adev->dma_mode); | 600 | mode = hpt37x_find_mode(ap, adev->dma_mode); |
| 601 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ | 601 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ |
| @@ -611,7 +611,7 @@ static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 611 | * The 370 and 370A want us to reset the DMA engine each time we | 611 | * The 370 and 370A want us to reset the DMA engine each time we |
| 612 | * use it. The 372 and later are fine. | 612 | * use it. The 372 and later are fine. |
| 613 | */ | 613 | */ |
| 614 | 614 | ||
| 615 | static void hpt370_bmdma_start(struct ata_queued_cmd *qc) | 615 | static void hpt370_bmdma_start(struct ata_queued_cmd *qc) |
| 616 | { | 616 | { |
| 617 | struct ata_port *ap = qc->ap; | 617 | struct ata_port *ap = qc->ap; |
| @@ -627,7 +627,7 @@ static void hpt370_bmdma_start(struct ata_queued_cmd *qc) | |||
| 627 | * | 627 | * |
| 628 | * Work around the HPT370 DMA engine. | 628 | * Work around the HPT370 DMA engine. |
| 629 | */ | 629 | */ |
| 630 | 630 | ||
| 631 | static void hpt370_bmdma_stop(struct ata_queued_cmd *qc) | 631 | static void hpt370_bmdma_stop(struct ata_queued_cmd *qc) |
| 632 | { | 632 | { |
| 633 | struct ata_port *ap = qc->ap; | 633 | struct ata_port *ap = qc->ap; |
| @@ -635,7 +635,7 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 635 | u8 dma_stat = inb(ap->ioaddr.bmdma_addr + 2); | 635 | u8 dma_stat = inb(ap->ioaddr.bmdma_addr + 2); |
| 636 | u8 dma_cmd; | 636 | u8 dma_cmd; |
| 637 | unsigned long bmdma = ap->ioaddr.bmdma_addr; | 637 | unsigned long bmdma = ap->ioaddr.bmdma_addr; |
| 638 | 638 | ||
| 639 | if (dma_stat & 0x01) { | 639 | if (dma_stat & 0x01) { |
| 640 | udelay(20); | 640 | udelay(20); |
| 641 | dma_stat = inb(bmdma + 2); | 641 | dma_stat = inb(bmdma + 2); |
| @@ -662,9 +662,9 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 662 | * @ap: ATA interface | 662 | * @ap: ATA interface |
| 663 | * @adev: device on the interface | 663 | * @adev: device on the interface |
| 664 | * | 664 | * |
| 665 | * Perform PIO mode setup. | 665 | * Perform PIO mode setup. |
| 666 | */ | 666 | */ |
| 667 | 667 | ||
| 668 | static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) | 668 | static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 669 | { | 669 | { |
| 670 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 670 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -675,15 +675,15 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 675 | 675 | ||
| 676 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 676 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 677 | addr2 = 0x51 + 4 * ap->port_no; | 677 | addr2 = 0x51 + 4 * ap->port_no; |
| 678 | 678 | ||
| 679 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 679 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 680 | pci_read_config_byte(pdev, addr2, &fast); | 680 | pci_read_config_byte(pdev, addr2, &fast); |
| 681 | fast &= ~0x07; | 681 | fast &= ~0x07; |
| 682 | pci_write_config_byte(pdev, addr2, fast); | 682 | pci_write_config_byte(pdev, addr2, fast); |
| 683 | 683 | ||
| 684 | pci_read_config_dword(pdev, addr1, ®); | 684 | pci_read_config_dword(pdev, addr1, ®); |
| 685 | mode = hpt37x_find_mode(ap, adev->pio_mode); | 685 | mode = hpt37x_find_mode(ap, adev->pio_mode); |
| 686 | 686 | ||
| 687 | printk("Find mode for %d reports %X\n", adev->pio_mode, mode); | 687 | printk("Find mode for %d reports %X\n", adev->pio_mode, mode); |
| 688 | mode &= ~0x80000000; /* No FIFO in PIO */ | 688 | mode &= ~0x80000000; /* No FIFO in PIO */ |
| 689 | mode &= ~0x30070000; /* Leave config bits alone */ | 689 | mode &= ~0x30070000; /* Leave config bits alone */ |
| @@ -699,7 +699,7 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 699 | * Set up the channel for MWDMA or UDMA modes. Much the same as with | 699 | * Set up the channel for MWDMA or UDMA modes. Much the same as with |
| 700 | * PIO, load the mode number and then set MWDMA or UDMA flag. | 700 | * PIO, load the mode number and then set MWDMA or UDMA flag. |
| 701 | */ | 701 | */ |
| 702 | 702 | ||
| 703 | static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 703 | static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 704 | { | 704 | { |
| 705 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 705 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -710,12 +710,12 @@ static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 710 | 710 | ||
| 711 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 711 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 712 | addr2 = 0x51 + 4 * ap->port_no; | 712 | addr2 = 0x51 + 4 * ap->port_no; |
| 713 | 713 | ||
| 714 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 714 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 715 | pci_read_config_byte(pdev, addr2, &fast); | 715 | pci_read_config_byte(pdev, addr2, &fast); |
| 716 | fast &= ~0x07; | 716 | fast &= ~0x07; |
| 717 | pci_write_config_byte(pdev, addr2, fast); | 717 | pci_write_config_byte(pdev, addr2, fast); |
| 718 | 718 | ||
| 719 | pci_read_config_dword(pdev, addr1, ®); | 719 | pci_read_config_dword(pdev, addr1, ®); |
| 720 | mode = hpt37x_find_mode(ap, adev->dma_mode); | 720 | mode = hpt37x_find_mode(ap, adev->dma_mode); |
| 721 | printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode); | 721 | printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode); |
| @@ -731,14 +731,14 @@ static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 731 | * | 731 | * |
| 732 | * Clean up after the HPT372 and later DMA engine | 732 | * Clean up after the HPT372 and later DMA engine |
| 733 | */ | 733 | */ |
| 734 | 734 | ||
| 735 | static void hpt37x_bmdma_stop(struct ata_queued_cmd *qc) | 735 | static void hpt37x_bmdma_stop(struct ata_queued_cmd *qc) |
| 736 | { | 736 | { |
| 737 | struct ata_port *ap = qc->ap; | 737 | struct ata_port *ap = qc->ap; |
| 738 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 738 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 739 | int mscreg = 0x50 + 2 * ap->port_no; | 739 | int mscreg = 0x50 + 2 * ap->port_no; |
| 740 | u8 bwsr_stat, msc_stat; | 740 | u8 bwsr_stat, msc_stat; |
| 741 | 741 | ||
| 742 | pci_read_config_byte(pdev, 0x6A, &bwsr_stat); | 742 | pci_read_config_byte(pdev, 0x6A, &bwsr_stat); |
| 743 | pci_read_config_byte(pdev, mscreg, &msc_stat); | 743 | pci_read_config_byte(pdev, mscreg, &msc_stat); |
| 744 | if (bwsr_stat & (1 << ap->port_no)) | 744 | if (bwsr_stat & (1 << ap->port_no)) |
| @@ -768,13 +768,13 @@ static struct scsi_host_template hpt37x_sht = { | |||
| 768 | /* | 768 | /* |
| 769 | * Configuration for HPT370 | 769 | * Configuration for HPT370 |
| 770 | */ | 770 | */ |
| 771 | 771 | ||
| 772 | static struct ata_port_operations hpt370_port_ops = { | 772 | static struct ata_port_operations hpt370_port_ops = { |
| 773 | .port_disable = ata_port_disable, | 773 | .port_disable = ata_port_disable, |
| 774 | .set_piomode = hpt370_set_piomode, | 774 | .set_piomode = hpt370_set_piomode, |
| 775 | .set_dmamode = hpt370_set_dmamode, | 775 | .set_dmamode = hpt370_set_dmamode, |
| 776 | .mode_filter = hpt370_filter, | 776 | .mode_filter = hpt370_filter, |
| 777 | 777 | ||
| 778 | .tf_load = ata_tf_load, | 778 | .tf_load = ata_tf_load, |
| 779 | .tf_read = ata_tf_read, | 779 | .tf_read = ata_tf_read, |
| 780 | .check_status = ata_check_status, | 780 | .check_status = ata_check_status, |
| @@ -802,18 +802,18 @@ static struct ata_port_operations hpt370_port_ops = { | |||
| 802 | .port_start = ata_port_start, | 802 | .port_start = ata_port_start, |
| 803 | .port_stop = ata_port_stop, | 803 | .port_stop = ata_port_stop, |
| 804 | .host_stop = ata_host_stop | 804 | .host_stop = ata_host_stop |
| 805 | }; | 805 | }; |
| 806 | 806 | ||
| 807 | /* | 807 | /* |
| 808 | * Configuration for HPT370A. Close to 370 but less filters | 808 | * Configuration for HPT370A. Close to 370 but less filters |
| 809 | */ | 809 | */ |
| 810 | 810 | ||
| 811 | static struct ata_port_operations hpt370a_port_ops = { | 811 | static struct ata_port_operations hpt370a_port_ops = { |
| 812 | .port_disable = ata_port_disable, | 812 | .port_disable = ata_port_disable, |
| 813 | .set_piomode = hpt370_set_piomode, | 813 | .set_piomode = hpt370_set_piomode, |
| 814 | .set_dmamode = hpt370_set_dmamode, | 814 | .set_dmamode = hpt370_set_dmamode, |
| 815 | .mode_filter = hpt370a_filter, | 815 | .mode_filter = hpt370a_filter, |
| 816 | 816 | ||
| 817 | .tf_load = ata_tf_load, | 817 | .tf_load = ata_tf_load, |
| 818 | .tf_read = ata_tf_read, | 818 | .tf_read = ata_tf_read, |
| 819 | .check_status = ata_check_status, | 819 | .check_status = ata_check_status, |
| @@ -841,19 +841,19 @@ static struct ata_port_operations hpt370a_port_ops = { | |||
| 841 | .port_start = ata_port_start, | 841 | .port_start = ata_port_start, |
| 842 | .port_stop = ata_port_stop, | 842 | .port_stop = ata_port_stop, |
| 843 | .host_stop = ata_host_stop | 843 | .host_stop = ata_host_stop |
| 844 | }; | 844 | }; |
| 845 | 845 | ||
| 846 | /* | 846 | /* |
| 847 | * Configuration for HPT372, HPT371, HPT302. Slightly different PIO | 847 | * Configuration for HPT372, HPT371, HPT302. Slightly different PIO |
| 848 | * and DMA mode setting functionality. | 848 | * and DMA mode setting functionality. |
| 849 | */ | 849 | */ |
| 850 | 850 | ||
| 851 | static struct ata_port_operations hpt372_port_ops = { | 851 | static struct ata_port_operations hpt372_port_ops = { |
| 852 | .port_disable = ata_port_disable, | 852 | .port_disable = ata_port_disable, |
| 853 | .set_piomode = hpt372_set_piomode, | 853 | .set_piomode = hpt372_set_piomode, |
| 854 | .set_dmamode = hpt372_set_dmamode, | 854 | .set_dmamode = hpt372_set_dmamode, |
| 855 | .mode_filter = ata_pci_default_filter, | 855 | .mode_filter = ata_pci_default_filter, |
| 856 | 856 | ||
| 857 | .tf_load = ata_tf_load, | 857 | .tf_load = ata_tf_load, |
| 858 | .tf_read = ata_tf_read, | 858 | .tf_read = ata_tf_read, |
| 859 | .check_status = ata_check_status, | 859 | .check_status = ata_check_status, |
| @@ -881,19 +881,19 @@ static struct ata_port_operations hpt372_port_ops = { | |||
| 881 | .port_start = ata_port_start, | 881 | .port_start = ata_port_start, |
| 882 | .port_stop = ata_port_stop, | 882 | .port_stop = ata_port_stop, |
| 883 | .host_stop = ata_host_stop | 883 | .host_stop = ata_host_stop |
| 884 | }; | 884 | }; |
| 885 | 885 | ||
| 886 | /* | 886 | /* |
| 887 | * Configuration for HPT374. Mode setting works like 372 and friends | 887 | * Configuration for HPT374. Mode setting works like 372 and friends |
| 888 | * but we have a different cable detection procedure. | 888 | * but we have a different cable detection procedure. |
| 889 | */ | 889 | */ |
| 890 | 890 | ||
| 891 | static struct ata_port_operations hpt374_port_ops = { | 891 | static struct ata_port_operations hpt374_port_ops = { |
| 892 | .port_disable = ata_port_disable, | 892 | .port_disable = ata_port_disable, |
| 893 | .set_piomode = hpt372_set_piomode, | 893 | .set_piomode = hpt372_set_piomode, |
| 894 | .set_dmamode = hpt372_set_dmamode, | 894 | .set_dmamode = hpt372_set_dmamode, |
| 895 | .mode_filter = ata_pci_default_filter, | 895 | .mode_filter = ata_pci_default_filter, |
| 896 | 896 | ||
| 897 | .tf_load = ata_tf_load, | 897 | .tf_load = ata_tf_load, |
| 898 | .tf_read = ata_tf_read, | 898 | .tf_read = ata_tf_read, |
| 899 | .check_status = ata_check_status, | 899 | .check_status = ata_check_status, |
| @@ -921,7 +921,7 @@ static struct ata_port_operations hpt374_port_ops = { | |||
| 921 | .port_start = ata_port_start, | 921 | .port_start = ata_port_start, |
| 922 | .port_stop = ata_port_stop, | 922 | .port_stop = ata_port_stop, |
| 923 | .host_stop = ata_host_stop | 923 | .host_stop = ata_host_stop |
| 924 | }; | 924 | }; |
| 925 | 925 | ||
| 926 | /** | 926 | /** |
| 927 | * htp37x_clock_slot - Turn timing to PC clock entry | 927 | * htp37x_clock_slot - Turn timing to PC clock entry |
| @@ -931,7 +931,7 @@ static struct ata_port_operations hpt374_port_ops = { | |||
| 931 | * Turn the timing data intoa clock slot (0 for 33, 1 for 40, 2 for 50 | 931 | * Turn the timing data intoa clock slot (0 for 33, 1 for 40, 2 for 50 |
| 932 | * and 3 for 66Mhz) | 932 | * and 3 for 66Mhz) |
| 933 | */ | 933 | */ |
| 934 | 934 | ||
| 935 | static int hpt37x_clock_slot(unsigned int freq, unsigned int base) | 935 | static int hpt37x_clock_slot(unsigned int freq, unsigned int base) |
| 936 | { | 936 | { |
| 937 | unsigned int f = (base * freq) / 192; /* Mhz */ | 937 | unsigned int f = (base * freq) / 192; /* Mhz */ |
| @@ -946,7 +946,7 @@ static int hpt37x_clock_slot(unsigned int freq, unsigned int base) | |||
| 946 | 946 | ||
| 947 | /** | 947 | /** |
| 948 | * hpt37x_calibrate_dpll - Calibrate the DPLL loop | 948 | * hpt37x_calibrate_dpll - Calibrate the DPLL loop |
| 949 | * @dev: PCI device | 949 | * @dev: PCI device |
| 950 | * | 950 | * |
| 951 | * Perform a calibration cycle on the HPT37x DPLL. Returns 1 if this | 951 | * Perform a calibration cycle on the HPT37x DPLL. Returns 1 if this |
| 952 | * succeeds | 952 | * succeeds |
| @@ -957,7 +957,7 @@ static int hpt37x_calibrate_dpll(struct pci_dev *dev) | |||
| 957 | u8 reg5b; | 957 | u8 reg5b; |
| 958 | u32 reg5c; | 958 | u32 reg5c; |
| 959 | int tries; | 959 | int tries; |
| 960 | 960 | ||
| 961 | for(tries = 0; tries < 0x5000; tries++) { | 961 | for(tries = 0; tries < 0x5000; tries++) { |
| 962 | udelay(50); | 962 | udelay(50); |
| 963 | pci_read_config_byte(dev, 0x5b, ®5b); | 963 | pci_read_config_byte(dev, 0x5b, ®5b); |
| @@ -1009,7 +1009,7 @@ static int hpt37x_calibrate_dpll(struct pci_dev *dev) | |||
| 1009 | * | 1009 | * |
| 1010 | * (1) UDMA133 support depends on the bus clock | 1010 | * (1) UDMA133 support depends on the bus clock |
| 1011 | */ | 1011 | */ |
| 1012 | 1012 | ||
| 1013 | static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 1013 | static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 1014 | { | 1014 | { |
| 1015 | /* HPT370 - UDMA100 */ | 1015 | /* HPT370 - UDMA100 */ |
| @@ -1072,7 +1072,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1072 | 1072 | ||
| 1073 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | 1073 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); |
| 1074 | class_rev &= 0xFF; | 1074 | class_rev &= 0xFF; |
| 1075 | 1075 | ||
| 1076 | if (dev->device == PCI_DEVICE_ID_TTI_HPT366) { | 1076 | if (dev->device == PCI_DEVICE_ID_TTI_HPT366) { |
| 1077 | /* May be a later chip in disguise. Check */ | 1077 | /* May be a later chip in disguise. Check */ |
| 1078 | /* Older chips are in the HPT366 driver. Ignore them */ | 1078 | /* Older chips are in the HPT366 driver. Ignore them */ |
| @@ -1082,7 +1082,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1082 | if (class_rev == 6) | 1082 | if (class_rev == 6) |
| 1083 | return -ENODEV; | 1083 | return -ENODEV; |
| 1084 | 1084 | ||
| 1085 | switch(class_rev) { | 1085 | switch(class_rev) { |
| 1086 | case 3: | 1086 | case 3: |
| 1087 | port = &info_hpt370; | 1087 | port = &info_hpt370; |
| 1088 | chip_table = &hpt370; | 1088 | chip_table = &hpt370; |
| @@ -1147,16 +1147,16 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1147 | * state on reset when PDIAG is a input. | 1147 | * state on reset when PDIAG is a input. |
| 1148 | */ | 1148 | */ |
| 1149 | 1149 | ||
| 1150 | pci_write_config_byte(dev, 0x5b, 0x23); | 1150 | pci_write_config_byte(dev, 0x5b, 0x23); |
| 1151 | 1151 | ||
| 1152 | pci_read_config_dword(dev, 0x70, &freq); | 1152 | pci_read_config_dword(dev, 0x70, &freq); |
| 1153 | if ((freq >> 12) != 0xABCDE) { | 1153 | if ((freq >> 12) != 0xABCDE) { |
| 1154 | int i; | 1154 | int i; |
| 1155 | u8 sr; | 1155 | u8 sr; |
| 1156 | u32 total = 0; | 1156 | u32 total = 0; |
| 1157 | 1157 | ||
| 1158 | printk(KERN_WARNING "pata_hpt37x: BIOS has not set timing clocks.\n"); | 1158 | printk(KERN_WARNING "pata_hpt37x: BIOS has not set timing clocks.\n"); |
| 1159 | 1159 | ||
| 1160 | /* This is the process the HPT371 BIOS is reported to use */ | 1160 | /* This is the process the HPT371 BIOS is reported to use */ |
| 1161 | for(i = 0; i < 128; i++) { | 1161 | for(i = 0; i < 128; i++) { |
| 1162 | pci_read_config_byte(dev, 0x78, &sr); | 1162 | pci_read_config_byte(dev, 0x78, &sr); |
| @@ -1166,12 +1166,12 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1166 | freq = total / 128; | 1166 | freq = total / 128; |
| 1167 | } | 1167 | } |
| 1168 | freq &= 0x1FF; | 1168 | freq &= 0x1FF; |
| 1169 | 1169 | ||
| 1170 | /* | 1170 | /* |
| 1171 | * Turn the frequency check into a band and then find a timing | 1171 | * Turn the frequency check into a band and then find a timing |
| 1172 | * table to match it. | 1172 | * table to match it. |
| 1173 | */ | 1173 | */ |
| 1174 | 1174 | ||
| 1175 | clock_slot = hpt37x_clock_slot(freq, chip_table->base); | 1175 | clock_slot = hpt37x_clock_slot(freq, chip_table->base); |
| 1176 | if (chip_table->clocks[clock_slot] == NULL) { | 1176 | if (chip_table->clocks[clock_slot] == NULL) { |
| 1177 | /* | 1177 | /* |
| @@ -1180,7 +1180,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1180 | unsigned int f_low = (MHz[clock_slot] * chip_table->base) / 192; | 1180 | unsigned int f_low = (MHz[clock_slot] * chip_table->base) / 192; |
| 1181 | unsigned int f_high = f_low + 2; | 1181 | unsigned int f_high = f_low + 2; |
| 1182 | int adjust; | 1182 | int adjust; |
| 1183 | 1183 | ||
| 1184 | for(adjust = 0; adjust < 8; adjust++) { | 1184 | for(adjust = 0; adjust < 8; adjust++) { |
| 1185 | if (hpt37x_calibrate_dpll(dev)) | 1185 | if (hpt37x_calibrate_dpll(dev)) |
| 1186 | break; | 1186 | break; |
| @@ -1197,7 +1197,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1197 | } | 1197 | } |
| 1198 | /* Check if this works for all cases */ | 1198 | /* Check if this works for all cases */ |
| 1199 | port->private_data = (void *)hpt370_timings_66; | 1199 | port->private_data = (void *)hpt370_timings_66; |
| 1200 | 1200 | ||
| 1201 | printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[clock_slot]); | 1201 | printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[clock_slot]); |
| 1202 | } else { | 1202 | } else { |
| 1203 | port->private_data = (void *)chip_table->clocks[clock_slot]; | 1203 | port->private_data = (void *)chip_table->clocks[clock_slot]; |
| @@ -1205,7 +1205,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1205 | * Perform a final fixup. The 371 and 372 clock determines | 1205 | * Perform a final fixup. The 371 and 372 clock determines |
| 1206 | * if UDMA133 is available. | 1206 | * if UDMA133 is available. |
| 1207 | */ | 1207 | */ |
| 1208 | 1208 | ||
| 1209 | if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */ | 1209 | if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */ |
| 1210 | printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n"); | 1210 | printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n"); |
| 1211 | if (port == &info_hpt372) | 1211 | if (port == &info_hpt372) |
| @@ -1214,7 +1214,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1214 | } | 1214 | } |
| 1215 | printk(KERN_INFO "hpt37x: %s: Bus clock %dMHz.\n", chip_table->name, MHz[clock_slot]); | 1215 | printk(KERN_INFO "hpt37x: %s: Bus clock %dMHz.\n", chip_table->name, MHz[clock_slot]); |
| 1216 | } | 1216 | } |
| 1217 | port_info[0] = port_info[1] = port; | 1217 | port_info[0] = port_info[1] = port; |
| 1218 | /* Now kick off ATA set up */ | 1218 | /* Now kick off ATA set up */ |
| 1219 | return ata_pci_init_one(dev, port_info, 2); | 1219 | return ata_pci_init_one(dev, port_info, 2); |
| 1220 | } | 1220 | } |
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c index 40fcda62c7a2..06c8db079b91 100644 --- a/drivers/ata/pata_hpt3x2n.c +++ b/drivers/ata/pata_hpt3x2n.c | |||
| @@ -65,7 +65,7 @@ struct hpt_chip { | |||
| 65 | * PIO. | 65 | * PIO. |
| 66 | * 31 FIFO enable. | 66 | * 31 FIFO enable. |
| 67 | */ | 67 | */ |
| 68 | 68 | ||
| 69 | /* 66MHz DPLL clocks */ | 69 | /* 66MHz DPLL clocks */ |
| 70 | 70 | ||
| 71 | static struct hpt_clock hpt3x2n_clocks[] = { | 71 | static struct hpt_clock hpt3x2n_clocks[] = { |
| @@ -100,11 +100,11 @@ static struct hpt_clock hpt3x2n_clocks[] = { | |||
| 100 | * is hard coded but easy to change. This will be needed if we use | 100 | * is hard coded but easy to change. This will be needed if we use |
| 101 | * different DPLLs | 101 | * different DPLLs |
| 102 | */ | 102 | */ |
| 103 | 103 | ||
| 104 | static u32 hpt3x2n_find_mode(struct ata_port *ap, int speed) | 104 | static u32 hpt3x2n_find_mode(struct ata_port *ap, int speed) |
| 105 | { | 105 | { |
| 106 | struct hpt_clock *clocks = hpt3x2n_clocks; | 106 | struct hpt_clock *clocks = hpt3x2n_clocks; |
| 107 | 107 | ||
| 108 | while(clocks->xfer_speed) { | 108 | while(clocks->xfer_speed) { |
| 109 | if (clocks->xfer_speed == speed) | 109 | if (clocks->xfer_speed == speed) |
| 110 | return clocks->timing; | 110 | return clocks->timing; |
| @@ -121,52 +121,52 @@ static u32 hpt3x2n_find_mode(struct ata_port *ap, int speed) | |||
| 121 | * Perform the initial reset handling for the 3x2n series controllers. | 121 | * Perform the initial reset handling for the 3x2n series controllers. |
| 122 | * Reset the hardware and state machine, obtain the cable type. | 122 | * Reset the hardware and state machine, obtain the cable type. |
| 123 | */ | 123 | */ |
| 124 | 124 | ||
| 125 | static int hpt3xn_pre_reset(struct ata_port *ap) | 125 | static int hpt3xn_pre_reset(struct ata_port *ap) |
| 126 | { | 126 | { |
| 127 | u8 scr2, ata66; | 127 | u8 scr2, ata66; |
| 128 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 128 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 129 | 129 | ||
| 130 | pci_read_config_byte(pdev, 0x5B, &scr2); | 130 | pci_read_config_byte(pdev, 0x5B, &scr2); |
| 131 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); | 131 | pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); |
| 132 | /* Cable register now active */ | 132 | /* Cable register now active */ |
| 133 | pci_read_config_byte(pdev, 0x5A, &ata66); | 133 | pci_read_config_byte(pdev, 0x5A, &ata66); |
| 134 | /* Restore state */ | 134 | /* Restore state */ |
| 135 | pci_write_config_byte(pdev, 0x5B, scr2); | 135 | pci_write_config_byte(pdev, 0x5B, scr2); |
| 136 | 136 | ||
| 137 | if (ata66 & (1 << ap->port_no)) | 137 | if (ata66 & (1 << ap->port_no)) |
| 138 | ap->cbl = ATA_CBL_PATA40; | 138 | ap->cbl = ATA_CBL_PATA40; |
| 139 | else | 139 | else |
| 140 | ap->cbl = ATA_CBL_PATA80; | 140 | ap->cbl = ATA_CBL_PATA80; |
| 141 | 141 | ||
| 142 | /* Reset the state machine */ | 142 | /* Reset the state machine */ |
| 143 | pci_write_config_byte(pdev, 0x50, 0x37); | 143 | pci_write_config_byte(pdev, 0x50, 0x37); |
| 144 | pci_write_config_byte(pdev, 0x54, 0x37); | 144 | pci_write_config_byte(pdev, 0x54, 0x37); |
| 145 | udelay(100); | 145 | udelay(100); |
| 146 | 146 | ||
| 147 | return ata_std_prereset(ap); | 147 | return ata_std_prereset(ap); |
| 148 | } | 148 | } |
| 149 | 149 | ||
| 150 | /** | 150 | /** |
| 151 | * hpt3x2n_error_handler - probe the hpt3x2n bus | 151 | * hpt3x2n_error_handler - probe the hpt3x2n bus |
| 152 | * @ap: ATA port to reset | 152 | * @ap: ATA port to reset |
| 153 | * | 153 | * |
| 154 | * Perform the probe reset handling for the 3x2N | 154 | * Perform the probe reset handling for the 3x2N |
| 155 | */ | 155 | */ |
| 156 | 156 | ||
| 157 | static void hpt3x2n_error_handler(struct ata_port *ap) | 157 | static void hpt3x2n_error_handler(struct ata_port *ap) |
| 158 | { | 158 | { |
| 159 | ata_bmdma_drive_eh(ap, hpt3xn_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | 159 | ata_bmdma_drive_eh(ap, hpt3xn_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 160 | } | 160 | } |
| 161 | 161 | ||
| 162 | /** | 162 | /** |
| 163 | * hpt3x2n_set_piomode - PIO setup | 163 | * hpt3x2n_set_piomode - PIO setup |
| 164 | * @ap: ATA interface | 164 | * @ap: ATA interface |
| 165 | * @adev: device on the interface | 165 | * @adev: device on the interface |
| 166 | * | 166 | * |
| 167 | * Perform PIO mode setup. | 167 | * Perform PIO mode setup. |
| 168 | */ | 168 | */ |
| 169 | 169 | ||
| 170 | static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) | 170 | static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 171 | { | 171 | { |
| 172 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 172 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -177,12 +177,12 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 177 | 177 | ||
| 178 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 178 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 179 | addr2 = 0x51 + 4 * ap->port_no; | 179 | addr2 = 0x51 + 4 * ap->port_no; |
| 180 | 180 | ||
| 181 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 181 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 182 | pci_read_config_byte(pdev, addr2, &fast); | 182 | pci_read_config_byte(pdev, addr2, &fast); |
| 183 | fast &= ~0x07; | 183 | fast &= ~0x07; |
| 184 | pci_write_config_byte(pdev, addr2, fast); | 184 | pci_write_config_byte(pdev, addr2, fast); |
| 185 | 185 | ||
| 186 | pci_read_config_dword(pdev, addr1, ®); | 186 | pci_read_config_dword(pdev, addr1, ®); |
| 187 | mode = hpt3x2n_find_mode(ap, adev->pio_mode); | 187 | mode = hpt3x2n_find_mode(ap, adev->pio_mode); |
| 188 | mode &= ~0x8000000; /* No FIFO in PIO */ | 188 | mode &= ~0x8000000; /* No FIFO in PIO */ |
| @@ -199,7 +199,7 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 199 | * Set up the channel for MWDMA or UDMA modes. Much the same as with | 199 | * Set up the channel for MWDMA or UDMA modes. Much the same as with |
| 200 | * PIO, load the mode number and then set MWDMA or UDMA flag. | 200 | * PIO, load the mode number and then set MWDMA or UDMA flag. |
| 201 | */ | 201 | */ |
| 202 | 202 | ||
| 203 | static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 203 | static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 204 | { | 204 | { |
| 205 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 205 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -210,12 +210,12 @@ static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 210 | 210 | ||
| 211 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); | 211 | addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); |
| 212 | addr2 = 0x51 + 4 * ap->port_no; | 212 | addr2 = 0x51 + 4 * ap->port_no; |
| 213 | 213 | ||
| 214 | /* Fast interrupt prediction disable, hold off interrupt disable */ | 214 | /* Fast interrupt prediction disable, hold off interrupt disable */ |
| 215 | pci_read_config_byte(pdev, addr2, &fast); | 215 | pci_read_config_byte(pdev, addr2, &fast); |
| 216 | fast &= ~0x07; | 216 | fast &= ~0x07; |
| 217 | pci_write_config_byte(pdev, addr2, fast); | 217 | pci_write_config_byte(pdev, addr2, fast); |
| 218 | 218 | ||
| 219 | pci_read_config_dword(pdev, addr1, ®); | 219 | pci_read_config_dword(pdev, addr1, ®); |
| 220 | mode = hpt3x2n_find_mode(ap, adev->dma_mode); | 220 | mode = hpt3x2n_find_mode(ap, adev->dma_mode); |
| 221 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ | 221 | mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ |
| @@ -230,14 +230,14 @@ static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 230 | * | 230 | * |
| 231 | * Clean up after the HPT3x2n and later DMA engine | 231 | * Clean up after the HPT3x2n and later DMA engine |
| 232 | */ | 232 | */ |
| 233 | 233 | ||
| 234 | static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc) | 234 | static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc) |
| 235 | { | 235 | { |
| 236 | struct ata_port *ap = qc->ap; | 236 | struct ata_port *ap = qc->ap; |
| 237 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 237 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 238 | int mscreg = 0x50 + 2 * ap->port_no; | 238 | int mscreg = 0x50 + 2 * ap->port_no; |
| 239 | u8 bwsr_stat, msc_stat; | 239 | u8 bwsr_stat, msc_stat; |
| 240 | 240 | ||
| 241 | pci_read_config_byte(pdev, 0x6A, &bwsr_stat); | 241 | pci_read_config_byte(pdev, 0x6A, &bwsr_stat); |
| 242 | pci_read_config_byte(pdev, mscreg, &msc_stat); | 242 | pci_read_config_byte(pdev, mscreg, &msc_stat); |
| 243 | if (bwsr_stat & (1 << ap->port_no)) | 243 | if (bwsr_stat & (1 << ap->port_no)) |
| @@ -257,29 +257,29 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 257 | * - writing | 257 | * - writing |
| 258 | * - second channel UDMA7 (SATA ports) or higher | 258 | * - second channel UDMA7 (SATA ports) or higher |
| 259 | * - 66MHz PCI | 259 | * - 66MHz PCI |
| 260 | * | 260 | * |
| 261 | * or we will underclock the device and get reduced performance. | 261 | * or we will underclock the device and get reduced performance. |
| 262 | */ | 262 | */ |
| 263 | 263 | ||
| 264 | static void hpt3x2n_set_clock(struct ata_port *ap, int source) | 264 | static void hpt3x2n_set_clock(struct ata_port *ap, int source) |
| 265 | { | 265 | { |
| 266 | unsigned long bmdma = ap->ioaddr.bmdma_addr; | 266 | unsigned long bmdma = ap->ioaddr.bmdma_addr; |
| 267 | 267 | ||
| 268 | /* Tristate the bus */ | 268 | /* Tristate the bus */ |
| 269 | outb(0x80, bmdma+0x73); | 269 | outb(0x80, bmdma+0x73); |
| 270 | outb(0x80, bmdma+0x77); | 270 | outb(0x80, bmdma+0x77); |
| 271 | 271 | ||
| 272 | /* Switch clock and reset channels */ | 272 | /* Switch clock and reset channels */ |
| 273 | outb(source, bmdma+0x7B); | 273 | outb(source, bmdma+0x7B); |
| 274 | outb(0xC0, bmdma+0x79); | 274 | outb(0xC0, bmdma+0x79); |
| 275 | 275 | ||
| 276 | /* Reset state machines */ | 276 | /* Reset state machines */ |
| 277 | outb(0x37, bmdma+0x70); | 277 | outb(0x37, bmdma+0x70); |
| 278 | outb(0x37, bmdma+0x74); | 278 | outb(0x37, bmdma+0x74); |
| 279 | 279 | ||
| 280 | /* Complete reset */ | 280 | /* Complete reset */ |
| 281 | outb(0x00, bmdma+0x79); | 281 | outb(0x00, bmdma+0x79); |
| 282 | 282 | ||
| 283 | /* Reconnect channels to bus */ | 283 | /* Reconnect channels to bus */ |
| 284 | outb(0x00, bmdma+0x73); | 284 | outb(0x00, bmdma+0x73); |
| 285 | outb(0x00, bmdma+0x77); | 285 | outb(0x00, bmdma+0x77); |
| @@ -291,7 +291,7 @@ static int hpt3x2n_pair_idle(struct ata_port *ap) | |||
| 291 | { | 291 | { |
| 292 | struct ata_host *host = ap->host; | 292 | struct ata_host *host = ap->host; |
| 293 | struct ata_port *pair = host->ports[ap->port_no ^ 1]; | 293 | struct ata_port *pair = host->ports[ap->port_no ^ 1]; |
| 294 | 294 | ||
| 295 | if (pair->hsm_task_state == HSM_ST_IDLE) | 295 | if (pair->hsm_task_state == HSM_ST_IDLE) |
| 296 | return 1; | 296 | return 1; |
| 297 | return 0; | 297 | return 0; |
| @@ -305,7 +305,7 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int reading) | |||
| 305 | return USE_DPLL; /* Needed for write */ | 305 | return USE_DPLL; /* Needed for write */ |
| 306 | if (flags & PCI66) | 306 | if (flags & PCI66) |
| 307 | return USE_DPLL; /* Needed at 66Mhz */ | 307 | return USE_DPLL; /* Needed at 66Mhz */ |
| 308 | return 0; | 308 | return 0; |
| 309 | } | 309 | } |
| 310 | 310 | ||
| 311 | static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) | 311 | static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) |
| @@ -313,7 +313,7 @@ static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) | |||
| 313 | struct ata_taskfile *tf = &qc->tf; | 313 | struct ata_taskfile *tf = &qc->tf; |
| 314 | struct ata_port *ap = qc->ap; | 314 | struct ata_port *ap = qc->ap; |
| 315 | int flags = (long)ap->host->private_data; | 315 | int flags = (long)ap->host->private_data; |
| 316 | 316 | ||
| 317 | if (hpt3x2n_pair_idle(ap)) { | 317 | if (hpt3x2n_pair_idle(ap)) { |
| 318 | int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); | 318 | int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); |
| 319 | if ((flags & USE_DPLL) != dpll) { | 319 | if ((flags & USE_DPLL) != dpll) { |
| @@ -347,13 +347,13 @@ static struct scsi_host_template hpt3x2n_sht = { | |||
| 347 | /* | 347 | /* |
| 348 | * Configuration for HPT3x2n. | 348 | * Configuration for HPT3x2n. |
| 349 | */ | 349 | */ |
| 350 | 350 | ||
| 351 | static struct ata_port_operations hpt3x2n_port_ops = { | 351 | static struct ata_port_operations hpt3x2n_port_ops = { |
| 352 | .port_disable = ata_port_disable, | 352 | .port_disable = ata_port_disable, |
| 353 | .set_piomode = hpt3x2n_set_piomode, | 353 | .set_piomode = hpt3x2n_set_piomode, |
| 354 | .set_dmamode = hpt3x2n_set_dmamode, | 354 | .set_dmamode = hpt3x2n_set_dmamode, |
| 355 | .mode_filter = ata_pci_default_filter, | 355 | .mode_filter = ata_pci_default_filter, |
| 356 | 356 | ||
| 357 | .tf_load = ata_tf_load, | 357 | .tf_load = ata_tf_load, |
| 358 | .tf_read = ata_tf_read, | 358 | .tf_read = ata_tf_read, |
| 359 | .check_status = ata_check_status, | 359 | .check_status = ata_check_status, |
| @@ -381,11 +381,11 @@ static struct ata_port_operations hpt3x2n_port_ops = { | |||
| 381 | .port_start = ata_port_start, | 381 | .port_start = ata_port_start, |
| 382 | .port_stop = ata_port_stop, | 382 | .port_stop = ata_port_stop, |
| 383 | .host_stop = ata_host_stop | 383 | .host_stop = ata_host_stop |
| 384 | }; | 384 | }; |
| 385 | 385 | ||
| 386 | /** | 386 | /** |
| 387 | * hpt3xn_calibrate_dpll - Calibrate the DPLL loop | 387 | * hpt3xn_calibrate_dpll - Calibrate the DPLL loop |
| 388 | * @dev: PCI device | 388 | * @dev: PCI device |
| 389 | * | 389 | * |
| 390 | * Perform a calibration cycle on the HPT3xN DPLL. Returns 1 if this | 390 | * Perform a calibration cycle on the HPT3xN DPLL. Returns 1 if this |
| 391 | * succeeds | 391 | * succeeds |
| @@ -396,7 +396,7 @@ static int hpt3xn_calibrate_dpll(struct pci_dev *dev) | |||
| 396 | u8 reg5b; | 396 | u8 reg5b; |
| 397 | u32 reg5c; | 397 | u32 reg5c; |
| 398 | int tries; | 398 | int tries; |
| 399 | 399 | ||
| 400 | for(tries = 0; tries < 0x5000; tries++) { | 400 | for(tries = 0; tries < 0x5000; tries++) { |
| 401 | udelay(50); | 401 | udelay(50); |
| 402 | pci_read_config_byte(dev, 0x5b, ®5b); | 402 | pci_read_config_byte(dev, 0x5b, ®5b); |
| @@ -422,16 +422,16 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev) | |||
| 422 | { | 422 | { |
| 423 | unsigned long freq; | 423 | unsigned long freq; |
| 424 | u32 fcnt; | 424 | u32 fcnt; |
| 425 | 425 | ||
| 426 | pci_read_config_dword(pdev, 0x70/*CHECKME*/, &fcnt); | 426 | pci_read_config_dword(pdev, 0x70/*CHECKME*/, &fcnt); |
| 427 | if ((fcnt >> 12) != 0xABCDE) { | 427 | if ((fcnt >> 12) != 0xABCDE) { |
| 428 | printk(KERN_WARNING "hpt3xn: BIOS clock data not set.\n"); | 428 | printk(KERN_WARNING "hpt3xn: BIOS clock data not set.\n"); |
| 429 | return 33; /* Not BIOS set */ | 429 | return 33; /* Not BIOS set */ |
| 430 | } | 430 | } |
| 431 | fcnt &= 0x1FF; | 431 | fcnt &= 0x1FF; |
| 432 | 432 | ||
| 433 | freq = (fcnt * 77) / 192; | 433 | freq = (fcnt * 77) / 192; |
| 434 | 434 | ||
| 435 | /* Clamp to bands */ | 435 | /* Clamp to bands */ |
| 436 | if (freq < 40) | 436 | if (freq < 40) |
| 437 | return 33; | 437 | return 33; |
| @@ -471,7 +471,7 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev) | |||
| 471 | * | 471 | * |
| 472 | * To pin down HPT371N | 472 | * To pin down HPT371N |
| 473 | */ | 473 | */ |
| 474 | 474 | ||
| 475 | static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 475 | static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 476 | { | 476 | { |
| 477 | /* HPT372N and friends - UDMA133 */ | 477 | /* HPT372N and friends - UDMA133 */ |
| @@ -488,14 +488,14 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 488 | 488 | ||
| 489 | u8 irqmask; | 489 | u8 irqmask; |
| 490 | u32 class_rev; | 490 | u32 class_rev; |
| 491 | 491 | ||
| 492 | unsigned int pci_mhz; | 492 | unsigned int pci_mhz; |
| 493 | unsigned int f_low, f_high; | 493 | unsigned int f_low, f_high; |
| 494 | int adjust; | 494 | int adjust; |
| 495 | 495 | ||
| 496 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); | 496 | pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); |
| 497 | class_rev &= 0xFF; | 497 | class_rev &= 0xFF; |
| 498 | 498 | ||
| 499 | switch(dev->device) { | 499 | switch(dev->device) { |
| 500 | case PCI_DEVICE_ID_TTI_HPT366: | 500 | case PCI_DEVICE_ID_TTI_HPT366: |
| 501 | if (class_rev < 6) | 501 | if (class_rev < 6) |
| @@ -530,16 +530,16 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 530 | 530 | ||
| 531 | /* Tune the PLL. HPT recommend using 75 for SATA, 66 for UDMA133 or | 531 | /* Tune the PLL. HPT recommend using 75 for SATA, 66 for UDMA133 or |
| 532 | 50 for UDMA100. Right now we always use 66 */ | 532 | 50 for UDMA100. Right now we always use 66 */ |
| 533 | 533 | ||
| 534 | pci_mhz = hpt3x2n_pci_clock(dev); | 534 | pci_mhz = hpt3x2n_pci_clock(dev); |
| 535 | 535 | ||
| 536 | f_low = (pci_mhz * 48) / 66; /* PCI Mhz for 66Mhz DPLL */ | 536 | f_low = (pci_mhz * 48) / 66; /* PCI Mhz for 66Mhz DPLL */ |
| 537 | f_high = f_low + 2; /* Tolerance */ | 537 | f_high = f_low + 2; /* Tolerance */ |
| 538 | 538 | ||
| 539 | pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100); | 539 | pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100); |
| 540 | /* PLL clock */ | 540 | /* PLL clock */ |
| 541 | pci_write_config_byte(dev, 0x5B, 0x21); | 541 | pci_write_config_byte(dev, 0x5B, 0x21); |
| 542 | 542 | ||
| 543 | /* Unlike the 37x we don't try jiggling the frequency */ | 543 | /* Unlike the 37x we don't try jiggling the frequency */ |
| 544 | for(adjust = 0; adjust < 8; adjust++) { | 544 | for(adjust = 0; adjust < 8; adjust++) { |
| 545 | if (hpt3xn_calibrate_dpll(dev)) | 545 | if (hpt3xn_calibrate_dpll(dev)) |
| @@ -554,7 +554,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 554 | port->private_data = NULL; | 554 | port->private_data = NULL; |
| 555 | if (pci_mhz > 60) | 555 | if (pci_mhz > 60) |
| 556 | port->private_data = (void *)PCI66; | 556 | port->private_data = (void *)PCI66; |
| 557 | 557 | ||
| 558 | /* Now kick off ATA set up */ | 558 | /* Now kick off ATA set up */ |
| 559 | port_info[0] = port_info[1] = port; | 559 | port_info[0] = port_info[1] = port; |
| 560 | return ata_pci_init_one(dev, port_info, 2); | 560 | return ata_pci_init_one(dev, port_info, 2); |
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c index c93406ebf6ed..152770133ab1 100644 --- a/drivers/ata/pata_hpt3x3.c +++ b/drivers/ata/pata_hpt3x3.c | |||
| @@ -12,7 +12,7 @@ | |||
| 12 | * May be copied or modified under the terms of the GNU General Public | 12 | * May be copied or modified under the terms of the GNU General Public |
| 13 | * License | 13 | * License |
| 14 | */ | 14 | */ |
| 15 | 15 | ||
| 16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
| 18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
diff --git a/drivers/ata/pata_it8172.c b/drivers/ata/pata_it8172.c index f8367191fc7b..53d35bb6fcf9 100644 --- a/drivers/ata/pata_it8172.c +++ b/drivers/ata/pata_it8172.c | |||
| @@ -58,7 +58,7 @@ static int it8172_pre_reset(struct ata_port *ap) | |||
| 58 | }; | 58 | }; |
| 59 | 59 | ||
| 60 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 60 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 61 | 61 | ||
| 62 | if (ap->port_no && !pci_test_config_bits(pdev, &it8172_enable_bits[ap->port_no])) { | 62 | if (ap->port_no && !pci_test_config_bits(pdev, &it8172_enable_bits[ap->port_no])) { |
| 63 | ata_port_disable(ap); | 63 | ata_port_disable(ap); |
| 64 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); | 64 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c index c8a7798f8ce5..af39097d8081 100644 --- a/drivers/ata/pata_it821x.c +++ b/drivers/ata/pata_it821x.c | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * based upon | 6 | * based upon |
| 7 | * | 7 | * |
| 8 | * it821x.c | 8 | * it821x.c |
| 9 | * | 9 | * |
| 10 | * linux/drivers/ide/pci/it821x.c Version 0.09 December 2004 | 10 | * linux/drivers/ide/pci/it821x.c Version 0.09 December 2004 |
| 11 | * | 11 | * |
| 12 | * Copyright (C) 2004 Red Hat <alan@redhat.com> | 12 | * Copyright (C) 2004 Red Hat <alan@redhat.com> |
| @@ -118,7 +118,7 @@ static int it8212_noraid; | |||
| 118 | * | 118 | * |
| 119 | * Set the cable type | 119 | * Set the cable type |
| 120 | */ | 120 | */ |
| 121 | 121 | ||
| 122 | static int it821x_pre_reset(struct ata_port *ap) | 122 | static int it821x_pre_reset(struct ata_port *ap) |
| 123 | { | 123 | { |
| 124 | ap->cbl = ATA_CBL_PATA80; | 124 | ap->cbl = ATA_CBL_PATA80; |
| @@ -131,7 +131,7 @@ static int it821x_pre_reset(struct ata_port *ap) | |||
| 131 | * | 131 | * |
| 132 | * Set the cable type and trigger a probe | 132 | * Set the cable type and trigger a probe |
| 133 | */ | 133 | */ |
| 134 | 134 | ||
| 135 | static void it821x_error_handler(struct ata_port *ap) | 135 | static void it821x_error_handler(struct ata_port *ap) |
| 136 | { | 136 | { |
| 137 | return ata_bmdma_drive_eh(ap, it821x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | 137 | return ata_bmdma_drive_eh(ap, it821x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| @@ -286,7 +286,7 @@ static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device * | |||
| 286 | struct it821x_dev *itdev = ap->private_data; | 286 | struct it821x_dev *itdev = ap->private_data; |
| 287 | int unit = adev->devno; | 287 | int unit = adev->devno; |
| 288 | int mode_wanted = adev->pio_mode - XFER_PIO_0; | 288 | int mode_wanted = adev->pio_mode - XFER_PIO_0; |
| 289 | 289 | ||
| 290 | /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */ | 290 | /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */ |
| 291 | itdev->want[unit][1] = pio_want[mode_wanted]; | 291 | itdev->want[unit][1] = pio_want[mode_wanted]; |
| 292 | itdev->want[unit][0] = 1; /* PIO is lowest priority */ | 292 | itdev->want[unit][0] = 1; /* PIO is lowest priority */ |
| @@ -301,7 +301,7 @@ static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device * | |||
| 301 | * @adev: ATA device | 301 | * @adev: ATA device |
| 302 | * | 302 | * |
| 303 | * Set up the DMA modes. The actions taken depend heavily on the mode | 303 | * Set up the DMA modes. The actions taken depend heavily on the mode |
| 304 | * to use. If UDMA is used as is hopefully the usual case then the | 304 | * to use. If UDMA is used as is hopefully the usual case then the |
| 305 | * timing register is private and we need only consider the clock. If | 305 | * timing register is private and we need only consider the clock. If |
| 306 | * we are using MWDMA then we have to manage the setting ourself as | 306 | * we are using MWDMA then we have to manage the setting ourself as |
| 307 | * we switch devices and mode. | 307 | * we switch devices and mode. |
| @@ -322,7 +322,7 @@ static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device * | |||
| 322 | 322 | ||
| 323 | if (adev->dma_mode >= XFER_UDMA_0) { | 323 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 324 | int mode_wanted = adev->dma_mode - XFER_UDMA_0; | 324 | int mode_wanted = adev->dma_mode - XFER_UDMA_0; |
| 325 | 325 | ||
| 326 | itdev->want[unit][1] = udma_want[mode_wanted]; | 326 | itdev->want[unit][1] = udma_want[mode_wanted]; |
| 327 | itdev->want[unit][0] = 3; /* UDMA is high priority */ | 327 | itdev->want[unit][0] = 3; /* UDMA is high priority */ |
| 328 | itdev->mwdma[unit] = MWDMA_OFF; | 328 | itdev->mwdma[unit] = MWDMA_OFF; |
| @@ -341,7 +341,7 @@ static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device * | |||
| 341 | it821x_program_udma(ap, adev, itdev->udma[unit]); | 341 | it821x_program_udma(ap, adev, itdev->udma[unit]); |
| 342 | } else { | 342 | } else { |
| 343 | int mode_wanted = adev->dma_mode - XFER_MW_DMA_0; | 343 | int mode_wanted = adev->dma_mode - XFER_MW_DMA_0; |
| 344 | 344 | ||
| 345 | itdev->want[unit][1] = mwdma_want[mode_wanted]; | 345 | itdev->want[unit][1] = mwdma_want[mode_wanted]; |
| 346 | itdev->want[unit][0] = 2; /* MWDMA is low priority */ | 346 | itdev->want[unit][0] = 2; /* MWDMA is low priority */ |
| 347 | itdev->mwdma[unit] = dma[mode_wanted]; | 347 | itdev->mwdma[unit] = dma[mode_wanted]; |
| @@ -363,7 +363,7 @@ static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device * | |||
| 363 | * @qc: Command in progress | 363 | * @qc: Command in progress |
| 364 | * | 364 | * |
| 365 | * Usually drivers set the DMA timing at the point the set_dmamode call | 365 | * Usually drivers set the DMA timing at the point the set_dmamode call |
| 366 | * is made. IT821x however requires we load new timings on the | 366 | * is made. IT821x however requires we load new timings on the |
| 367 | * transitions in some cases. | 367 | * transitions in some cases. |
| 368 | */ | 368 | */ |
| 369 | 369 | ||
| @@ -410,7 +410,7 @@ static void it821x_passthru_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 410 | * | 410 | * |
| 411 | * Device selection hook. If neccessary perform clock switching | 411 | * Device selection hook. If neccessary perform clock switching |
| 412 | */ | 412 | */ |
| 413 | 413 | ||
| 414 | static void it821x_passthru_dev_select(struct ata_port *ap, | 414 | static void it821x_passthru_dev_select(struct ata_port *ap, |
| 415 | unsigned int device) | 415 | unsigned int device) |
| 416 | { | 416 | { |
| @@ -431,7 +431,7 @@ static void it821x_passthru_dev_select(struct ata_port *ap, | |||
| 431 | * perform out own device selection timing loads before the | 431 | * perform out own device selection timing loads before the |
| 432 | * usual happenings kick off | 432 | * usual happenings kick off |
| 433 | */ | 433 | */ |
| 434 | 434 | ||
| 435 | static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) | 435 | static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) |
| 436 | { | 436 | { |
| 437 | switch(qc->tf.command) | 437 | switch(qc->tf.command) |
| @@ -466,7 +466,7 @@ static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) | |||
| 466 | * perform out own device selection timing loads before the | 466 | * perform out own device selection timing loads before the |
| 467 | * usual happenings kick off | 467 | * usual happenings kick off |
| 468 | */ | 468 | */ |
| 469 | 469 | ||
| 470 | static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc) | 470 | static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc) |
| 471 | { | 471 | { |
| 472 | it821x_passthru_dev_select(qc->ap, qc->dev->devno); | 472 | it821x_passthru_dev_select(qc->ap, qc->dev->devno); |
| @@ -480,9 +480,9 @@ static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc) | |||
| 480 | * Use a non standard set_mode function. We don't want to be tuned. | 480 | * Use a non standard set_mode function. We don't want to be tuned. |
| 481 | * The BIOS configured everything. Our job is not to fiddle. We | 481 | * The BIOS configured everything. Our job is not to fiddle. We |
| 482 | * read the dma enabled bits from the PCI configuration of the device | 482 | * read the dma enabled bits from the PCI configuration of the device |
| 483 | * and respect them. | 483 | * and respect them. |
| 484 | */ | 484 | */ |
| 485 | 485 | ||
| 486 | static void it821x_smart_set_mode(struct ata_port *ap) | 486 | static void it821x_smart_set_mode(struct ata_port *ap) |
| 487 | { | 487 | { |
| 488 | int dma_enabled = 0; | 488 | int dma_enabled = 0; |
| @@ -492,14 +492,14 @@ static void it821x_smart_set_mode(struct ata_port *ap) | |||
| 492 | /* It is possible that BMDMA isn't allocated */ | 492 | /* It is possible that BMDMA isn't allocated */ |
| 493 | if (ap->ioaddr.bmdma_addr) | 493 | if (ap->ioaddr.bmdma_addr) |
| 494 | dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | 494 | dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 495 | 495 | ||
| 496 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 496 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
| 497 | struct ata_device *dev = &ap->device[i]; | 497 | struct ata_device *dev = &ap->device[i]; |
| 498 | if (ata_dev_enabled(dev)) { | 498 | if (ata_dev_enabled(dev)) { |
| 499 | /* We don't really care */ | 499 | /* We don't really care */ |
| 500 | dev->pio_mode = XFER_PIO_0; | 500 | dev->pio_mode = XFER_PIO_0; |
| 501 | dev->dma_mode = XFER_MW_DMA_0; | 501 | dev->dma_mode = XFER_MW_DMA_0; |
| 502 | /* We do need the right mode information for DMA or PIO | 502 | /* We do need the right mode information for DMA or PIO |
| 503 | and this comes from the current configuration flags */ | 503 | and this comes from the current configuration flags */ |
| 504 | if (dma_enabled & (1 << (5 + i))) { | 504 | if (dma_enabled & (1 << (5 + i))) { |
| 505 | dev->xfer_mode = XFER_MW_DMA_0; | 505 | dev->xfer_mode = XFER_MW_DMA_0; |
| @@ -526,7 +526,7 @@ static void it821x_smart_set_mode(struct ata_port *ap) | |||
| 526 | * FIXME: When FUA appears we need to block FUA too. And SMART and | 526 | * FIXME: When FUA appears we need to block FUA too. And SMART and |
| 527 | * basically we need to filter commands for this chip. | 527 | * basically we need to filter commands for this chip. |
| 528 | */ | 528 | */ |
| 529 | 529 | ||
| 530 | static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) | 530 | static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) |
| 531 | { | 531 | { |
| 532 | unsigned char model_num[40]; | 532 | unsigned char model_num[40]; |
| @@ -535,7 +535,7 @@ static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) | |||
| 535 | 535 | ||
| 536 | /* This block ought to be a library routine as it is in several | 536 | /* This block ought to be a library routine as it is in several |
| 537 | drivers now */ | 537 | drivers now */ |
| 538 | 538 | ||
| 539 | ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, | 539 | ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, |
| 540 | sizeof(model_num)); | 540 | sizeof(model_num)); |
| 541 | s = &model_num[0]; | 541 | s = &model_num[0]; |
| @@ -549,7 +549,7 @@ static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) | |||
| 549 | 549 | ||
| 550 | if (adev->max_sectors > 255) | 550 | if (adev->max_sectors > 255) |
| 551 | adev->max_sectors = 255; | 551 | adev->max_sectors = 255; |
| 552 | 552 | ||
| 553 | if (strstr(model_num, "Integrated Technology Express")) { | 553 | if (strstr(model_num, "Integrated Technology Express")) { |
| 554 | /* RAID mode */ | 554 | /* RAID mode */ |
| 555 | printk(KERN_INFO "IT821x %sRAID%d volume", | 555 | printk(KERN_INFO "IT821x %sRAID%d volume", |
| @@ -569,12 +569,12 @@ static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) | |||
| 569 | * Decide if this ATAPI command can be issued by DMA on this | 569 | * Decide if this ATAPI command can be issued by DMA on this |
| 570 | * controller. Return 0 if it can be. | 570 | * controller. Return 0 if it can be. |
| 571 | */ | 571 | */ |
| 572 | 572 | ||
| 573 | static int it821x_check_atapi_dma(struct ata_queued_cmd *qc) | 573 | static int it821x_check_atapi_dma(struct ata_queued_cmd *qc) |
| 574 | { | 574 | { |
| 575 | struct ata_port *ap = qc->ap; | 575 | struct ata_port *ap = qc->ap; |
| 576 | struct it821x_dev *itdev = ap->private_data; | 576 | struct it821x_dev *itdev = ap->private_data; |
| 577 | 577 | ||
| 578 | /* No ATAPI DMA in smart mode */ | 578 | /* No ATAPI DMA in smart mode */ |
| 579 | if (itdev->smart) | 579 | if (itdev->smart) |
| 580 | return -EOPNOTSUPP; | 580 | return -EOPNOTSUPP; |
| @@ -584,7 +584,7 @@ static int it821x_check_atapi_dma(struct ata_queued_cmd *qc) | |||
| 584 | /* Cool */ | 584 | /* Cool */ |
| 585 | return 0; | 585 | return 0; |
| 586 | } | 586 | } |
| 587 | 587 | ||
| 588 | 588 | ||
| 589 | /** | 589 | /** |
| 590 | * it821x_port_start - port setup | 590 | * it821x_port_start - port setup |
| @@ -592,10 +592,10 @@ static int it821x_check_atapi_dma(struct ata_queued_cmd *qc) | |||
| 592 | * | 592 | * |
| 593 | * The it821x needs to maintain private data structures and also to | 593 | * The it821x needs to maintain private data structures and also to |
| 594 | * use the standard PCI interface which lacks support for this | 594 | * use the standard PCI interface which lacks support for this |
| 595 | * functionality. We instead set up the private data on the port | 595 | * functionality. We instead set up the private data on the port |
| 596 | * start hook, and tear it down on port stop | 596 | * start hook, and tear it down on port stop |
| 597 | */ | 597 | */ |
| 598 | 598 | ||
| 599 | static int it821x_port_start(struct ata_port *ap) | 599 | static int it821x_port_start(struct ata_port *ap) |
| 600 | { | 600 | { |
| 601 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 601 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -605,13 +605,13 @@ static int it821x_port_start(struct ata_port *ap) | |||
| 605 | int ret = ata_port_start(ap); | 605 | int ret = ata_port_start(ap); |
| 606 | if (ret < 0) | 606 | if (ret < 0) |
| 607 | return ret; | 607 | return ret; |
| 608 | 608 | ||
| 609 | ap->private_data = kmalloc(sizeof(struct it821x_dev), GFP_KERNEL); | 609 | ap->private_data = kmalloc(sizeof(struct it821x_dev), GFP_KERNEL); |
| 610 | if (ap->private_data == NULL) { | 610 | if (ap->private_data == NULL) { |
| 611 | ata_port_stop(ap); | 611 | ata_port_stop(ap); |
| 612 | return -ENOMEM; | 612 | return -ENOMEM; |
| 613 | } | 613 | } |
| 614 | 614 | ||
| 615 | itdev = ap->private_data; | 615 | itdev = ap->private_data; |
| 616 | memset(itdev, 0, sizeof(struct it821x_dev)); | 616 | memset(itdev, 0, sizeof(struct it821x_dev)); |
| 617 | 617 | ||
| @@ -650,7 +650,7 @@ static int it821x_port_start(struct ata_port *ap) | |||
| 650 | * | 650 | * |
| 651 | * Release the private objects we added in it821x_port_start | 651 | * Release the private objects we added in it821x_port_start |
| 652 | */ | 652 | */ |
| 653 | 653 | ||
| 654 | static void it821x_port_stop(struct ata_port *ap) { | 654 | static void it821x_port_stop(struct ata_port *ap) { |
| 655 | kfree(ap->private_data); | 655 | kfree(ap->private_data); |
| 656 | ap->private_data = NULL; /* We want an OOPS if we reuse this | 656 | ap->private_data = NULL; /* We want an OOPS if we reuse this |
| @@ -684,7 +684,7 @@ static struct ata_port_operations it821x_smart_port_ops = { | |||
| 684 | .tf_load = ata_tf_load, | 684 | .tf_load = ata_tf_load, |
| 685 | .tf_read = ata_tf_read, | 685 | .tf_read = ata_tf_read, |
| 686 | .mode_filter = ata_pci_default_filter, | 686 | .mode_filter = ata_pci_default_filter, |
| 687 | 687 | ||
| 688 | .check_status = ata_check_status, | 688 | .check_status = ata_check_status, |
| 689 | .check_atapi_dma= it821x_check_atapi_dma, | 689 | .check_atapi_dma= it821x_check_atapi_dma, |
| 690 | .exec_command = ata_exec_command, | 690 | .exec_command = ata_exec_command, |
| @@ -712,14 +712,14 @@ static struct ata_port_operations it821x_smart_port_ops = { | |||
| 712 | .port_start = it821x_port_start, | 712 | .port_start = it821x_port_start, |
| 713 | .port_stop = it821x_port_stop, | 713 | .port_stop = it821x_port_stop, |
| 714 | .host_stop = ata_host_stop | 714 | .host_stop = ata_host_stop |
| 715 | }; | 715 | }; |
| 716 | 716 | ||
| 717 | static struct ata_port_operations it821x_passthru_port_ops = { | 717 | static struct ata_port_operations it821x_passthru_port_ops = { |
| 718 | .port_disable = ata_port_disable, | 718 | .port_disable = ata_port_disable, |
| 719 | .set_piomode = it821x_passthru_set_piomode, | 719 | .set_piomode = it821x_passthru_set_piomode, |
| 720 | .set_dmamode = it821x_passthru_set_dmamode, | 720 | .set_dmamode = it821x_passthru_set_dmamode, |
| 721 | .mode_filter = ata_pci_default_filter, | 721 | .mode_filter = ata_pci_default_filter, |
| 722 | 722 | ||
| 723 | .tf_load = ata_tf_load, | 723 | .tf_load = ata_tf_load, |
| 724 | .tf_read = ata_tf_read, | 724 | .tf_read = ata_tf_read, |
| 725 | .check_status = ata_check_status, | 725 | .check_status = ata_check_status, |
| @@ -748,7 +748,7 @@ static struct ata_port_operations it821x_passthru_port_ops = { | |||
| 748 | .port_start = it821x_port_start, | 748 | .port_start = it821x_port_start, |
| 749 | .port_stop = it821x_port_stop, | 749 | .port_stop = it821x_port_stop, |
| 750 | .host_stop = ata_host_stop | 750 | .host_stop = ata_host_stop |
| 751 | }; | 751 | }; |
| 752 | 752 | ||
| 753 | static void __devinit it821x_disable_raid(struct pci_dev *pdev) | 753 | static void __devinit it821x_disable_raid(struct pci_dev *pdev) |
| 754 | { | 754 | { |
| @@ -767,11 +767,11 @@ static void __devinit it821x_disable_raid(struct pci_dev *pdev) | |||
| 767 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20); | 767 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20); |
| 768 | } | 768 | } |
| 769 | 769 | ||
| 770 | 770 | ||
| 771 | static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 771 | static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
| 772 | { | 772 | { |
| 773 | u8 conf; | 773 | u8 conf; |
| 774 | 774 | ||
| 775 | static struct ata_port_info info_smart = { | 775 | static struct ata_port_info info_smart = { |
| 776 | .sht = &it821x_sht, | 776 | .sht = &it821x_sht, |
| 777 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | 777 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| @@ -788,7 +788,7 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 788 | .port_ops = &it821x_passthru_port_ops | 788 | .port_ops = &it821x_passthru_port_ops |
| 789 | }; | 789 | }; |
| 790 | static struct ata_port_info *port_info[2]; | 790 | static struct ata_port_info *port_info[2]; |
| 791 | 791 | ||
| 792 | static char *mode[2] = { "pass through", "smart" }; | 792 | static char *mode[2] = { "pass through", "smart" }; |
| 793 | 793 | ||
| 794 | /* Force the card into bypass mode if so requested */ | 794 | /* Force the card into bypass mode if so requested */ |
| @@ -798,13 +798,13 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 798 | } | 798 | } |
| 799 | pci_read_config_byte(pdev, 0x50, &conf); | 799 | pci_read_config_byte(pdev, 0x50, &conf); |
| 800 | conf &= 1; | 800 | conf &= 1; |
| 801 | 801 | ||
| 802 | printk(KERN_INFO DRV_NAME ": controller in %s mode.\n", mode[conf]); | 802 | printk(KERN_INFO DRV_NAME ": controller in %s mode.\n", mode[conf]); |
| 803 | if (conf == 0) | 803 | if (conf == 0) |
| 804 | port_info[0] = port_info[1] = &info_passthru; | 804 | port_info[0] = port_info[1] = &info_passthru; |
| 805 | else | 805 | else |
| 806 | port_info[0] = port_info[1] = &info_smart; | 806 | port_info[0] = port_info[1] = &info_smart; |
| 807 | 807 | ||
| 808 | return ata_pci_init_one(pdev, port_info, 2); | 808 | return ata_pci_init_one(pdev, port_info, 2); |
| 809 | } | 809 | } |
| 810 | 810 | ||
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index eb510660b424..ad37c220bb2c 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c | |||
| @@ -211,11 +211,11 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 211 | int pio = adev->pio_mode - XFER_PIO_0; | 211 | int pio = adev->pio_mode - XFER_PIO_0; |
| 212 | u8 rt; | 212 | u8 rt; |
| 213 | unsigned long flags; | 213 | unsigned long flags; |
| 214 | 214 | ||
| 215 | /* Safe as UP only. Force I/Os to occur together */ | 215 | /* Safe as UP only. Force I/Os to occur together */ |
| 216 | 216 | ||
| 217 | local_irq_save(flags); | 217 | local_irq_save(flags); |
| 218 | 218 | ||
| 219 | /* Unlock the control interface */ | 219 | /* Unlock the control interface */ |
| 220 | do | 220 | do |
| 221 | { | 221 | { |
| @@ -230,7 +230,7 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 230 | while((inb(0x1F2) & 0x80) && --tries); | 230 | while((inb(0x1F2) & 0x80) && --tries); |
| 231 | 231 | ||
| 232 | local_irq_restore(flags); | 232 | local_irq_restore(flags); |
| 233 | 233 | ||
| 234 | outb(inb(0x1F4) & 0x07, 0x1F4); | 234 | outb(inb(0x1F4) & 0x07, 0x1F4); |
| 235 | 235 | ||
| 236 | rt = inb(0x1F3); | 236 | rt = inb(0x1F3); |
| @@ -425,7 +425,7 @@ static struct ata_port_operations ht6560b_port_ops = { | |||
| 425 | /* | 425 | /* |
| 426 | * Opti core chipset helpers | 426 | * Opti core chipset helpers |
| 427 | */ | 427 | */ |
| 428 | 428 | ||
| 429 | /** | 429 | /** |
| 430 | * opti_syscfg - read OPTI chipset configuration | 430 | * opti_syscfg - read OPTI chipset configuration |
| 431 | * @reg: Configuration register to read | 431 | * @reg: Configuration register to read |
| @@ -437,7 +437,7 @@ static u8 opti_syscfg(u8 reg) | |||
| 437 | { | 437 | { |
| 438 | unsigned long flags; | 438 | unsigned long flags; |
| 439 | u8 r; | 439 | u8 r; |
| 440 | 440 | ||
| 441 | /* Uniprocessor chipset and must force cycles adjancent */ | 441 | /* Uniprocessor chipset and must force cycles adjancent */ |
| 442 | local_irq_save(flags); | 442 | local_irq_save(flags); |
| 443 | outb(reg, 0x22); | 443 | outb(reg, 0x22); |
| @@ -719,7 +719,7 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl | |||
| 719 | } | 719 | } |
| 720 | 720 | ||
| 721 | /* Probe for automatically detectable controllers */ | 721 | /* Probe for automatically detectable controllers */ |
| 722 | 722 | ||
| 723 | if (io == 0x1F0 && ops == &legacy_port_ops) { | 723 | if (io == 0x1F0 && ops == &legacy_port_ops) { |
| 724 | unsigned long flags; | 724 | unsigned long flags; |
| 725 | 725 | ||
| @@ -868,7 +868,7 @@ static __init int legacy_init(void) | |||
| 868 | last_port = 2; | 868 | last_port = 2; |
| 869 | } | 869 | } |
| 870 | 870 | ||
| 871 | /* If an OPTI 82C46X is present find out where the channels are */ | 871 | /* If an OPTI 82C46X is present find out where the channels are */ |
| 872 | if (opti82c46x) { | 872 | if (opti82c46x) { |
| 873 | static const char *optis[4] = { | 873 | static const char *optis[4] = { |
| 874 | "3/463MV", "5MV", | 874 | "3/463MV", "5MV", |
| @@ -876,7 +876,7 @@ static __init int legacy_init(void) | |||
| 876 | }; | 876 | }; |
| 877 | u8 chans = 1; | 877 | u8 chans = 1; |
| 878 | u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6; | 878 | u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6; |
| 879 | 879 | ||
| 880 | opti82c46x = 3; /* Assume master and slave first */ | 880 | opti82c46x = 3; /* Assume master and slave first */ |
| 881 | printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n", optis[ctrl]); | 881 | printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n", optis[ctrl]); |
| 882 | if (ctrl == 3) | 882 | if (ctrl == 3) |
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c index e3a85778cd4f..16cb254cb973 100644 --- a/drivers/ata/pata_netcell.c +++ b/drivers/ata/pata_netcell.c | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | * | 24 | * |
| 25 | * Cables are handled by the RAID controller. Report 80 pin. | 25 | * Cables are handled by the RAID controller. Report 80 pin. |
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | static int netcell_pre_reset(struct ata_port *ap) | 28 | static int netcell_pre_reset(struct ata_port *ap) |
| 29 | { | 29 | { |
| 30 | ap->cbl = ATA_CBL_PATA80; | 30 | ap->cbl = ATA_CBL_PATA80; |
| @@ -137,7 +137,7 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e | |||
| 137 | 137 | ||
| 138 | /* Any chip specific setup/optimisation/messages here */ | 138 | /* Any chip specific setup/optimisation/messages here */ |
| 139 | ata_pci_clear_simplex(pdev); | 139 | ata_pci_clear_simplex(pdev); |
| 140 | 140 | ||
| 141 | /* And let the library code do the work */ | 141 | /* And let the library code do the work */ |
| 142 | return ata_pci_init_one(pdev, port_info, 2); | 142 | return ata_pci_init_one(pdev, port_info, 2); |
| 143 | } | 143 | } |
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c index 800aea7b9444..177a455f4251 100644 --- a/drivers/ata/pata_optidma.c +++ b/drivers/ata/pata_optidma.c | |||
| @@ -51,11 +51,11 @@ static int pci_clock; /* 0 = 33 1 = 25 */ | |||
| 51 | * | 51 | * |
| 52 | * Set up cable type and use generic probe init | 52 | * Set up cable type and use generic probe init |
| 53 | */ | 53 | */ |
| 54 | 54 | ||
| 55 | static int optidma_pre_reset(struct ata_port *ap) | 55 | static int optidma_pre_reset(struct ata_port *ap) |
| 56 | { | 56 | { |
| 57 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 57 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 58 | static const struct pci_bits optidma_enable_bits = { | 58 | static const struct pci_bits optidma_enable_bits = { |
| 59 | 0x40, 1, 0x08, 0x00 | 59 | 0x40, 1, 0x08, 0x00 |
| 60 | }; | 60 | }; |
| 61 | 61 | ||
| @@ -90,11 +90,11 @@ static void optidma_error_handler(struct ata_port *ap) | |||
| 90 | * Unlock the control register block for this adapter. Registers must not | 90 | * Unlock the control register block for this adapter. Registers must not |
| 91 | * be unlocked in a situation where libata might look at them. | 91 | * be unlocked in a situation where libata might look at them. |
| 92 | */ | 92 | */ |
| 93 | 93 | ||
| 94 | static void optidma_unlock(struct ata_port *ap) | 94 | static void optidma_unlock(struct ata_port *ap) |
| 95 | { | 95 | { |
| 96 | unsigned long regio = ap->ioaddr.cmd_addr; | 96 | unsigned long regio = ap->ioaddr.cmd_addr; |
| 97 | 97 | ||
| 98 | /* These 3 unlock the control register access */ | 98 | /* These 3 unlock the control register access */ |
| 99 | inw(regio + 1); | 99 | inw(regio + 1); |
| 100 | inw(regio + 1); | 100 | inw(regio + 1); |
| @@ -107,11 +107,11 @@ static void optidma_unlock(struct ata_port *ap) | |||
| 107 | * | 107 | * |
| 108 | * Re-lock the configuration register settings. | 108 | * Re-lock the configuration register settings. |
| 109 | */ | 109 | */ |
| 110 | 110 | ||
| 111 | static void optidma_lock(struct ata_port *ap) | 111 | static void optidma_lock(struct ata_port *ap) |
| 112 | { | 112 | { |
| 113 | unsigned long regio = ap->ioaddr.cmd_addr; | 113 | unsigned long regio = ap->ioaddr.cmd_addr; |
| 114 | 114 | ||
| 115 | /* Relock */ | 115 | /* Relock */ |
| 116 | outb(0x83, regio + 2); | 116 | outb(0x83, regio + 2); |
| 117 | } | 117 | } |
| @@ -154,7 +154,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo | |||
| 154 | 154 | ||
| 155 | /* Switch from IDE to control mode */ | 155 | /* Switch from IDE to control mode */ |
| 156 | optidma_unlock(ap); | 156 | optidma_unlock(ap); |
| 157 | 157 | ||
| 158 | 158 | ||
| 159 | /* | 159 | /* |
| 160 | * As with many controllers the address setup time is shared | 160 | * As with many controllers the address setup time is shared |
| @@ -166,7 +166,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo | |||
| 166 | addr = 0; | 166 | addr = 0; |
| 167 | else | 167 | else |
| 168 | addr = addr_timing[pci_clock][pio]; | 168 | addr = addr_timing[pci_clock][pio]; |
| 169 | 169 | ||
| 170 | if (pair) { | 170 | if (pair) { |
| 171 | u8 pair_addr; | 171 | u8 pair_addr; |
| 172 | /* Hardware constraint */ | 172 | /* Hardware constraint */ |
| @@ -177,7 +177,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo | |||
| 177 | if (pair_addr > addr) | 177 | if (pair_addr > addr) |
| 178 | addr = pair_addr; | 178 | addr = pair_addr; |
| 179 | } | 179 | } |
| 180 | 180 | ||
| 181 | /* Commence primary programming sequence */ | 181 | /* Commence primary programming sequence */ |
| 182 | /* First we load the device number into the timing select */ | 182 | /* First we load the device number into the timing select */ |
| 183 | outb(adev->devno, regio + MISC_REG); | 183 | outb(adev->devno, regio + MISC_REG); |
| @@ -194,10 +194,10 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo | |||
| 194 | 194 | ||
| 195 | /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ | 195 | /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ |
| 196 | outb(0x85, regio + CNTRL_REG); | 196 | outb(0x85, regio + CNTRL_REG); |
| 197 | 197 | ||
| 198 | /* Switch back to IDE mode */ | 198 | /* Switch back to IDE mode */ |
| 199 | optidma_lock(ap); | 199 | optidma_lock(ap); |
| 200 | 200 | ||
| 201 | /* Note: at this point our programming is incomplete. We are | 201 | /* Note: at this point our programming is incomplete. We are |
| 202 | not supposed to program PCI 0x43 "things we hacked onto the chip" | 202 | not supposed to program PCI 0x43 "things we hacked onto the chip" |
| 203 | until we've done both sets of PIO/DMA timings */ | 203 | until we've done both sets of PIO/DMA timings */ |
| @@ -223,7 +223,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m | |||
| 223 | int dev2 = 2 * adev->devno; | 223 | int dev2 = 2 * adev->devno; |
| 224 | int unit = 2 * ap->port_no + adev->devno; | 224 | int unit = 2 * ap->port_no + adev->devno; |
| 225 | int udma = mode - XFER_UDMA_0; | 225 | int udma = mode - XFER_UDMA_0; |
| 226 | 226 | ||
| 227 | pci_read_config_byte(pdev, 0x44, &udcfg); | 227 | pci_read_config_byte(pdev, 0x44, &udcfg); |
| 228 | if (mode <= XFER_UDMA_0) { | 228 | if (mode <= XFER_UDMA_0) { |
| 229 | udcfg &= ~(1 << unit); | 229 | udcfg &= ~(1 << unit); |
| @@ -252,7 +252,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m | |||
| 252 | * DMA programming. The architecture of the Firestar makes it easier | 252 | * DMA programming. The architecture of the Firestar makes it easier |
| 253 | * for us to have a common function so we provide wrappers | 253 | * for us to have a common function so we provide wrappers |
| 254 | */ | 254 | */ |
| 255 | 255 | ||
| 256 | static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) | 256 | static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) |
| 257 | { | 257 | { |
| 258 | optidma_set_mode(ap, adev, adev->pio_mode); | 258 | optidma_set_mode(ap, adev, adev->pio_mode); |
| @@ -267,7 +267,7 @@ static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) | |||
| 267 | * DMA programming. The architecture of the Firestar makes it easier | 267 | * DMA programming. The architecture of the Firestar makes it easier |
| 268 | * for us to have a common function so we provide wrappers | 268 | * for us to have a common function so we provide wrappers |
| 269 | */ | 269 | */ |
| 270 | 270 | ||
| 271 | static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) | 271 | static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) |
| 272 | { | 272 | { |
| 273 | optidma_set_mode(ap, adev, adev->dma_mode); | 273 | optidma_set_mode(ap, adev, adev->dma_mode); |
| @@ -282,7 +282,7 @@ static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) | |||
| 282 | * DMA programming. The architecture of the Firestar makes it easier | 282 | * DMA programming. The architecture of the Firestar makes it easier |
| 283 | * for us to have a common function so we provide wrappers | 283 | * for us to have a common function so we provide wrappers |
| 284 | */ | 284 | */ |
| 285 | 285 | ||
| 286 | static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) | 286 | static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) |
| 287 | { | 287 | { |
| 288 | optiplus_set_mode(ap, adev, adev->pio_mode); | 288 | optiplus_set_mode(ap, adev, adev->pio_mode); |
| @@ -297,7 +297,7 @@ static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) | |||
| 297 | * DMA programming. The architecture of the Firestar makes it easier | 297 | * DMA programming. The architecture of the Firestar makes it easier |
| 298 | * for us to have a common function so we provide wrappers | 298 | * for us to have a common function so we provide wrappers |
| 299 | */ | 299 | */ |
| 300 | 300 | ||
| 301 | static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) | 301 | static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) |
| 302 | { | 302 | { |
| 303 | optiplus_set_mode(ap, adev, adev->dma_mode); | 303 | optiplus_set_mode(ap, adev, adev->dma_mode); |
| @@ -310,7 +310,7 @@ static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) | |||
| 310 | * Turn the ATA device setup into PCI configuration bits | 310 | * Turn the ATA device setup into PCI configuration bits |
| 311 | * for register 0x43 and return the two bits needed. | 311 | * for register 0x43 and return the two bits needed. |
| 312 | */ | 312 | */ |
| 313 | 313 | ||
| 314 | static u8 optidma_make_bits43(struct ata_device *adev) | 314 | static u8 optidma_make_bits43(struct ata_device *adev) |
| 315 | { | 315 | { |
| 316 | static const u8 bits43[5] = { | 316 | static const u8 bits43[5] = { |
| @@ -330,17 +330,17 @@ static u8 optidma_make_bits43(struct ata_device *adev) | |||
| 330 | * Finalise the configuration by writing the nibble of extra bits | 330 | * Finalise the configuration by writing the nibble of extra bits |
| 331 | * of data into the chip. | 331 | * of data into the chip. |
| 332 | */ | 332 | */ |
| 333 | 333 | ||
| 334 | static void optidma_post_set_mode(struct ata_port *ap) | 334 | static void optidma_post_set_mode(struct ata_port *ap) |
| 335 | { | 335 | { |
| 336 | u8 r; | 336 | u8 r; |
| 337 | int nybble = 4 * ap->port_no; | 337 | int nybble = 4 * ap->port_no; |
| 338 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 338 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 339 | 339 | ||
| 340 | pci_read_config_byte(pdev, 0x43, &r); | 340 | pci_read_config_byte(pdev, 0x43, &r); |
| 341 | 341 | ||
| 342 | r &= (0x0F << nybble); | 342 | r &= (0x0F << nybble); |
| 343 | r |= (optidma_make_bits43(&ap->device[0]) + | 343 | r |= (optidma_make_bits43(&ap->device[0]) + |
| 344 | (optidma_make_bits43(&ap->device[0]) << 2)) << nybble; | 344 | (optidma_make_bits43(&ap->device[0]) << 2)) << nybble; |
| 345 | 345 | ||
| 346 | pci_write_config_byte(pdev, 0x43, r); | 346 | pci_write_config_byte(pdev, 0x43, r); |
| @@ -438,19 +438,19 @@ static struct ata_port_operations optiplus_port_ops = { | |||
| 438 | * optiplus_with_udma - Look for UDMA capable setup | 438 | * optiplus_with_udma - Look for UDMA capable setup |
| 439 | * @pdev; ATA controller | 439 | * @pdev; ATA controller |
| 440 | */ | 440 | */ |
| 441 | 441 | ||
| 442 | static int optiplus_with_udma(struct pci_dev *pdev) | 442 | static int optiplus_with_udma(struct pci_dev *pdev) |
| 443 | { | 443 | { |
| 444 | u8 r; | 444 | u8 r; |
| 445 | int ret = 0; | 445 | int ret = 0; |
| 446 | int ioport = 0x22; | 446 | int ioport = 0x22; |
| 447 | struct pci_dev *dev1; | 447 | struct pci_dev *dev1; |
| 448 | 448 | ||
| 449 | /* Find function 1 */ | 449 | /* Find function 1 */ |
| 450 | dev1 = pci_get_device(0x1045, 0xC701, NULL); | 450 | dev1 = pci_get_device(0x1045, 0xC701, NULL); |
| 451 | if(dev1 == NULL) | 451 | if(dev1 == NULL) |
| 452 | return 0; | 452 | return 0; |
| 453 | 453 | ||
| 454 | /* Rev must be >= 0x10 */ | 454 | /* Rev must be >= 0x10 */ |
| 455 | pci_read_config_byte(dev1, 0x08, &r); | 455 | pci_read_config_byte(dev1, 0x08, &r); |
| 456 | if (r < 0x10) | 456 | if (r < 0x10) |
| @@ -470,7 +470,7 @@ static int optiplus_with_udma(struct pci_dev *pdev) | |||
| 470 | pci_read_config_byte(dev1, 0x52, &r); | 470 | pci_read_config_byte(dev1, 0x52, &r); |
| 471 | if (r & 0x80) /* IDEDIR disabled */ | 471 | if (r & 0x80) /* IDEDIR disabled */ |
| 472 | ret = 1; | 472 | ret = 1; |
| 473 | done: | 473 | done: |
| 474 | printk(KERN_WARNING "UDMA not supported in this configuration.\n"); | 474 | printk(KERN_WARNING "UDMA not supported in this configuration.\n"); |
| 475 | done_nomsg: /* Wrong chip revision */ | 475 | done_nomsg: /* Wrong chip revision */ |
| 476 | pci_dev_put(dev1); | 476 | pci_dev_put(dev1); |
| @@ -505,7 +505,7 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 505 | inw(0x1F1); | 505 | inw(0x1F1); |
| 506 | inw(0x1F1); | 506 | inw(0x1F1); |
| 507 | pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */ | 507 | pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */ |
| 508 | 508 | ||
| 509 | if (optiplus_with_udma(dev)) | 509 | if (optiplus_with_udma(dev)) |
| 510 | info = &info_82c700_udma; | 510 | info = &info_82c700_udma; |
| 511 | 511 | ||
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c index 2abe0a3bbb92..62b25cda409b 100644 --- a/drivers/ata/pata_pcmcia.c +++ b/drivers/ata/pata_pcmcia.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * pata_pcmcia.c - PCMCIA PATA controller driver. | 2 | * pata_pcmcia.c - PCMCIA PATA controller driver. |
| 3 | * Copyright 2005-2006 Red Hat Inc <alan@redhat.com>, all rights reserved. | 3 | * Copyright 2005-2006 Red Hat Inc <alan@redhat.com>, all rights reserved. |
| 4 | * PCMCIA ident update Copyright 2006 Marcin Juszkiewicz | 4 | * PCMCIA ident update Copyright 2006 Marcin Juszkiewicz |
| 5 | * <openembedded@hrw.one.pl> | 5 | * <openembedded@hrw.one.pl> |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c index 6cb52b0e7696..48f43432764e 100644 --- a/drivers/ata/pata_pdc202xx_old.c +++ b/drivers/ata/pata_pdc202xx_old.c | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | * TODO: | 10 | * TODO: |
| 11 | * Channel interlock/reset on both required ? | 11 | * Channel interlock/reset on both required ? |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
| 16 | #include <linux/pci.h> | 16 | #include <linux/pci.h> |
| @@ -29,7 +29,7 @@ | |||
| 29 | * | 29 | * |
| 30 | * Set up cable type and use generic probe init | 30 | * Set up cable type and use generic probe init |
| 31 | */ | 31 | */ |
| 32 | 32 | ||
| 33 | static int pdc2024x_pre_reset(struct ata_port *ap) | 33 | static int pdc2024x_pre_reset(struct ata_port *ap) |
| 34 | { | 34 | { |
| 35 | ap->cbl = ATA_CBL_PATA40; | 35 | ap->cbl = ATA_CBL_PATA40; |
| @@ -47,7 +47,7 @@ static int pdc2026x_pre_reset(struct ata_port *ap) | |||
| 47 | { | 47 | { |
| 48 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 48 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 49 | u16 cis; | 49 | u16 cis; |
| 50 | 50 | ||
| 51 | pci_read_config_word(pdev, 0x50, &cis); | 51 | pci_read_config_word(pdev, 0x50, &cis); |
| 52 | if (cis & (1 << (10 + ap->port_no))) | 52 | if (cis & (1 << (10 + ap->port_no))) |
| 53 | ap->cbl = ATA_CBL_PATA80; | 53 | ap->cbl = ATA_CBL_PATA80; |
| @@ -72,7 +72,7 @@ static void pdc2026x_error_handler(struct ata_port *ap) | |||
| 72 | * so a configure_dmamode call will undo any work we do here and vice | 72 | * so a configure_dmamode call will undo any work we do here and vice |
| 73 | * versa | 73 | * versa |
| 74 | */ | 74 | */ |
| 75 | 75 | ||
| 76 | static void pdc_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) | 76 | static void pdc_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) |
| 77 | { | 77 | { |
| 78 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 78 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -88,7 +88,7 @@ static void pdc_configure_piomode(struct ata_port *ap, struct ata_device *adev, | |||
| 88 | r_bp &= ~0x07; | 88 | r_bp &= ~0x07; |
| 89 | r_ap |= (pio_timing[pio] >> 8); | 89 | r_ap |= (pio_timing[pio] >> 8); |
| 90 | r_bp |= (pio_timing[pio] & 0xFF); | 90 | r_bp |= (pio_timing[pio] & 0xFF); |
| 91 | 91 | ||
| 92 | if (ata_pio_need_iordy(adev)) | 92 | if (ata_pio_need_iordy(adev)) |
| 93 | r_ap |= 0x20; /* IORDY enable */ | 93 | r_ap |= 0x20; /* IORDY enable */ |
| 94 | if (adev->class == ATA_DEV_ATA) | 94 | if (adev->class == ATA_DEV_ATA) |
| @@ -105,7 +105,7 @@ static void pdc_configure_piomode(struct ata_port *ap, struct ata_device *adev, | |||
| 105 | * Called to do the PIO mode setup. Our timing registers are shared | 105 | * Called to do the PIO mode setup. Our timing registers are shared |
| 106 | * but we want to set the PIO timing by default. | 106 | * but we want to set the PIO timing by default. |
| 107 | */ | 107 | */ |
| 108 | 108 | ||
| 109 | static void pdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | 109 | static void pdc_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 110 | { | 110 | { |
| 111 | pdc_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); | 111 | pdc_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
| @@ -119,7 +119,7 @@ static void pdc_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 119 | * Load DMA cycle times into the chip ready for a DMA transfer | 119 | * Load DMA cycle times into the chip ready for a DMA transfer |
| 120 | * to occur. | 120 | * to occur. |
| 121 | */ | 121 | */ |
| 122 | 122 | ||
| 123 | static void pdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 123 | static void pdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 124 | { | 124 | { |
| 125 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 125 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -130,21 +130,21 @@ static void pdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 130 | { 0x20, 0x01 }, | 130 | { 0x20, 0x01 }, |
| 131 | { 0x40, 0x02 }, /* 66 Mhz Clock */ | 131 | { 0x40, 0x02 }, /* 66 Mhz Clock */ |
| 132 | { 0x20, 0x01 }, | 132 | { 0x20, 0x01 }, |
| 133 | { 0x20, 0x01 } | 133 | { 0x20, 0x01 } |
| 134 | }; | 134 | }; |
| 135 | u8 r_bp, r_cp; | 135 | u8 r_bp, r_cp; |
| 136 | 136 | ||
| 137 | pci_read_config_byte(pdev, port + 1, &r_bp); | 137 | pci_read_config_byte(pdev, port + 1, &r_bp); |
| 138 | pci_read_config_byte(pdev, port + 2, &r_cp); | 138 | pci_read_config_byte(pdev, port + 2, &r_cp); |
| 139 | 139 | ||
| 140 | r_bp &= ~0xF0; | 140 | r_bp &= ~0xF0; |
| 141 | r_cp &= ~0x0F; | 141 | r_cp &= ~0x0F; |
| 142 | 142 | ||
| 143 | if (adev->dma_mode >= XFER_UDMA_0) { | 143 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 144 | int speed = adev->dma_mode - XFER_UDMA_0; | 144 | int speed = adev->dma_mode - XFER_UDMA_0; |
| 145 | r_bp |= udma_timing[speed][0]; | 145 | r_bp |= udma_timing[speed][0]; |
| 146 | r_cp |= udma_timing[speed][1]; | 146 | r_cp |= udma_timing[speed][1]; |
| 147 | 147 | ||
| 148 | } else { | 148 | } else { |
| 149 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 149 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 150 | r_bp |= 0x60; | 150 | r_bp |= 0x60; |
| @@ -152,7 +152,7 @@ static void pdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 152 | } | 152 | } |
| 153 | pci_write_config_byte(pdev, port + 1, r_bp); | 153 | pci_write_config_byte(pdev, port + 1, r_bp); |
| 154 | pci_write_config_byte(pdev, port + 2, r_cp); | 154 | pci_write_config_byte(pdev, port + 2, r_cp); |
| 155 | 155 | ||
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | /** | 158 | /** |
| @@ -162,7 +162,7 @@ static void pdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 162 | * In UDMA3 or higher we have to clock switch for the duration of the | 162 | * In UDMA3 or higher we have to clock switch for the duration of the |
| 163 | * DMA transfer sequence. | 163 | * DMA transfer sequence. |
| 164 | */ | 164 | */ |
| 165 | 165 | ||
| 166 | static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) | 166 | static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) |
| 167 | { | 167 | { |
| 168 | struct ata_port *ap = qc->ap; | 168 | struct ata_port *ap = qc->ap; |
| @@ -173,16 +173,16 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) | |||
| 173 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; | 173 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; |
| 174 | unsigned long clock = master + 0x11; | 174 | unsigned long clock = master + 0x11; |
| 175 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); | 175 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); |
| 176 | 176 | ||
| 177 | u32 len; | 177 | u32 len; |
| 178 | 178 | ||
| 179 | /* Check we keep host level locking here */ | 179 | /* Check we keep host level locking here */ |
| 180 | if (adev->dma_mode >= XFER_UDMA_2) | 180 | if (adev->dma_mode >= XFER_UDMA_2) |
| 181 | outb(inb(clock) | sel66, clock); | 181 | outb(inb(clock) | sel66, clock); |
| 182 | else | 182 | else |
| 183 | outb(inb(clock) & ~sel66, clock); | 183 | outb(inb(clock) & ~sel66, clock); |
| 184 | 184 | ||
| 185 | /* The DMA clocks may have been trashed by a reset. FIXME: make conditional | 185 | /* The DMA clocks may have been trashed by a reset. FIXME: make conditional |
| 186 | and move to qc_issue ? */ | 186 | and move to qc_issue ? */ |
| 187 | pdc_set_dmamode(ap, qc->dev); | 187 | pdc_set_dmamode(ap, qc->dev); |
| 188 | 188 | ||
| @@ -193,16 +193,16 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) | |||
| 193 | len = qc->nsect * 512; | 193 | len = qc->nsect * 512; |
| 194 | else | 194 | else |
| 195 | len = qc->nbytes; | 195 | len = qc->nbytes; |
| 196 | 196 | ||
| 197 | if (tf->flags & ATA_TFLAG_WRITE) | 197 | if (tf->flags & ATA_TFLAG_WRITE) |
| 198 | len |= 0x06000000; | 198 | len |= 0x06000000; |
| 199 | else | 199 | else |
| 200 | len |= 0x05000000; | 200 | len |= 0x05000000; |
| 201 | 201 | ||
| 202 | outl(len, atapi_reg); | 202 | outl(len, atapi_reg); |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | /* Activate DMA */ | 205 | /* Activate DMA */ |
| 206 | ata_bmdma_start(qc); | 206 | ata_bmdma_start(qc); |
| 207 | } | 207 | } |
| 208 | 208 | ||
| @@ -213,19 +213,19 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) | |||
| 213 | * After a DMA completes we need to put the clock back to 33MHz for | 213 | * After a DMA completes we need to put the clock back to 33MHz for |
| 214 | * PIO timings. | 214 | * PIO timings. |
| 215 | */ | 215 | */ |
| 216 | 216 | ||
| 217 | static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) | 217 | static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) |
| 218 | { | 218 | { |
| 219 | struct ata_port *ap = qc->ap; | 219 | struct ata_port *ap = qc->ap; |
| 220 | struct ata_device *adev = qc->dev; | 220 | struct ata_device *adev = qc->dev; |
| 221 | struct ata_taskfile *tf = &qc->tf; | 221 | struct ata_taskfile *tf = &qc->tf; |
| 222 | 222 | ||
| 223 | int sel66 = ap->port_no ? 0x08: 0x02; | 223 | int sel66 = ap->port_no ? 0x08: 0x02; |
| 224 | /* The clock bits are in the same register for both channels */ | 224 | /* The clock bits are in the same register for both channels */ |
| 225 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; | 225 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; |
| 226 | unsigned long clock = master + 0x11; | 226 | unsigned long clock = master + 0x11; |
| 227 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); | 227 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); |
| 228 | 228 | ||
| 229 | /* Cases the state machine will not complete correctly */ | 229 | /* Cases the state machine will not complete correctly */ |
| 230 | if (tf->protocol == ATA_PROT_ATAPI_DMA || ( tf->flags & ATA_TFLAG_LBA48)) { | 230 | if (tf->protocol == ATA_PROT_ATAPI_DMA || ( tf->flags & ATA_TFLAG_LBA48)) { |
| 231 | outl(0, atapi_reg); | 231 | outl(0, atapi_reg); |
| @@ -248,7 +248,7 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) | |||
| 248 | * sizes to 8bit to avoid making the state engine on the 2026x cards | 248 | * sizes to 8bit to avoid making the state engine on the 2026x cards |
| 249 | * barf. | 249 | * barf. |
| 250 | */ | 250 | */ |
| 251 | 251 | ||
| 252 | static void pdc2026x_dev_config(struct ata_port *ap, struct ata_device *adev) | 252 | static void pdc2026x_dev_config(struct ata_port *ap, struct ata_device *adev) |
| 253 | { | 253 | { |
| 254 | adev->max_sectors = 256; | 254 | adev->max_sectors = 256; |
| @@ -299,11 +299,11 @@ static struct ata_port_operations pdc2024x_port_ops = { | |||
| 299 | 299 | ||
| 300 | .irq_handler = ata_interrupt, | 300 | .irq_handler = ata_interrupt, |
| 301 | .irq_clear = ata_bmdma_irq_clear, | 301 | .irq_clear = ata_bmdma_irq_clear, |
| 302 | 302 | ||
| 303 | .port_start = ata_port_start, | 303 | .port_start = ata_port_start, |
| 304 | .port_stop = ata_port_stop, | 304 | .port_stop = ata_port_stop, |
| 305 | .host_stop = ata_host_stop | 305 | .host_stop = ata_host_stop |
| 306 | }; | 306 | }; |
| 307 | 307 | ||
| 308 | static struct ata_port_operations pdc2026x_port_ops = { | 308 | static struct ata_port_operations pdc2026x_port_ops = { |
| 309 | .port_disable = ata_port_disable, | 309 | .port_disable = ata_port_disable, |
| @@ -333,11 +333,11 @@ static struct ata_port_operations pdc2026x_port_ops = { | |||
| 333 | 333 | ||
| 334 | .irq_handler = ata_interrupt, | 334 | .irq_handler = ata_interrupt, |
| 335 | .irq_clear = ata_bmdma_irq_clear, | 335 | .irq_clear = ata_bmdma_irq_clear, |
| 336 | 336 | ||
| 337 | .port_start = ata_port_start, | 337 | .port_start = ata_port_start, |
| 338 | .port_stop = ata_port_stop, | 338 | .port_stop = ata_port_stop, |
| 339 | .host_stop = ata_host_stop | 339 | .host_stop = ata_host_stop |
| 340 | }; | 340 | }; |
| 341 | 341 | ||
| 342 | static int pdc_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 342 | static int pdc_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 343 | { | 343 | { |
| @@ -349,7 +349,7 @@ static int pdc_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 349 | .mwdma_mask = 0x07, | 349 | .mwdma_mask = 0x07, |
| 350 | .udma_mask = ATA_UDMA2, | 350 | .udma_mask = ATA_UDMA2, |
| 351 | .port_ops = &pdc2024x_port_ops | 351 | .port_ops = &pdc2024x_port_ops |
| 352 | }, | 352 | }, |
| 353 | { | 353 | { |
| 354 | .sht = &pdc_sht, | 354 | .sht = &pdc_sht, |
| 355 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | 355 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| @@ -366,12 +366,12 @@ static int pdc_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 366 | .udma_mask = ATA_UDMA5, | 366 | .udma_mask = ATA_UDMA5, |
| 367 | .port_ops = &pdc2026x_port_ops | 367 | .port_ops = &pdc2026x_port_ops |
| 368 | } | 368 | } |
| 369 | 369 | ||
| 370 | }; | 370 | }; |
| 371 | static struct ata_port_info *port_info[2]; | 371 | static struct ata_port_info *port_info[2]; |
| 372 | 372 | ||
| 373 | port_info[0] = port_info[1] = &info[id->driver_data]; | 373 | port_info[0] = port_info[1] = &info[id->driver_data]; |
| 374 | 374 | ||
| 375 | if (dev->device == PCI_DEVICE_ID_PROMISE_20265) { | 375 | if (dev->device == PCI_DEVICE_ID_PROMISE_20265) { |
| 376 | struct pci_dev *bridge = dev->bus->self; | 376 | struct pci_dev *bridge = dev->bus->self; |
| 377 | /* Don't grab anything behind a Promise I2O RAID */ | 377 | /* Don't grab anything behind a Promise I2O RAID */ |
diff --git a/drivers/ata/pata_qdi.c b/drivers/ata/pata_qdi.c index ededb40e084d..35cfdf0ac3f0 100644 --- a/drivers/ata/pata_qdi.c +++ b/drivers/ata/pata_qdi.c | |||
| @@ -36,7 +36,7 @@ struct qdi_data { | |||
| 36 | u8 last; | 36 | u8 last; |
| 37 | int fast; | 37 | int fast; |
| 38 | struct platform_device *platform_dev; | 38 | struct platform_device *platform_dev; |
| 39 | 39 | ||
| 40 | }; | 40 | }; |
| 41 | 41 | ||
| 42 | static struct ata_host *qdi_host[NR_HOST]; | 42 | static struct ata_host *qdi_host[NR_HOST]; |
| @@ -58,7 +58,7 @@ static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 58 | 58 | ||
| 59 | /* Get the timing data in cycles */ | 59 | /* Get the timing data in cycles */ |
| 60 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | 60 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); |
| 61 | 61 | ||
| 62 | if (qdi->fast) { | 62 | if (qdi->fast) { |
| 63 | active = 8 - FIT(t.active, 1, 8); | 63 | active = 8 - FIT(t.active, 1, 8); |
| 64 | recovery = 18 - FIT(t.recover, 3, 18); | 64 | recovery = 18 - FIT(t.recover, 3, 18); |
| @@ -67,10 +67,10 @@ static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 67 | recovery = 15 - FIT(t.recover, 0, 15); | 67 | recovery = 15 - FIT(t.recover, 0, 15); |
| 68 | } | 68 | } |
| 69 | timing = (recovery << 4) | active | 0x08; | 69 | timing = (recovery << 4) | active | 0x08; |
| 70 | 70 | ||
| 71 | qdi->clock[adev->devno] = timing; | 71 | qdi->clock[adev->devno] = timing; |
| 72 | 72 | ||
| 73 | outb(timing, qdi->timing); | 73 | outb(timing, qdi->timing); |
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | 76 | static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| @@ -82,7 +82,7 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 82 | 82 | ||
| 83 | /* Get the timing data in cycles */ | 83 | /* Get the timing data in cycles */ |
| 84 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | 84 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); |
| 85 | 85 | ||
| 86 | if (qdi->fast) { | 86 | if (qdi->fast) { |
| 87 | active = 8 - FIT(t.active, 1, 8); | 87 | active = 8 - FIT(t.active, 1, 8); |
| 88 | recovery = 18 - FIT(t.recover, 3, 18); | 88 | recovery = 18 - FIT(t.recover, 3, 18); |
| @@ -91,11 +91,11 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 91 | recovery = 15 - FIT(t.recover, 0, 15); | 91 | recovery = 15 - FIT(t.recover, 0, 15); |
| 92 | } | 92 | } |
| 93 | timing = (recovery << 4) | active | 0x08; | 93 | timing = (recovery << 4) | active | 0x08; |
| 94 | 94 | ||
| 95 | qdi->clock[adev->devno] = timing; | 95 | qdi->clock[adev->devno] = timing; |
| 96 | 96 | ||
| 97 | outb(timing, qdi->timing); | 97 | outb(timing, qdi->timing); |
| 98 | 98 | ||
| 99 | /* Clear the FIFO */ | 99 | /* Clear the FIFO */ |
| 100 | if (adev->class != ATA_DEV_ATA) | 100 | if (adev->class != ATA_DEV_ATA) |
| 101 | outb(0x5F, (qdi->timing & 0xFFF0) + 3); | 101 | outb(0x5F, (qdi->timing & 0xFFF0) + 3); |
| @@ -128,13 +128,13 @@ static void qdi_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned | |||
| 128 | { | 128 | { |
| 129 | struct ata_port *ap = adev->ap; | 129 | struct ata_port *ap = adev->ap; |
| 130 | int slop = buflen & 3; | 130 | int slop = buflen & 3; |
| 131 | 131 | ||
| 132 | if (ata_id_has_dword_io(adev->id)) { | 132 | if (ata_id_has_dword_io(adev->id)) { |
| 133 | if (write_data) | 133 | if (write_data) |
| 134 | outsl(ap->ioaddr.data_addr, buf, buflen >> 2); | 134 | outsl(ap->ioaddr.data_addr, buf, buflen >> 2); |
| 135 | else | 135 | else |
| 136 | insl(ap->ioaddr.data_addr, buf, buflen >> 2); | 136 | insl(ap->ioaddr.data_addr, buf, buflen >> 2); |
| 137 | 137 | ||
| 138 | if (unlikely(slop)) { | 138 | if (unlikely(slop)) { |
| 139 | u32 pad; | 139 | u32 pad; |
| 140 | if (write_data) { | 140 | if (write_data) { |
| @@ -181,7 +181,7 @@ static struct ata_port_operations qdi6500_port_ops = { | |||
| 181 | .thaw = ata_bmdma_thaw, | 181 | .thaw = ata_bmdma_thaw, |
| 182 | .error_handler = ata_bmdma_error_handler, | 182 | .error_handler = ata_bmdma_error_handler, |
| 183 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 183 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 184 | 184 | ||
| 185 | .qc_prep = ata_qc_prep, | 185 | .qc_prep = ata_qc_prep, |
| 186 | .qc_issue = qdi_qc_issue_prot, | 186 | .qc_issue = qdi_qc_issue_prot, |
| 187 | .eng_timeout = ata_eng_timeout, | 187 | .eng_timeout = ata_eng_timeout, |
| @@ -189,11 +189,11 @@ static struct ata_port_operations qdi6500_port_ops = { | |||
| 189 | 189 | ||
| 190 | .irq_handler = ata_interrupt, | 190 | .irq_handler = ata_interrupt, |
| 191 | .irq_clear = ata_bmdma_irq_clear, | 191 | .irq_clear = ata_bmdma_irq_clear, |
| 192 | 192 | ||
| 193 | .port_start = ata_port_start, | 193 | .port_start = ata_port_start, |
| 194 | .port_stop = ata_port_stop, | 194 | .port_stop = ata_port_stop, |
| 195 | .host_stop = ata_host_stop | 195 | .host_stop = ata_host_stop |
| 196 | }; | 196 | }; |
| 197 | 197 | ||
| 198 | static struct ata_port_operations qdi6580_port_ops = { | 198 | static struct ata_port_operations qdi6580_port_ops = { |
| 199 | .port_disable = ata_port_disable, | 199 | .port_disable = ata_port_disable, |
| @@ -209,7 +209,7 @@ static struct ata_port_operations qdi6580_port_ops = { | |||
| 209 | .thaw = ata_bmdma_thaw, | 209 | .thaw = ata_bmdma_thaw, |
| 210 | .error_handler = ata_bmdma_error_handler, | 210 | .error_handler = ata_bmdma_error_handler, |
| 211 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 211 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 212 | 212 | ||
| 213 | .qc_prep = ata_qc_prep, | 213 | .qc_prep = ata_qc_prep, |
| 214 | .qc_issue = qdi_qc_issue_prot, | 214 | .qc_issue = qdi_qc_issue_prot, |
| 215 | .eng_timeout = ata_eng_timeout, | 215 | .eng_timeout = ata_eng_timeout, |
| @@ -217,11 +217,11 @@ static struct ata_port_operations qdi6580_port_ops = { | |||
| 217 | 217 | ||
| 218 | .irq_handler = ata_interrupt, | 218 | .irq_handler = ata_interrupt, |
| 219 | .irq_clear = ata_bmdma_irq_clear, | 219 | .irq_clear = ata_bmdma_irq_clear, |
| 220 | 220 | ||
| 221 | .port_start = ata_port_start, | 221 | .port_start = ata_port_start, |
| 222 | .port_stop = ata_port_stop, | 222 | .port_stop = ata_port_stop, |
| 223 | .host_stop = ata_host_stop | 223 | .host_stop = ata_host_stop |
| 224 | }; | 224 | }; |
| 225 | 225 | ||
| 226 | /** | 226 | /** |
| 227 | * qdi_init_one - attach a qdi interface | 227 | * qdi_init_one - attach a qdi interface |
| @@ -233,7 +233,7 @@ static struct ata_port_operations qdi6580_port_ops = { | |||
| 233 | * Register an ISA bus IDE interface. Such interfaces are PIO and we | 233 | * Register an ISA bus IDE interface. Such interfaces are PIO and we |
| 234 | * assume do not support IRQ sharing. | 234 | * assume do not support IRQ sharing. |
| 235 | */ | 235 | */ |
| 236 | 236 | ||
| 237 | static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast) | 237 | static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast) |
| 238 | { | 238 | { |
| 239 | struct ata_probe_ent ae; | 239 | struct ata_probe_ent ae; |
| @@ -249,11 +249,11 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i | |||
| 249 | pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0); | 249 | pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0); |
| 250 | if (pdev == NULL) | 250 | if (pdev == NULL) |
| 251 | return -ENOMEM; | 251 | return -ENOMEM; |
| 252 | 252 | ||
| 253 | memset(&ae, 0, sizeof(struct ata_probe_ent)); | 253 | memset(&ae, 0, sizeof(struct ata_probe_ent)); |
| 254 | INIT_LIST_HEAD(&ae.node); | 254 | INIT_LIST_HEAD(&ae.node); |
| 255 | ae.dev = &pdev->dev; | 255 | ae.dev = &pdev->dev; |
| 256 | 256 | ||
| 257 | if (type == 6580) { | 257 | if (type == 6580) { |
| 258 | ae.port_ops = &qdi6580_port_ops; | 258 | ae.port_ops = &qdi6580_port_ops; |
| 259 | ae.pio_mask = 0x1F; | 259 | ae.pio_mask = 0x1F; |
| @@ -261,7 +261,7 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i | |||
| 261 | ae.port_ops = &qdi6500_port_ops; | 261 | ae.port_ops = &qdi6500_port_ops; |
| 262 | ae.pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */ | 262 | ae.pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */ |
| 263 | } | 263 | } |
| 264 | 264 | ||
| 265 | ae.sht = &qdi_sht; | 265 | ae.sht = &qdi_sht; |
| 266 | ae.n_ports = 1; | 266 | ae.n_ports = 1; |
| 267 | ae.irq = irq; | 267 | ae.irq = irq; |
| @@ -287,9 +287,9 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i | |||
| 287 | platform_device_unregister(pdev); | 287 | platform_device_unregister(pdev); |
| 288 | return -ENODEV; | 288 | return -ENODEV; |
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev); | 291 | qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev); |
| 292 | return 0; | 292 | return 0; |
| 293 | } | 293 | } |
| 294 | 294 | ||
| 295 | /** | 295 | /** |
| @@ -297,29 +297,29 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i | |||
| 297 | * | 297 | * |
| 298 | * Attach qdi IDE interfaces by scanning the ports it may occupy. | 298 | * Attach qdi IDE interfaces by scanning the ports it may occupy. |
| 299 | */ | 299 | */ |
| 300 | 300 | ||
| 301 | static __init int qdi_init(void) | 301 | static __init int qdi_init(void) |
| 302 | { | 302 | { |
| 303 | unsigned long flags; | 303 | unsigned long flags; |
| 304 | static const unsigned long qd_port[2] = { 0x30, 0xB0 }; | 304 | static const unsigned long qd_port[2] = { 0x30, 0xB0 }; |
| 305 | static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; | 305 | static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; |
| 306 | static const int ide_irq[2] = { 14, 15 }; | 306 | static const int ide_irq[2] = { 14, 15 }; |
| 307 | 307 | ||
| 308 | int ct = 0; | 308 | int ct = 0; |
| 309 | int i; | 309 | int i; |
| 310 | 310 | ||
| 311 | if (probe_qdi == 0) | 311 | if (probe_qdi == 0) |
| 312 | return -ENODEV; | 312 | return -ENODEV; |
| 313 | 313 | ||
| 314 | /* | 314 | /* |
| 315 | * Check each possible QD65xx base address | 315 | * Check each possible QD65xx base address |
| 316 | */ | 316 | */ |
| 317 | 317 | ||
| 318 | for (i = 0; i < 2; i++) { | 318 | for (i = 0; i < 2; i++) { |
| 319 | unsigned long port = qd_port[i]; | 319 | unsigned long port = qd_port[i]; |
| 320 | u8 r, res; | 320 | u8 r, res; |
| 321 | 321 | ||
| 322 | 322 | ||
| 323 | if (request_region(port, 2, "pata_qdi")) { | 323 | if (request_region(port, 2, "pata_qdi")) { |
| 324 | /* Check for a card */ | 324 | /* Check for a card */ |
| 325 | local_irq_save(flags); | 325 | local_irq_save(flags); |
| @@ -328,14 +328,14 @@ static __init int qdi_init(void) | |||
| 328 | res = inb_p(port); | 328 | res = inb_p(port); |
| 329 | outb_p(r, port); | 329 | outb_p(r, port); |
| 330 | local_irq_restore(flags); | 330 | local_irq_restore(flags); |
| 331 | 331 | ||
| 332 | /* Fail */ | 332 | /* Fail */ |
| 333 | if (res == 0x19) | 333 | if (res == 0x19) |
| 334 | { | 334 | { |
| 335 | release_region(port, 2); | 335 | release_region(port, 2); |
| 336 | continue; | 336 | continue; |
| 337 | } | 337 | } |
| 338 | 338 | ||
| 339 | /* Passes the presence test */ | 339 | /* Passes the presence test */ |
| 340 | r = inb_p(port + 1); /* Check port agrees with port set */ | 340 | r = inb_p(port + 1); /* Check port agrees with port set */ |
| 341 | if ((r & 2) >> 1 != i) { | 341 | if ((r & 2) >> 1 != i) { |
| @@ -343,7 +343,7 @@ static __init int qdi_init(void) | |||
| 343 | continue; | 343 | continue; |
| 344 | } | 344 | } |
| 345 | 345 | ||
| 346 | /* Check card type */ | 346 | /* Check card type */ |
| 347 | if ((r & 0xF0) == 0xC0) { | 347 | if ((r & 0xF0) == 0xC0) { |
| 348 | /* QD6500: single channel */ | 348 | /* QD6500: single channel */ |
| 349 | if (r & 8) { | 349 | if (r & 8) { |
| @@ -388,7 +388,7 @@ static __exit void qdi_exit(void) | |||
| 388 | */ | 388 | */ |
| 389 | release_region(qdi_data[i].timing, 2); | 389 | release_region(qdi_data[i].timing, 2); |
| 390 | platform_device_unregister(qdi_data[i].platform_dev); | 390 | platform_device_unregister(qdi_data[i].platform_dev); |
| 391 | } | 391 | } |
| 392 | } | 392 | } |
| 393 | 393 | ||
| 394 | MODULE_AUTHOR("Alan Cox"); | 394 | MODULE_AUTHOR("Alan Cox"); |
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c index 6f7d0527265f..277f8411b521 100644 --- a/drivers/ata/pata_radisys.c +++ b/drivers/ata/pata_radisys.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * | 32 | * |
| 33 | * Set up cable type and use generic probe init | 33 | * Set up cable type and use generic probe init |
| 34 | */ | 34 | */ |
| 35 | 35 | ||
| 36 | static int radisys_pre_reset(struct ata_port *ap) | 36 | static int radisys_pre_reset(struct ata_port *ap) |
| 37 | { | 37 | { |
| 38 | ap->cbl = ATA_CBL_PATA80; | 38 | ap->cbl = ATA_CBL_PATA80; |
| @@ -122,7 +122,7 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
| 122 | struct pci_dev *dev = to_pci_dev(ap->host->dev); | 122 | struct pci_dev *dev = to_pci_dev(ap->host->dev); |
| 123 | u16 idetm_data; | 123 | u16 idetm_data; |
| 124 | u8 udma_enable; | 124 | u8 udma_enable; |
| 125 | 125 | ||
| 126 | static const /* ISP RTC */ | 126 | static const /* ISP RTC */ |
| 127 | u8 timings[][2] = { { 0, 0 }, | 127 | u8 timings[][2] = { { 0, 0 }, |
| 128 | { 0, 0 }, | 128 | { 0, 0 }, |
| @@ -154,7 +154,7 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
| 154 | 154 | ||
| 155 | /* Mask out the relevant control and timing bits we will load. Also | 155 | /* Mask out the relevant control and timing bits we will load. Also |
| 156 | clear the other drive TIME register as a precaution */ | 156 | clear the other drive TIME register as a precaution */ |
| 157 | 157 | ||
| 158 | idetm_data &= 0xCCCC; | 158 | idetm_data &= 0xCCCC; |
| 159 | idetm_data |= control << (4 * adev->devno); | 159 | idetm_data |= control << (4 * adev->devno); |
| 160 | idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8); | 160 | idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8); |
| @@ -162,18 +162,18 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
| 162 | udma_enable &= ~(1 << adev->devno); | 162 | udma_enable &= ~(1 << adev->devno); |
| 163 | } else { | 163 | } else { |
| 164 | u8 udma_mode; | 164 | u8 udma_mode; |
| 165 | 165 | ||
| 166 | /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */ | 166 | /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */ |
| 167 | 167 | ||
| 168 | pci_read_config_byte(dev, 0x4A, &udma_mode); | 168 | pci_read_config_byte(dev, 0x4A, &udma_mode); |
| 169 | 169 | ||
| 170 | if (adev->xfer_mode == XFER_UDMA_2) | 170 | if (adev->xfer_mode == XFER_UDMA_2) |
| 171 | udma_mode &= ~ (1 << adev->devno); | 171 | udma_mode &= ~ (1 << adev->devno); |
| 172 | else /* UDMA 4 */ | 172 | else /* UDMA 4 */ |
| 173 | udma_mode |= (1 << adev->devno); | 173 | udma_mode |= (1 << adev->devno); |
| 174 | 174 | ||
| 175 | pci_write_config_byte(dev, 0x4A, udma_mode); | 175 | pci_write_config_byte(dev, 0x4A, udma_mode); |
| 176 | 176 | ||
| 177 | udma_enable |= (1 << adev->devno); | 177 | udma_enable |= (1 << adev->devno); |
| 178 | } | 178 | } |
| 179 | pci_write_config_word(dev, 0x40, idetm_data); | 179 | pci_write_config_word(dev, 0x40, idetm_data); |
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c index 9b42b9a52423..4166c1a8a9e8 100644 --- a/drivers/ata/pata_sc1200.c +++ b/drivers/ata/pata_sc1200.c | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | * You should have received a copy of the GNU General Public License | 27 | * You should have received a copy of the GNU General Public License |
| 28 | * along with this program; if not, write to the Free Software | 28 | * along with this program; if not, write to the Free Software |
| 29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 30 | * | 30 | * |
| 31 | */ | 31 | */ |
| 32 | 32 | ||
| 33 | #include <linux/kernel.h> | 33 | #include <linux/kernel.h> |
| @@ -54,14 +54,14 @@ | |||
| 54 | * Return the PCI bus clocking for the SC1200 chipset configuration | 54 | * Return the PCI bus clocking for the SC1200 chipset configuration |
| 55 | * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz | 55 | * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz |
| 56 | */ | 56 | */ |
| 57 | 57 | ||
| 58 | static int sc1200_clock(void) | 58 | static int sc1200_clock(void) |
| 59 | { | 59 | { |
| 60 | /* Magic registers that give us the chipset data */ | 60 | /* Magic registers that give us the chipset data */ |
| 61 | u8 chip_id = inb(0x903C); | 61 | u8 chip_id = inb(0x903C); |
| 62 | u8 silicon_rev = inb(0x903D); | 62 | u8 silicon_rev = inb(0x903D); |
| 63 | u16 pci_clock; | 63 | u16 pci_clock; |
| 64 | 64 | ||
| 65 | if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1) | 65 | if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1) |
| 66 | return 0; /* 33 MHz mode */ | 66 | return 0; /* 33 MHz mode */ |
| 67 | 67 | ||
| @@ -83,7 +83,7 @@ static int sc1200_clock(void) | |||
| 83 | * | 83 | * |
| 84 | * Set our PIO requirements. This is fairly simple on the SC1200 | 84 | * Set our PIO requirements. This is fairly simple on the SC1200 |
| 85 | */ | 85 | */ |
| 86 | 86 | ||
| 87 | static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) | 87 | static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 88 | { | 88 | { |
| 89 | static const u32 pio_timings[4][5] = { | 89 | static const u32 pio_timings[4][5] = { |
| @@ -97,11 +97,11 @@ static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 97 | u32 format; | 97 | u32 format; |
| 98 | unsigned int reg = 0x40 + 0x10 * ap->port_no; | 98 | unsigned int reg = 0x40 + 0x10 * ap->port_no; |
| 99 | int mode = adev->pio_mode - XFER_PIO_0; | 99 | int mode = adev->pio_mode - XFER_PIO_0; |
| 100 | 100 | ||
| 101 | pci_read_config_dword(pdev, reg + 4, &format); | 101 | pci_read_config_dword(pdev, reg + 4, &format); |
| 102 | format >>= 31; | 102 | format >>= 31; |
| 103 | format += sc1200_clock(); | 103 | format += sc1200_clock(); |
| 104 | pci_write_config_dword(pdev, reg + 8 * adev->devno, | 104 | pci_write_config_dword(pdev, reg + 8 * adev->devno, |
| 105 | pio_timings[format][mode]); | 105 | pio_timings[format][mode]); |
| 106 | } | 106 | } |
| 107 | 107 | ||
| @@ -113,7 +113,7 @@ static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 113 | * We cannot mix MWDMA and UDMA without reloading timings each switch | 113 | * We cannot mix MWDMA and UDMA without reloading timings each switch |
| 114 | * master to slave. | 114 | * master to slave. |
| 115 | */ | 115 | */ |
| 116 | 116 | ||
| 117 | static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 117 | static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 118 | { | 118 | { |
| 119 | static const u32 udma_timing[3][3] = { | 119 | static const u32 udma_timing[3][3] = { |
| @@ -121,13 +121,13 @@ static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 121 | { 0x00932470, 0x00922260, 0x00922140 }, | 121 | { 0x00932470, 0x00922260, 0x00922140 }, |
| 122 | { 0x009436A1, 0x00933481, 0x00923261 } | 122 | { 0x009436A1, 0x00933481, 0x00923261 } |
| 123 | }; | 123 | }; |
| 124 | 124 | ||
| 125 | static const u32 mwdma_timing[3][3] = { | 125 | static const u32 mwdma_timing[3][3] = { |
| 126 | { 0x00077771, 0x00012121, 0x00002020 }, | 126 | { 0x00077771, 0x00012121, 0x00002020 }, |
| 127 | { 0x000BBBB2, 0x00024241, 0x00013131 }, | 127 | { 0x000BBBB2, 0x00024241, 0x00013131 }, |
| 128 | { 0x000FFFF3, 0x00035352, 0x00015151 } | 128 | { 0x000FFFF3, 0x00035352, 0x00015151 } |
| 129 | }; | 129 | }; |
| 130 | 130 | ||
| 131 | int clock = sc1200_clock(); | 131 | int clock = sc1200_clock(); |
| 132 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 132 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 133 | unsigned int reg = 0x40 + 0x10 * ap->port_no; | 133 | unsigned int reg = 0x40 + 0x10 * ap->port_no; |
| @@ -138,10 +138,10 @@ static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 138 | format = udma_timing[clock][mode - XFER_UDMA_0]; | 138 | format = udma_timing[clock][mode - XFER_UDMA_0]; |
| 139 | else | 139 | else |
| 140 | format = mwdma_timing[clock][mode - XFER_MW_DMA_0]; | 140 | format = mwdma_timing[clock][mode - XFER_MW_DMA_0]; |
| 141 | 141 | ||
| 142 | if (adev->devno == 0) { | 142 | if (adev->devno == 0) { |
| 143 | u32 timings; | 143 | u32 timings; |
| 144 | 144 | ||
| 145 | pci_read_config_dword(pdev, reg + 4, &timings); | 145 | pci_read_config_dword(pdev, reg + 4, &timings); |
| 146 | timings &= 0x80000000UL; | 146 | timings &= 0x80000000UL; |
| 147 | timings |= format; | 147 | timings |= format; |
| @@ -201,7 +201,7 @@ static struct ata_port_operations sc1200_port_ops = { | |||
| 201 | .set_piomode = sc1200_set_piomode, | 201 | .set_piomode = sc1200_set_piomode, |
| 202 | .set_dmamode = sc1200_set_dmamode, | 202 | .set_dmamode = sc1200_set_dmamode, |
| 203 | .mode_filter = ata_pci_default_filter, | 203 | .mode_filter = ata_pci_default_filter, |
| 204 | 204 | ||
| 205 | .tf_load = ata_tf_load, | 205 | .tf_load = ata_tf_load, |
| 206 | .tf_read = ata_tf_read, | 206 | .tf_read = ata_tf_read, |
| 207 | .check_status = ata_check_status, | 207 | .check_status = ata_check_status, |
| @@ -226,7 +226,7 @@ static struct ata_port_operations sc1200_port_ops = { | |||
| 226 | .port_start = ata_port_start, | 226 | .port_start = ata_port_start, |
| 227 | .port_stop = ata_port_stop, | 227 | .port_stop = ata_port_stop, |
| 228 | .host_stop = ata_host_stop | 228 | .host_stop = ata_host_stop |
| 229 | }; | 229 | }; |
| 230 | 230 | ||
| 231 | /** | 231 | /** |
| 232 | * sc1200_init_one - Initialise an SC1200 | 232 | * sc1200_init_one - Initialise an SC1200 |
| @@ -236,7 +236,7 @@ static struct ata_port_operations sc1200_port_ops = { | |||
| 236 | * Just throw the needed data at the libata helper and it does all | 236 | * Just throw the needed data at the libata helper and it does all |
| 237 | * our work. | 237 | * our work. |
| 238 | */ | 238 | */ |
| 239 | 239 | ||
| 240 | static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 240 | static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 241 | { | 241 | { |
| 242 | static struct ata_port_info info = { | 242 | static struct ata_port_info info = { |
| @@ -248,7 +248,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 248 | .port_ops = &sc1200_port_ops | 248 | .port_ops = &sc1200_port_ops |
| 249 | }; | 249 | }; |
| 250 | static struct ata_port_info *port_info[2] = { &info, &info }; | 250 | static struct ata_port_info *port_info[2] = { &info, &info }; |
| 251 | 251 | ||
| 252 | /* Can't enable port 2 yet, see top comments */ | 252 | /* Can't enable port 2 yet, see top comments */ |
| 253 | return ata_pci_init_one(dev, port_info, 1); | 253 | return ata_pci_init_one(dev, port_info, 1); |
| 254 | } | 254 | } |
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c index 3ec30036c978..af456113c55d 100644 --- a/drivers/ata/pata_serverworks.c +++ b/drivers/ata/pata_serverworks.c | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * based upon | 6 | * based upon |
| 7 | * | 7 | * |
| 8 | * serverworks.c | 8 | * serverworks.c |
| 9 | * | 9 | * |
| 10 | * Copyright (C) 1998-2000 Michel Aubry | 10 | * Copyright (C) 1998-2000 Michel Aubry |
| 11 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz | 11 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz |
| 12 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> | 12 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
| @@ -62,12 +62,12 @@ static const char *csb_bad_ata100[] = { | |||
| 62 | * @ap: ATA port to do cable detect | 62 | * @ap: ATA port to do cable detect |
| 63 | * | 63 | * |
| 64 | * Dell hide the 40/80 pin select for their interfaces in the top two | 64 | * Dell hide the 40/80 pin select for their interfaces in the top two |
| 65 | * bits of the subsystem ID. | 65 | * bits of the subsystem ID. |
| 66 | */ | 66 | */ |
| 67 | 67 | ||
| 68 | static int dell_cable(struct ata_port *ap) { | 68 | static int dell_cable(struct ata_port *ap) { |
| 69 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 69 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 70 | 70 | ||
| 71 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) | 71 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) |
| 72 | return ATA_CBL_PATA80; | 72 | return ATA_CBL_PATA80; |
| 73 | return ATA_CBL_PATA40; | 73 | return ATA_CBL_PATA40; |
| @@ -81,10 +81,10 @@ static int dell_cable(struct ata_port *ap) { | |||
| 81 | * subsystem ID the same as dell. We could use one function but we may | 81 | * subsystem ID the same as dell. We could use one function but we may |
| 82 | * need to extend the Dell one in future | 82 | * need to extend the Dell one in future |
| 83 | */ | 83 | */ |
| 84 | 84 | ||
| 85 | static int sun_cable(struct ata_port *ap) { | 85 | static int sun_cable(struct ata_port *ap) { |
| 86 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 86 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 87 | 87 | ||
| 88 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) | 88 | if (pdev->subsystem_device & (1 << (ap->port_no + 14))) |
| 89 | return ATA_CBL_PATA80; | 89 | return ATA_CBL_PATA80; |
| 90 | return ATA_CBL_PATA40; | 90 | return ATA_CBL_PATA40; |
| @@ -123,7 +123,7 @@ struct sv_cable_table { | |||
| 123 | * Note that we don't copy the old serverworks code because the old | 123 | * Note that we don't copy the old serverworks code because the old |
| 124 | * code contains obvious mistakes | 124 | * code contains obvious mistakes |
| 125 | */ | 125 | */ |
| 126 | 126 | ||
| 127 | static struct sv_cable_table cable_detect[] = { | 127 | static struct sv_cable_table cable_detect[] = { |
| 128 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, dell_cable }, | 128 | { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, dell_cable }, |
| 129 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, dell_cable }, | 129 | { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, dell_cable }, |
| @@ -140,16 +140,16 @@ static struct sv_cable_table cable_detect[] = { | |||
| 140 | * serverworks_pre_reset - cable detection | 140 | * serverworks_pre_reset - cable detection |
| 141 | * @ap: ATA port | 141 | * @ap: ATA port |
| 142 | * | 142 | * |
| 143 | * Perform cable detection according to the device and subvendor | 143 | * Perform cable detection according to the device and subvendor |
| 144 | * identifications | 144 | * identifications |
| 145 | */ | 145 | */ |
| 146 | 146 | ||
| 147 | static int serverworks_pre_reset(struct ata_port *ap) { | 147 | static int serverworks_pre_reset(struct ata_port *ap) { |
| 148 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 148 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 149 | struct sv_cable_table *cb = cable_detect; | 149 | struct sv_cable_table *cb = cable_detect; |
| 150 | 150 | ||
| 151 | while(cb->device) { | 151 | while(cb->device) { |
| 152 | if (cb->device == pdev->device && | 152 | if (cb->device == pdev->device && |
| 153 | (cb->subvendor == pdev->subsystem_vendor || | 153 | (cb->subvendor == pdev->subsystem_vendor || |
| 154 | cb->subvendor == PCI_ANY_ID)) { | 154 | cb->subvendor == PCI_ANY_ID)) { |
| 155 | ap->cbl = cb->cable_detect(ap); | 155 | ap->cbl = cb->cable_detect(ap); |
| @@ -174,7 +174,7 @@ static void serverworks_error_handler(struct ata_port *ap) | |||
| 174 | * Returns true if the device being checked is known to be a CSB | 174 | * Returns true if the device being checked is known to be a CSB |
| 175 | * series device. | 175 | * series device. |
| 176 | */ | 176 | */ |
| 177 | 177 | ||
| 178 | static u8 serverworks_is_csb(struct pci_dev *pdev) | 178 | static u8 serverworks_is_csb(struct pci_dev *pdev) |
| 179 | { | 179 | { |
| 180 | switch (pdev->device) { | 180 | switch (pdev->device) { |
| @@ -198,7 +198,7 @@ static u8 serverworks_is_csb(struct pci_dev *pdev) | |||
| 198 | * specific rules. OSB4 requires no UDMA for disks due to a FIFO | 198 | * specific rules. OSB4 requires no UDMA for disks due to a FIFO |
| 199 | * bug we hit. | 199 | * bug we hit. |
| 200 | */ | 200 | */ |
| 201 | 201 | ||
| 202 | static unsigned long serverworks_osb4_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) | 202 | static unsigned long serverworks_osb4_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) |
| 203 | { | 203 | { |
| 204 | if (adev->class == ATA_DEV_ATA) | 204 | if (adev->class == ATA_DEV_ATA) |
| @@ -221,14 +221,14 @@ static unsigned long serverworks_csb_filter(const struct ata_port *ap, struct at | |||
| 221 | char model_num[40]; | 221 | char model_num[40]; |
| 222 | int len, i; | 222 | int len, i; |
| 223 | 223 | ||
| 224 | /* Disk, UDMA */ | 224 | /* Disk, UDMA */ |
| 225 | if (adev->class != ATA_DEV_ATA) | 225 | if (adev->class != ATA_DEV_ATA) |
| 226 | return ata_pci_default_filter(ap, adev, mask); | 226 | return ata_pci_default_filter(ap, adev, mask); |
| 227 | 227 | ||
| 228 | /* Actually do need to check */ | 228 | /* Actually do need to check */ |
| 229 | ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); | 229 | ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); |
| 230 | /* Precuationary - why not do this in the libata core ?? */ | 230 | /* Precuationary - why not do this in the libata core ?? */ |
| 231 | 231 | ||
| 232 | len = strlen(model_num); | 232 | len = strlen(model_num); |
| 233 | while ((len > 0) && (model_num[len - 1] == ' ')) { | 233 | while ((len > 0) && (model_num[len - 1] == ' ')) { |
| 234 | len--; | 234 | len--; |
| @@ -261,7 +261,7 @@ static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev | |||
| 261 | int pio = adev->pio_mode - XFER_PIO_0; | 261 | int pio = adev->pio_mode - XFER_PIO_0; |
| 262 | 262 | ||
| 263 | pci_write_config_byte(pdev, 0x40 + offset, pio_mode[pio]); | 263 | pci_write_config_byte(pdev, 0x40 + offset, pio_mode[pio]); |
| 264 | 264 | ||
| 265 | /* The OSB4 just requires the timing but the CSB series want the | 265 | /* The OSB4 just requires the timing but the CSB series want the |
| 266 | mode number as well */ | 266 | mode number as well */ |
| 267 | if (serverworks_is_csb(pdev)) { | 267 | if (serverworks_is_csb(pdev)) { |
| @@ -303,7 +303,7 @@ static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev | |||
| 303 | 303 | ||
| 304 | ultra_cfg |= (1 << devbits); | 304 | ultra_cfg |= (1 << devbits); |
| 305 | } else { | 305 | } else { |
| 306 | pci_write_config_byte(pdev, 0x44 + offset, | 306 | pci_write_config_byte(pdev, 0x44 + offset, |
| 307 | dma_mode[adev->dma_mode - XFER_MW_DMA_0]); | 307 | dma_mode[adev->dma_mode - XFER_MW_DMA_0]); |
| 308 | ultra_cfg &= ~(1 << devbits); | 308 | ultra_cfg &= ~(1 << devbits); |
| 309 | } | 309 | } |
| @@ -333,7 +333,7 @@ static struct ata_port_operations serverworks_osb4_port_ops = { | |||
| 333 | .set_piomode = serverworks_set_piomode, | 333 | .set_piomode = serverworks_set_piomode, |
| 334 | .set_dmamode = serverworks_set_dmamode, | 334 | .set_dmamode = serverworks_set_dmamode, |
| 335 | .mode_filter = serverworks_osb4_filter, | 335 | .mode_filter = serverworks_osb4_filter, |
| 336 | 336 | ||
| 337 | .tf_load = ata_tf_load, | 337 | .tf_load = ata_tf_load, |
| 338 | .tf_read = ata_tf_read, | 338 | .tf_read = ata_tf_read, |
| 339 | .check_status = ata_check_status, | 339 | .check_status = ata_check_status, |
| @@ -354,19 +354,19 @@ static struct ata_port_operations serverworks_osb4_port_ops = { | |||
| 354 | .qc_issue = ata_qc_issue_prot, | 354 | .qc_issue = ata_qc_issue_prot, |
| 355 | .eng_timeout = ata_eng_timeout, | 355 | .eng_timeout = ata_eng_timeout, |
| 356 | .data_xfer = ata_pio_data_xfer, | 356 | .data_xfer = ata_pio_data_xfer, |
| 357 | 357 | ||
| 358 | .irq_handler = ata_interrupt, | 358 | .irq_handler = ata_interrupt, |
| 359 | .port_start = ata_port_start, | 359 | .port_start = ata_port_start, |
| 360 | .port_stop = ata_port_stop, | 360 | .port_stop = ata_port_stop, |
| 361 | .host_stop = ata_host_stop | 361 | .host_stop = ata_host_stop |
| 362 | }; | 362 | }; |
| 363 | 363 | ||
| 364 | static struct ata_port_operations serverworks_csb_port_ops = { | 364 | static struct ata_port_operations serverworks_csb_port_ops = { |
| 365 | .port_disable = ata_port_disable, | 365 | .port_disable = ata_port_disable, |
| 366 | .set_piomode = serverworks_set_piomode, | 366 | .set_piomode = serverworks_set_piomode, |
| 367 | .set_dmamode = serverworks_set_dmamode, | 367 | .set_dmamode = serverworks_set_dmamode, |
| 368 | .mode_filter = serverworks_csb_filter, | 368 | .mode_filter = serverworks_csb_filter, |
| 369 | 369 | ||
| 370 | .tf_load = ata_tf_load, | 370 | .tf_load = ata_tf_load, |
| 371 | .tf_read = ata_tf_read, | 371 | .tf_read = ata_tf_read, |
| 372 | .check_status = ata_check_status, | 372 | .check_status = ata_check_status, |
| @@ -387,12 +387,12 @@ static struct ata_port_operations serverworks_csb_port_ops = { | |||
| 387 | .qc_issue = ata_qc_issue_prot, | 387 | .qc_issue = ata_qc_issue_prot, |
| 388 | .eng_timeout = ata_eng_timeout, | 388 | .eng_timeout = ata_eng_timeout, |
| 389 | .data_xfer = ata_pio_data_xfer, | 389 | .data_xfer = ata_pio_data_xfer, |
| 390 | 390 | ||
| 391 | .irq_handler = ata_interrupt, | 391 | .irq_handler = ata_interrupt, |
| 392 | .port_start = ata_port_start, | 392 | .port_start = ata_port_start, |
| 393 | .port_stop = ata_port_stop, | 393 | .port_stop = ata_port_stop, |
| 394 | .host_stop = ata_host_stop | 394 | .host_stop = ata_host_stop |
| 395 | }; | 395 | }; |
| 396 | 396 | ||
| 397 | static int serverworks_fixup_osb4(struct pci_dev *pdev) | 397 | static int serverworks_fixup_osb4(struct pci_dev *pdev) |
| 398 | { | 398 | { |
| @@ -417,7 +417,7 @@ static int serverworks_fixup_csb(struct pci_dev *pdev) | |||
| 417 | { | 417 | { |
| 418 | u8 rev; | 418 | u8 rev; |
| 419 | u8 btr; | 419 | u8 btr; |
| 420 | 420 | ||
| 421 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | 421 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); |
| 422 | 422 | ||
| 423 | /* Third Channel Test */ | 423 | /* Third Channel Test */ |
| @@ -463,7 +463,7 @@ static int serverworks_fixup_csb(struct pci_dev *pdev) | |||
| 463 | else | 463 | else |
| 464 | btr |= (rev >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; | 464 | btr |= (rev >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; |
| 465 | pci_write_config_byte(pdev, 0x5A, btr); | 465 | pci_write_config_byte(pdev, 0x5A, btr); |
| 466 | 466 | ||
| 467 | return btr; | 467 | return btr; |
| 468 | } | 468 | } |
| 469 | 469 | ||
| @@ -514,7 +514,7 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id | |||
| 514 | }; | 514 | }; |
| 515 | static struct ata_port_info *port_info[2]; | 515 | static struct ata_port_info *port_info[2]; |
| 516 | struct ata_port_info *devinfo = &info[id->driver_data]; | 516 | struct ata_port_info *devinfo = &info[id->driver_data]; |
| 517 | 517 | ||
| 518 | /* Force master latency timer to 64 PCI clocks */ | 518 | /* Force master latency timer to 64 PCI clocks */ |
| 519 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); | 519 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); |
| 520 | 520 | ||
| @@ -528,12 +528,12 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id | |||
| 528 | else if ((pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) || | 528 | else if ((pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) || |
| 529 | (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || | 529 | (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || |
| 530 | (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) { | 530 | (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) { |
| 531 | 531 | ||
| 532 | /* If the returned btr is the newer revision then | 532 | /* If the returned btr is the newer revision then |
| 533 | select the right info block */ | 533 | select the right info block */ |
| 534 | if (serverworks_fixup_csb(pdev) == 3) | 534 | if (serverworks_fixup_csb(pdev) == 3) |
| 535 | devinfo = &info[3]; | 535 | devinfo = &info[3]; |
| 536 | 536 | ||
| 537 | /* Is this the 3rd channel CSB6 IDE ? */ | 537 | /* Is this the 3rd channel CSB6 IDE ? */ |
| 538 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) | 538 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) |
| 539 | ports = 1; | 539 | ports = 1; |
| @@ -541,10 +541,10 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id | |||
| 541 | /* setup HT1000E */ | 541 | /* setup HT1000E */ |
| 542 | else if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) | 542 | else if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) |
| 543 | serverworks_fixup_ht1000(pdev); | 543 | serverworks_fixup_ht1000(pdev); |
| 544 | 544 | ||
| 545 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) | 545 | if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) |
| 546 | ata_pci_clear_simplex(pdev); | 546 | ata_pci_clear_simplex(pdev); |
| 547 | 547 | ||
| 548 | port_info[0] = port_info[1] = devinfo; | 548 | port_info[0] = port_info[1] = devinfo; |
| 549 | return ata_pci_init_one(pdev, port_info, ports); | 549 | return ata_pci_init_one(pdev, port_info, ports); |
| 550 | } | 550 | } |
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c index 4ad7fb44bfa6..1cf5cf0a5365 100644 --- a/drivers/ata/pata_sis.c +++ b/drivers/ata/pata_sis.c | |||
| @@ -70,7 +70,7 @@ static int sis_133_pre_reset(struct ata_port *ap) | |||
| 70 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | 70 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 71 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ | 71 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 72 | }; | 72 | }; |
| 73 | 73 | ||
| 74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 75 | u16 tmp; | 75 | u16 tmp; |
| 76 | 76 | ||
| @@ -164,7 +164,7 @@ static int sis_old_pre_reset(struct ata_port *ap) | |||
| 164 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ | 164 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 165 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ | 165 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 166 | }; | 166 | }; |
| 167 | 167 | ||
| 168 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 168 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 169 | 169 | ||
| 170 | if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { | 170 | if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { |
| @@ -601,7 +601,7 @@ static const struct ata_port_operations sis_133_early_ops = { | |||
| 601 | .thaw = ata_bmdma_thaw, | 601 | .thaw = ata_bmdma_thaw, |
| 602 | .error_handler = sis_66_error_handler, | 602 | .error_handler = sis_66_error_handler, |
| 603 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 603 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 604 | 604 | ||
| 605 | .bmdma_setup = ata_bmdma_setup, | 605 | .bmdma_setup = ata_bmdma_setup, |
| 606 | .bmdma_start = ata_bmdma_start, | 606 | .bmdma_start = ata_bmdma_start, |
| 607 | .bmdma_stop = ata_bmdma_stop, | 607 | .bmdma_stop = ata_bmdma_stop, |
| @@ -636,7 +636,7 @@ static const struct ata_port_operations sis_100_ops = { | |||
| 636 | .thaw = ata_bmdma_thaw, | 636 | .thaw = ata_bmdma_thaw, |
| 637 | .error_handler = sis_66_error_handler, | 637 | .error_handler = sis_66_error_handler, |
| 638 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 638 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 639 | 639 | ||
| 640 | 640 | ||
| 641 | .bmdma_setup = ata_bmdma_setup, | 641 | .bmdma_setup = ata_bmdma_setup, |
| 642 | .bmdma_start = ata_bmdma_start, | 642 | .bmdma_start = ata_bmdma_start, |
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c index 47b290b5604a..f8499786917a 100644 --- a/drivers/ata/pata_sl82c105.c +++ b/drivers/ata/pata_sl82c105.c | |||
| @@ -8,7 +8,7 @@ | |||
| 8 | * | 8 | * |
| 9 | * and in part on the documentation and errata sheet | 9 | * and in part on the documentation and errata sheet |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
| @@ -40,7 +40,7 @@ enum { | |||
| 40 | * | 40 | * |
| 41 | * Set up cable type and use generic probe init | 41 | * Set up cable type and use generic probe init |
| 42 | */ | 42 | */ |
| 43 | 43 | ||
| 44 | static int sl82c105_pre_reset(struct ata_port *ap) | 44 | static int sl82c105_pre_reset(struct ata_port *ap) |
| 45 | { | 45 | { |
| 46 | static const struct pci_bits sl82c105_enable_bits[] = { | 46 | static const struct pci_bits sl82c105_enable_bits[] = { |
| @@ -75,7 +75,7 @@ static void sl82c105_error_handler(struct ata_port *ap) | |||
| 75 | * so a configure_dmamode call will undo any work we do here and vice | 75 | * so a configure_dmamode call will undo any work we do here and vice |
| 76 | * versa | 76 | * versa |
| 77 | */ | 77 | */ |
| 78 | 78 | ||
| 79 | static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) | 79 | static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) |
| 80 | { | 80 | { |
| 81 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 81 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -84,7 +84,7 @@ static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *a | |||
| 84 | }; | 84 | }; |
| 85 | u16 dummy; | 85 | u16 dummy; |
| 86 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); | 86 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); |
| 87 | 87 | ||
| 88 | pci_write_config_word(pdev, timing, pio_timing[pio]); | 88 | pci_write_config_word(pdev, timing, pio_timing[pio]); |
| 89 | /* Can we lose this oddity of the old driver */ | 89 | /* Can we lose this oddity of the old driver */ |
| 90 | pci_read_config_word(pdev, timing, &dummy); | 90 | pci_read_config_word(pdev, timing, &dummy); |
| @@ -98,7 +98,7 @@ static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *a | |||
| 98 | * Called to do the PIO mode setup. Our timing registers are shared | 98 | * Called to do the PIO mode setup. Our timing registers are shared |
| 99 | * but we want to set the PIO timing by default. | 99 | * but we want to set the PIO timing by default. |
| 100 | */ | 100 | */ |
| 101 | 101 | ||
| 102 | static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) | 102 | static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 103 | { | 103 | { |
| 104 | sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); | 104 | sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
| @@ -112,7 +112,7 @@ static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
| 112 | * Load DMA cycle times into the chip ready for a DMA transfer | 112 | * Load DMA cycle times into the chip ready for a DMA transfer |
| 113 | * to occur. | 113 | * to occur. |
| 114 | */ | 114 | */ |
| 115 | 115 | ||
| 116 | static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev) | 116 | static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 117 | { | 117 | { |
| 118 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 118 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| @@ -122,7 +122,7 @@ static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *a | |||
| 122 | u16 dummy; | 122 | u16 dummy; |
| 123 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); | 123 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); |
| 124 | int dma = adev->dma_mode - XFER_MW_DMA_0; | 124 | int dma = adev->dma_mode - XFER_MW_DMA_0; |
| 125 | 125 | ||
| 126 | pci_write_config_word(pdev, timing, dma_timing[dma]); | 126 | pci_write_config_word(pdev, timing, dma_timing[dma]); |
| 127 | /* Can we lose this oddity of the old driver */ | 127 | /* Can we lose this oddity of the old driver */ |
| 128 | pci_read_config_word(pdev, timing, &dummy); | 128 | pci_read_config_word(pdev, timing, &dummy); |
| @@ -137,7 +137,7 @@ static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *a | |||
| 137 | * for the device in question. Set appropriate PIO timings not DMA | 137 | * for the device in question. Set appropriate PIO timings not DMA |
| 138 | * timings at this point. | 138 | * timings at this point. |
| 139 | */ | 139 | */ |
| 140 | 140 | ||
| 141 | static void sl82c105_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 141 | static void sl82c105_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 142 | { | 142 | { |
| 143 | switch(adev->dma_mode) { | 143 | switch(adev->dma_mode) { |
| @@ -152,7 +152,7 @@ static void sl82c105_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 152 | break; | 152 | break; |
| 153 | default: | 153 | default: |
| 154 | BUG(); | 154 | BUG(); |
| 155 | } | 155 | } |
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | /** | 158 | /** |
| @@ -160,16 +160,16 @@ static void sl82c105_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
| 160 | * @ap: ATA interface | 160 | * @ap: ATA interface |
| 161 | * | 161 | * |
| 162 | * The sl82c105 has some serious problems with the DMA engine | 162 | * The sl82c105 has some serious problems with the DMA engine |
| 163 | * when transfers don't run as expected or ATAPI is used. The | 163 | * when transfers don't run as expected or ATAPI is used. The |
| 164 | * recommended fix is to reset the engine each use using a chip | 164 | * recommended fix is to reset the engine each use using a chip |
| 165 | * test register. | 165 | * test register. |
| 166 | */ | 166 | */ |
| 167 | 167 | ||
| 168 | static void sl82c105_reset_engine(struct ata_port *ap) | 168 | static void sl82c105_reset_engine(struct ata_port *ap) |
| 169 | { | 169 | { |
| 170 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 170 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 171 | u16 val; | 171 | u16 val; |
| 172 | 172 | ||
| 173 | pci_read_config_word(pdev, 0x7E, &val); | 173 | pci_read_config_word(pdev, 0x7E, &val); |
| 174 | pci_write_config_word(pdev, 0x7E, val | 4); | 174 | pci_write_config_word(pdev, 0x7E, val | 4); |
| 175 | pci_write_config_word(pdev, 0x7E, val & ~4); | 175 | pci_write_config_word(pdev, 0x7E, val & ~4); |
| @@ -180,21 +180,21 @@ static void sl82c105_reset_engine(struct ata_port *ap) | |||
| 180 | * @qc: ATA command | 180 | * @qc: ATA command |
| 181 | * | 181 | * |
| 182 | * Reset the DMA engine each use as recommended by the errata | 182 | * Reset the DMA engine each use as recommended by the errata |
| 183 | * document. | 183 | * document. |
| 184 | * | 184 | * |
| 185 | * FIXME: if we switch clock at BMDMA start/end we might get better | 185 | * FIXME: if we switch clock at BMDMA start/end we might get better |
| 186 | * PIO performance on DMA capable devices. | 186 | * PIO performance on DMA capable devices. |
| 187 | */ | 187 | */ |
| 188 | 188 | ||
| 189 | static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) | 189 | static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) |
| 190 | { | 190 | { |
| 191 | struct ata_port *ap = qc->ap; | 191 | struct ata_port *ap = qc->ap; |
| 192 | 192 | ||
| 193 | sl82c105_reset_engine(ap); | 193 | sl82c105_reset_engine(ap); |
| 194 | 194 | ||
| 195 | /* Set the clocks for DMA */ | 195 | /* Set the clocks for DMA */ |
| 196 | sl82c105_configure_dmamode(ap, qc->dev); | 196 | sl82c105_configure_dmamode(ap, qc->dev); |
| 197 | /* Activate DMA */ | 197 | /* Activate DMA */ |
| 198 | ata_bmdma_start(qc); | 198 | ata_bmdma_start(qc); |
| 199 | } | 199 | } |
| 200 | 200 | ||
| @@ -212,14 +212,14 @@ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) | |||
| 212 | * We assume bmdma_stop is always called if bmdma_start as called. If | 212 | * We assume bmdma_stop is always called if bmdma_start as called. If |
| 213 | * not then we may need to wrap qc_issue. | 213 | * not then we may need to wrap qc_issue. |
| 214 | */ | 214 | */ |
| 215 | 215 | ||
| 216 | static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) | 216 | static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) |
| 217 | { | 217 | { |
| 218 | struct ata_port *ap = qc->ap; | 218 | struct ata_port *ap = qc->ap; |
| 219 | 219 | ||
| 220 | ata_bmdma_stop(qc); | 220 | ata_bmdma_stop(qc); |
| 221 | sl82c105_reset_engine(ap); | 221 | sl82c105_reset_engine(ap); |
| 222 | 222 | ||
| 223 | /* This will redo the initial setup of the DMA device to matching | 223 | /* This will redo the initial setup of the DMA device to matching |
| 224 | PIO timings */ | 224 | PIO timings */ |
| 225 | sl82c105_set_dmamode(ap, qc->dev); | 225 | sl82c105_set_dmamode(ap, qc->dev); |
| @@ -269,11 +269,11 @@ static struct ata_port_operations sl82c105_port_ops = { | |||
| 269 | 269 | ||
| 270 | .irq_handler = ata_interrupt, | 270 | .irq_handler = ata_interrupt, |
| 271 | .irq_clear = ata_bmdma_irq_clear, | 271 | .irq_clear = ata_bmdma_irq_clear, |
| 272 | 272 | ||
| 273 | .port_start = ata_port_start, | 273 | .port_start = ata_port_start, |
| 274 | .port_stop = ata_port_stop, | 274 | .port_stop = ata_port_stop, |
| 275 | .host_stop = ata_host_stop | 275 | .host_stop = ata_host_stop |
| 276 | }; | 276 | }; |
| 277 | 277 | ||
| 278 | /** | 278 | /** |
| 279 | * sl82c105_bridge_revision - find bridge version | 279 | * sl82c105_bridge_revision - find bridge version |
| @@ -283,7 +283,7 @@ static struct ata_port_operations sl82c105_port_ops = { | |||
| 283 | * providing it is a Winbond 553 reports the revision. If it cannot | 283 | * providing it is a Winbond 553 reports the revision. If it cannot |
| 284 | * find a revision or the right device it returns -1 | 284 | * find a revision or the right device it returns -1 |
| 285 | */ | 285 | */ |
| 286 | 286 | ||
| 287 | static int sl82c105_bridge_revision(struct pci_dev *pdev) | 287 | static int sl82c105_bridge_revision(struct pci_dev *pdev) |
| 288 | { | 288 | { |
| 289 | struct pci_dev *bridge; | 289 | struct pci_dev *bridge; |
| @@ -315,7 +315,7 @@ static int sl82c105_bridge_revision(struct pci_dev *pdev) | |||
| 315 | return rev; | 315 | return rev; |
| 316 | } | 316 | } |
| 317 | 317 | ||
| 318 | 318 | ||
| 319 | static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 319 | static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 320 | { | 320 | { |
| 321 | static struct ata_port_info info_dma = { | 321 | static struct ata_port_info info_dma = { |
| @@ -336,7 +336,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id | |||
| 336 | int rev; | 336 | int rev; |
| 337 | 337 | ||
| 338 | rev = sl82c105_bridge_revision(dev); | 338 | rev = sl82c105_bridge_revision(dev); |
| 339 | 339 | ||
| 340 | if (rev == -1) | 340 | if (rev == -1) |
| 341 | dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Unable to find bridge, disabling DMA.\n"); | 341 | dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Unable to find bridge, disabling DMA.\n"); |
| 342 | else if (rev <= 5) | 342 | else if (rev <= 5) |
| @@ -345,7 +345,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id | |||
| 345 | port_info[0] = &info_dma; | 345 | port_info[0] = &info_dma; |
| 346 | port_info[1] = &info_dma; | 346 | port_info[1] = &info_dma; |
| 347 | } | 347 | } |
| 348 | 348 | ||
| 349 | pci_read_config_dword(dev, 0x40, &val); | 349 | pci_read_config_dword(dev, 0x40, &val); |
| 350 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; | 350 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; |
| 351 | pci_write_config_dword(dev, 0x40, val); | 351 | pci_write_config_dword(dev, 0x40, val); |
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c index 7dd6ea3a21e4..36f788728f3f 100644 --- a/drivers/ata/pata_triflex.c +++ b/drivers/ata/pata_triflex.c | |||
| @@ -60,7 +60,7 @@ static int triflex_probe_init(struct ata_port *ap) | |||
| 60 | }; | 60 | }; |
| 61 | 61 | ||
| 62 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 62 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 63 | 63 | ||
| 64 | if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no])) { | 64 | if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no])) { |
| 65 | ata_port_disable(ap); | 65 | ata_port_disable(ap); |
| 66 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); | 66 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 2580e1606d9e..1b2ff133b163 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c | |||
| @@ -154,7 +154,7 @@ static int via_pre_reset(struct ata_port *ap) | |||
| 154 | }; | 154 | }; |
| 155 | 155 | ||
| 156 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 156 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 157 | 157 | ||
| 158 | if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no])) { | 158 | if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no])) { |
| 159 | ata_port_disable(ap); | 159 | ata_port_disable(ap); |
| 160 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); | 160 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
