diff options
author | Tejun Heo <htejun@gmail.com> | 2008-04-30 03:35:12 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-05-06 11:40:54 -0400 |
commit | ab5b0235c4e819c9bc45fa62c99f9fe49e73e701 (patch) | |
tree | 3c468392cd045db97c7925fadef37890c9552677 /drivers/ata | |
parent | 3ad400a92e9c7d2f7caa6c6f811dad9b7d3f333c (diff) |
sata_inic162x: kill now unused bmdma related stuff
sata_inic162x doesn't use BMDMA anymore. Kill bmdma related stuff.
* prdctl manipulation
* port IRQ mask manipulation
* inherit ATA_BASE_SHT instead of ATA_BMDMA_SHT
* BMDMA methods
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/sata_inic162x.c | 103 |
1 files changed, 5 insertions, 98 deletions
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index db57f34d2211..3ca0ee93bc1f 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -101,9 +101,7 @@ enum { | |||
101 | PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */ | 101 | PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */ |
102 | 102 | ||
103 | PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL, | 103 | PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL, |
104 | 104 | PIRQ_MASK_DEFAULT = PIRQ_REPLY, | |
105 | PIRQ_MASK_DMA_READ = PIRQ_REPLY | PIRQ_ATA, | ||
106 | PIRQ_MASK_OTHER = PIRQ_REPLY | PIRQ_COMPLETE, | ||
107 | PIRQ_MASK_FREEZE = 0xff, | 105 | PIRQ_MASK_FREEZE = 0xff, |
108 | 106 | ||
109 | /* PORT_PRD_CTL bits */ | 107 | /* PORT_PRD_CTL bits */ |
@@ -206,13 +204,11 @@ struct inic_port_priv { | |||
206 | dma_addr_t pkt_dma; | 204 | dma_addr_t pkt_dma; |
207 | u32 *cpb_tbl; | 205 | u32 *cpb_tbl; |
208 | dma_addr_t cpb_tbl_dma; | 206 | dma_addr_t cpb_tbl_dma; |
209 | u8 dfl_prdctl; | ||
210 | u8 cached_prdctl; | ||
211 | u8 cached_pirq_mask; | ||
212 | }; | 207 | }; |
213 | 208 | ||
214 | static struct scsi_host_template inic_sht = { | 209 | static struct scsi_host_template inic_sht = { |
215 | ATA_BMDMA_SHT(DRV_NAME), | 210 | ATA_BASE_SHT(DRV_NAME), |
211 | .sg_tablesize = LIBATA_MAX_PRD, /* maybe it can be larger? */ | ||
216 | .dma_boundary = INIC_DMA_BOUNDARY, | 212 | .dma_boundary = INIC_DMA_BOUNDARY, |
217 | }; | 213 | }; |
218 | 214 | ||
@@ -227,23 +223,6 @@ static void __iomem *inic_port_base(struct ata_port *ap) | |||
227 | return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; | 223 | return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; |
228 | } | 224 | } |
229 | 225 | ||
230 | static void __inic_set_pirq_mask(struct ata_port *ap, u8 mask) | ||
231 | { | ||
232 | void __iomem *port_base = inic_port_base(ap); | ||
233 | struct inic_port_priv *pp = ap->private_data; | ||
234 | |||
235 | writeb(mask, port_base + PORT_IRQ_MASK); | ||
236 | pp->cached_pirq_mask = mask; | ||
237 | } | ||
238 | |||
239 | static void inic_set_pirq_mask(struct ata_port *ap, u8 mask) | ||
240 | { | ||
241 | struct inic_port_priv *pp = ap->private_data; | ||
242 | |||
243 | if (pp->cached_pirq_mask != mask) | ||
244 | __inic_set_pirq_mask(ap, mask); | ||
245 | } | ||
246 | |||
247 | static void inic_reset_port(void __iomem *port_base) | 226 | static void inic_reset_port(void __iomem *port_base) |
248 | { | 227 | { |
249 | void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; | 228 | void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; |
@@ -297,63 +276,6 @@ static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | |||
297 | return 0; | 276 | return 0; |
298 | } | 277 | } |
299 | 278 | ||
300 | /* | ||
301 | * In TF mode, inic162x is very similar to SFF device. TF registers | ||
302 | * function the same. DMA engine behaves similary using the same PRD | ||
303 | * format as BMDMA but different command register, interrupt and event | ||
304 | * notification methods are used. The following inic_bmdma_*() | ||
305 | * functions do the impedance matching. | ||
306 | */ | ||
307 | static void inic_bmdma_setup(struct ata_queued_cmd *qc) | ||
308 | { | ||
309 | struct ata_port *ap = qc->ap; | ||
310 | struct inic_port_priv *pp = ap->private_data; | ||
311 | void __iomem *port_base = inic_port_base(ap); | ||
312 | int rw = qc->tf.flags & ATA_TFLAG_WRITE; | ||
313 | |||
314 | /* make sure device sees PRD table writes */ | ||
315 | wmb(); | ||
316 | |||
317 | /* load transfer length */ | ||
318 | writel(qc->nbytes, port_base + PORT_PRD_XFERLEN); | ||
319 | |||
320 | /* turn on DMA and specify data direction */ | ||
321 | pp->cached_prdctl = pp->dfl_prdctl | PRD_CTL_DMAEN; | ||
322 | if (!rw) | ||
323 | pp->cached_prdctl |= PRD_CTL_WR; | ||
324 | writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL); | ||
325 | |||
326 | /* issue r/w command */ | ||
327 | ap->ops->sff_exec_command(ap, &qc->tf); | ||
328 | } | ||
329 | |||
330 | static void inic_bmdma_start(struct ata_queued_cmd *qc) | ||
331 | { | ||
332 | struct ata_port *ap = qc->ap; | ||
333 | struct inic_port_priv *pp = ap->private_data; | ||
334 | void __iomem *port_base = inic_port_base(ap); | ||
335 | |||
336 | /* start host DMA transaction */ | ||
337 | pp->cached_prdctl |= PRD_CTL_START; | ||
338 | writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL); | ||
339 | } | ||
340 | |||
341 | static void inic_bmdma_stop(struct ata_queued_cmd *qc) | ||
342 | { | ||
343 | struct ata_port *ap = qc->ap; | ||
344 | struct inic_port_priv *pp = ap->private_data; | ||
345 | void __iomem *port_base = inic_port_base(ap); | ||
346 | |||
347 | /* stop DMA engine */ | ||
348 | writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL); | ||
349 | } | ||
350 | |||
351 | static u8 inic_bmdma_status(struct ata_port *ap) | ||
352 | { | ||
353 | /* event is already verified by the interrupt handler */ | ||
354 | return ATA_DMA_INTR; | ||
355 | } | ||
356 | |||
357 | static void inic_stop_idma(struct ata_port *ap) | 279 | static void inic_stop_idma(struct ata_port *ap) |
358 | { | 280 | { |
359 | void __iomem *port_base = inic_port_base(ap); | 281 | void __iomem *port_base = inic_port_base(ap); |
@@ -631,8 +553,7 @@ static void inic_freeze(struct ata_port *ap) | |||
631 | { | 553 | { |
632 | void __iomem *port_base = inic_port_base(ap); | 554 | void __iomem *port_base = inic_port_base(ap); |
633 | 555 | ||
634 | __inic_set_pirq_mask(ap, PIRQ_MASK_FREEZE); | 556 | writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK); |
635 | |||
636 | ap->ops->sff_check_status(ap); | 557 | ap->ops->sff_check_status(ap); |
637 | writeb(0xff, port_base + PORT_IRQ_STAT); | 558 | writeb(0xff, port_base + PORT_IRQ_STAT); |
638 | } | 559 | } |
@@ -643,8 +564,7 @@ static void inic_thaw(struct ata_port *ap) | |||
643 | 564 | ||
644 | ap->ops->sff_check_status(ap); | 565 | ap->ops->sff_check_status(ap); |
645 | writeb(0xff, port_base + PORT_IRQ_STAT); | 566 | writeb(0xff, port_base + PORT_IRQ_STAT); |
646 | 567 | writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK); | |
647 | __inic_set_pirq_mask(ap, PIRQ_MASK_OTHER); | ||
648 | } | 568 | } |
649 | 569 | ||
650 | static int inic_check_ready(struct ata_link *link) | 570 | static int inic_check_ready(struct ata_link *link) |
@@ -707,7 +627,6 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, | |||
707 | static void inic_error_handler(struct ata_port *ap) | 627 | static void inic_error_handler(struct ata_port *ap) |
708 | { | 628 | { |
709 | void __iomem *port_base = inic_port_base(ap); | 629 | void __iomem *port_base = inic_port_base(ap); |
710 | struct inic_port_priv *pp = ap->private_data; | ||
711 | unsigned long flags; | 630 | unsigned long flags; |
712 | 631 | ||
713 | /* reset PIO HSM and stop DMA engine */ | 632 | /* reset PIO HSM and stop DMA engine */ |
@@ -715,7 +634,6 @@ static void inic_error_handler(struct ata_port *ap) | |||
715 | 634 | ||
716 | spin_lock_irqsave(ap->lock, flags); | 635 | spin_lock_irqsave(ap->lock, flags); |
717 | ap->hsm_task_state = HSM_ST_IDLE; | 636 | ap->hsm_task_state = HSM_ST_IDLE; |
718 | writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL); | ||
719 | spin_unlock_irqrestore(ap->lock, flags); | 637 | spin_unlock_irqrestore(ap->lock, flags); |
720 | 638 | ||
721 | /* PIO and DMA engines have been stopped, perform recovery */ | 639 | /* PIO and DMA engines have been stopped, perform recovery */ |
@@ -765,10 +683,8 @@ static int inic_port_resume(struct ata_port *ap) | |||
765 | 683 | ||
766 | static int inic_port_start(struct ata_port *ap) | 684 | static int inic_port_start(struct ata_port *ap) |
767 | { | 685 | { |
768 | void __iomem *port_base = inic_port_base(ap); | ||
769 | struct device *dev = ap->host->dev; | 686 | struct device *dev = ap->host->dev; |
770 | struct inic_port_priv *pp; | 687 | struct inic_port_priv *pp; |
771 | u8 tmp; | ||
772 | int rc; | 688 | int rc; |
773 | 689 | ||
774 | /* alloc and initialize private data */ | 690 | /* alloc and initialize private data */ |
@@ -777,11 +693,6 @@ static int inic_port_start(struct ata_port *ap) | |||
777 | return -ENOMEM; | 693 | return -ENOMEM; |
778 | ap->private_data = pp; | 694 | ap->private_data = pp; |
779 | 695 | ||
780 | /* default PRD_CTL value, DMAEN, WR and START off */ | ||
781 | tmp = readb(port_base + PORT_PRD_CTL); | ||
782 | tmp &= ~(PRD_CTL_DMAEN | PRD_CTL_WR | PRD_CTL_START); | ||
783 | pp->dfl_prdctl = tmp; | ||
784 | |||
785 | /* Alloc resources */ | 696 | /* Alloc resources */ |
786 | rc = ata_port_start(ap); | 697 | rc = ata_port_start(ap); |
787 | if (rc) | 698 | if (rc) |
@@ -805,10 +716,6 @@ static int inic_port_start(struct ata_port *ap) | |||
805 | static struct ata_port_operations inic_port_ops = { | 716 | static struct ata_port_operations inic_port_ops = { |
806 | .inherits = &ata_sff_port_ops, | 717 | .inherits = &ata_sff_port_ops, |
807 | 718 | ||
808 | .bmdma_setup = inic_bmdma_setup, | ||
809 | .bmdma_start = inic_bmdma_start, | ||
810 | .bmdma_stop = inic_bmdma_stop, | ||
811 | .bmdma_status = inic_bmdma_status, | ||
812 | .qc_prep = inic_qc_prep, | 719 | .qc_prep = inic_qc_prep, |
813 | .qc_issue = inic_qc_issue, | 720 | .qc_issue = inic_qc_issue, |
814 | .qc_fill_rtf = inic_qc_fill_rtf, | 721 | .qc_fill_rtf = inic_qc_fill_rtf, |