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authorMark Lord <liml@rtr.ca>2008-04-19 14:54:41 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-04-25 01:26:22 -0400
commit85afb934575abdff1b2ac8ea4d522d1355f22a89 (patch)
tree1a5a5d4bbb86e96ad3e2ddc0f1fc9e317ac20121 /drivers/ata
parent8d07379d251ab24d937e6cb0748b71106dddbc74 (diff)
sata_mv: re-enable hotplug, update TODO list
Re-enable hotplug, now that the interrupt/error handling are mostly sane. Also update the TODO list at the top. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/sata_mv.c79
1 files changed, 29 insertions, 50 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 4fa54805eb41..26a6337195b3 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -23,46 +23,34 @@
23 */ 23 */
24 24
25/* 25/*
26 sata_mv TODO list: 26 * sata_mv TODO list:
27 27 *
28 1) Needs a full errata audit for all chipsets. I implemented most 28 * --> Errata workaround for NCQ device errors.
29 of the errata workarounds found in the Marvell vendor driver, but 29 *
30 I distinctly remember a couple workarounds (one related to PCI-X) 30 * --> More errata workarounds for PCI-X.
31 are still needed. 31 *
32 32 * --> Complete a full errata audit for all chipsets to identify others.
33 2) Improve/fix IRQ and error handling sequences. 33 *
34 34 * --> ATAPI support (Marvell claims the 60xx/70xx chips can do it).
35 3) ATAPI support (Marvell claims the 60xx/70xx chips can do it). 35 *
36 36 * --> Investigate problems with PCI Message Signalled Interrupts (MSI).
37 4) Think about TCQ support here, and for libata in general 37 *
38 with controllers that suppport it via host-queuing hardware 38 * --> Cache frequently-accessed registers in mv_port_priv to reduce overhead.
39 (a software-only implementation could be a nightmare). 39 *
40 40 * --> Develop a low-power-consumption strategy, and implement it.
41 5) Investigate problems with PCI Message Signalled Interrupts (MSI). 41 *
42 42 * --> [Experiment, low priority] Investigate interrupt coalescing.
43 6) Cache frequently-accessed registers in mv_port_priv to reduce overhead. 43 * Quite often, especially with PCI Message Signalled Interrupts (MSI),
44 44 * the overhead reduced by interrupt mitigation is quite often not
45 7) Fix/reenable hot plug/unplug (should happen as a side-effect of (2) above). 45 * worth the latency cost.
46 46 *
47 8) Develop a low-power-consumption strategy, and implement it. 47 * --> [Experiment, Marvell value added] Is it possible to use target
48 48 * mode to cross-connect two Linux boxes with Marvell cards? If so,
49 9) [Experiment, low priority] See if ATAPI can be supported using 49 * creating LibATA target mode support would be very interesting.
50 "unknown FIS" or "vendor-specific FIS" support, or something creative 50 *
51 like that. 51 * Target mode, for those without docs, is the ability to directly
52 52 * connect two SATA ports.
53 10) [Experiment, low priority] Investigate interrupt coalescing. 53 */
54 Quite often, especially with PCI Message Signalled Interrupts (MSI),
55 the overhead reduced by interrupt mitigation is quite often not
56 worth the latency cost.
57
58 11) [Experiment, Marvell value added] Is it possible to use target
59 mode to cross-connect two Linux boxes with Marvell cards? If so,
60 creating LibATA target mode support would be very interesting.
61
62 Target mode, for those without docs, is the ability to directly
63 connect two SATA controllers.
64
65*/
66 54
67#include <linux/kernel.h> 55#include <linux/kernel.h>
68#include <linux/module.h> 56#include <linux/module.h>
@@ -300,9 +288,7 @@ enum {
300 EDMA_ERR_IRQ_TRANSIENT = EDMA_ERR_LNK_CTRL_RX_0 | 288 EDMA_ERR_IRQ_TRANSIENT = EDMA_ERR_LNK_CTRL_RX_0 |
301 EDMA_ERR_LNK_CTRL_RX_1 | 289 EDMA_ERR_LNK_CTRL_RX_1 |
302 EDMA_ERR_LNK_CTRL_RX_3 | 290 EDMA_ERR_LNK_CTRL_RX_3 |
303 EDMA_ERR_LNK_CTRL_TX | 291 EDMA_ERR_LNK_CTRL_TX,
304 /* temporary, until we fix hotplug: */
305 (EDMA_ERR_DEV_DCON | EDMA_ERR_DEV_CON),
306 292
307 EDMA_EH_FREEZE = EDMA_ERR_D_PAR | 293 EDMA_EH_FREEZE = EDMA_ERR_D_PAR |
308 EDMA_ERR_PRD_PAR | 294 EDMA_ERR_PRD_PAR |
@@ -2124,13 +2110,6 @@ static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
2124 printk(KERN_ERR DRV_NAME ": can't clear global reset\n"); 2110 printk(KERN_ERR DRV_NAME ": can't clear global reset\n");
2125 rc = 1; 2111 rc = 1;
2126 } 2112 }
2127 /*
2128 * Temporary: wait 3 seconds before port-probing can happen,
2129 * so that we don't miss finding sleepy SilXXXX port-multipliers.
2130 * This can go away once hotplug is fully/correctly implemented.
2131 */
2132 if (rc == 0)
2133 msleep(3000);
2134done: 2113done:
2135 return rc; 2114 return rc;
2136} 2115}