aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ata
diff options
context:
space:
mode:
authorTejun Heo <htejun@gmail.com>2008-04-07 09:47:19 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-04-17 15:44:22 -0400
commit705e76beb90b97421e1f61e857c4246799781bb5 (patch)
treee571ad9229d469cd73d1388c76823922400823d5 /drivers/ata
parent203c75b8245c5386044721d9c5eda5c6b71b3d14 (diff)
libata: restructure SFF post-reset readiness waits
Previously, post-softreset readiness is waited as follows. 1. ata_sff_wait_after_reset() waits for 150ms and then for ATA_TMOUT_FF_WAIT if status is 0xff and other conditions meet. 2. ata_bus_softreset() finishes with -ENODEV if status is still 0xff. If not, continue to #3. 3. ata_bus_post_reset() waits readiness of dev0 and/or dev1 depending on devmask using ata_sff_wait_ready(). And for post-hardreset readiness, 1. ata_sff_wait_after_reset() waits for 150ms and then for ATA_TMOUT_FF_WAIT if status is 0xff and other conditions meet. 2. sata_sff_hardreset waits for device readiness using ata_sff_wait_ready(). This patch merges and unifies post-reset readiness waits into ata_sff_wait_ready() and ata_sff_wait_after_reset(). ATA_TMOUT_FF_WAIT handling is merged into ata_sff_wait_ready(). If TF status is 0xff, link status is unknown and the port is SATA, it will continue polling till ATA_TMOUT_FF_WAIT. ata_sff_wait_after_reset() is updated to perform the following steps. 1. waits for 150ms. 2. waits for dev0 readiness using ata_sff_wait_ready(). Note that this is done regardless of devmask, as ata_sff_wait_ready() handles 0xff status correctly, this preserves the original behavior except that it may wait longer after softreset if link is online but status is 0xff. This behavior change is very unlikely to cause any actual difference and is intended. It brings softreset behavior to that of hardreset. 3. waits for dev1 readiness just the same way ata_bus_post_reset() did. Now both soft and hard resets call ata_sff_wait_after_reset() after reset to wait for readiness after resets. As ata_sff_wait_after_reset() contains calls to ->sff_dev_select(), explicit call near the end of sata_sff_hardreset() is removed. This change makes reset implementation simpler and more consistent. While at it, make the magical 150ms wait post-reset wait duration a constant and ata_sff_wait_ready() and ata_sff_wait_after_reset() take @link instead of @ap. This is to make them consistent with other reset helpers and ease core changes. pata_scc is updated accordingly. Signed-off-by: Tejun Heo <htejun@gmail.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/ahci.c11
-rw-r--r--drivers/ata/libata-sff.c161
-rw-r--r--drivers/ata/pata_scc.c91
-rw-r--r--drivers/ata/sata_inic162x.c6
-rw-r--r--drivers/ata/sata_via.c2
5 files changed, 124 insertions, 147 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 939dc1d4e50d..45a67a9ad8ab 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1302,10 +1302,8 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
1302 tf.ctl &= ~ATA_SRST; 1302 tf.ctl &= ~ATA_SRST;
1303 ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0); 1303 ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
1304 1304
1305 /* wait a while before checking status */ 1305 /* wait for link to become ready */
1306 ata_sff_wait_after_reset(ap, deadline); 1306 rc = ata_sff_wait_after_reset(link, 1, deadline);
1307
1308 rc = ata_sff_wait_ready(ap, deadline);
1309 /* link occupied, -ENODEV too is an error */ 1307 /* link occupied, -ENODEV too is an error */
1310 if (rc) { 1308 if (rc) {
1311 reason = "device not ready"; 1309 reason = "device not ready";
@@ -1415,9 +1413,6 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
1415 if (rc || ata_link_offline(link)) 1413 if (rc || ata_link_offline(link))
1416 return rc; 1414 return rc;
1417 1415
1418 /* spec mandates ">= 2ms" before checking status */
1419 msleep(150);
1420
1421 /* The pseudo configuration device on SIMG4726 attached to 1416 /* The pseudo configuration device on SIMG4726 attached to
1422 * ASUS P5W-DH Deluxe doesn't send signature FIS after 1417 * ASUS P5W-DH Deluxe doesn't send signature FIS after
1423 * hardreset if no device is attached to the first downstream 1418 * hardreset if no device is attached to the first downstream
@@ -1431,7 +1426,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
1431 * have to be reset again. For most cases, this should 1426 * have to be reset again. For most cases, this should
1432 * suffice while making probing snappish enough. 1427 * suffice while making probing snappish enough.
1433 */ 1428 */
1434 rc = ata_sff_wait_ready(ap, jiffies + 2 * HZ); 1429 rc = ata_sff_wait_after_reset(link, 1, jiffies + 2 * HZ);
1435 if (rc) 1430 if (rc)
1436 ahci_kick_engine(ap, 0); 1431 ahci_kick_engine(ap, 0);
1437 1432
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index e530baccc9cb..6e8de3c1595e 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -310,7 +310,7 @@ int ata_sff_busy_sleep(struct ata_port *ap,
310 310
311/** 311/**
312 * ata_sff_wait_ready - sleep until BSY clears, or timeout 312 * ata_sff_wait_ready - sleep until BSY clears, or timeout
313 * @ap: port containing status register to be polled 313 * @link: SFF link to wait ready status for
314 * @deadline: deadline jiffies for the operation 314 * @deadline: deadline jiffies for the operation
315 * 315 *
316 * Sleep until ATA Status register bit BSY clears, or timeout 316 * Sleep until ATA Status register bit BSY clears, or timeout
@@ -322,26 +322,52 @@ int ata_sff_busy_sleep(struct ata_port *ap,
322 * RETURNS: 322 * RETURNS:
323 * 0 on success, -errno otherwise. 323 * 0 on success, -errno otherwise.
324 */ 324 */
325int ata_sff_wait_ready(struct ata_port *ap, unsigned long deadline) 325int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
326{ 326{
327 struct ata_port *ap = link->ap;
327 unsigned long start = jiffies; 328 unsigned long start = jiffies;
329 unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT;
328 int warned = 0; 330 int warned = 0;
329 331
332 if (time_after(nodev_deadline, deadline))
333 nodev_deadline = deadline;
334
330 while (1) { 335 while (1) {
331 u8 status = ap->ops->sff_check_status(ap); 336 u8 status = ap->ops->sff_check_status(ap);
332 unsigned long now = jiffies; 337 unsigned long now = jiffies;
333 338
334 if (!(status & ATA_BUSY)) 339 if (!(status & ATA_BUSY))
335 return 0; 340 return 0;
336 if (!ata_link_online(&ap->link) && status == 0xff) 341
337 return -ENODEV; 342 /* No device status could be transient. Ignore it if
343 * link is online. Also, some SATA devices take a
344 * long time to clear 0xff after reset. For example,
345 * HHD424020F7SV00 iVDR needs >= 800ms while Quantum
346 * GoVault needs even more than that. Wait for
347 * ATA_TMOUT_FF_WAIT on -ENODEV if link isn't offline.
348 *
349 * Note that some PATA controllers (pata_ali) explode
350 * if status register is read more than once when
351 * there's no device attached.
352 */
353 if (status == 0xff) {
354 if (ata_link_online(link))
355 status = ATA_BUSY;
356 else if ((link->ap->flags & ATA_FLAG_SATA) &&
357 !ata_link_offline(link) &&
358 time_before(now, nodev_deadline))
359 status = ATA_BUSY;
360 if (status == 0xff)
361 return -ENODEV;
362 }
363
338 if (time_after(now, deadline)) 364 if (time_after(now, deadline))
339 return -EBUSY; 365 return -EBUSY;
340 366
341 if (!warned && time_after(now, start + 5 * HZ) && 367 if (!warned && time_after(now, start + 5 * HZ) &&
342 (deadline - now > 3 * HZ)) { 368 (deadline - now > 3 * HZ)) {
343 ata_port_printk(ap, KERN_WARNING, 369 ata_link_printk(link, KERN_WARNING,
344 "port is slow to respond, please be patient " 370 "link is slow to respond, please be patient "
345 "(Status 0x%x)\n", status); 371 "(Status 0x%x)\n", status);
346 warned = 1; 372 warned = 1;
347 } 373 }
@@ -1625,7 +1651,6 @@ void ata_sff_thaw(struct ata_port *ap)
1625 */ 1651 */
1626int ata_sff_prereset(struct ata_link *link, unsigned long deadline) 1652int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1627{ 1653{
1628 struct ata_port *ap = link->ap;
1629 struct ata_eh_context *ehc = &link->eh_context; 1654 struct ata_eh_context *ehc = &link->eh_context;
1630 int rc; 1655 int rc;
1631 1656
@@ -1639,7 +1664,7 @@ int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1639 1664
1640 /* wait for !BSY if we don't know that no device is attached */ 1665 /* wait for !BSY if we don't know that no device is attached */
1641 if (!ata_link_offline(link)) { 1666 if (!ata_link_offline(link)) {
1642 rc = ata_sff_wait_ready(ap, deadline); 1667 rc = ata_sff_wait_ready(link, deadline);
1643 if (rc && rc != -ENODEV) { 1668 if (rc && rc != -ENODEV) {
1644 ata_link_printk(link, KERN_WARNING, "device not ready " 1669 ata_link_printk(link, KERN_WARNING, "device not ready "
1645 "(errno=%d), forcing hardreset\n", rc); 1670 "(errno=%d), forcing hardreset\n", rc);
@@ -1762,25 +1787,41 @@ unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
1762 return class; 1787 return class;
1763} 1788}
1764 1789
1765static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 1790/**
1766 unsigned long deadline) 1791 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1792 * @link: SFF link which is just reset
1793 * @devmask: mask of present devices
1794 * @deadline: deadline jiffies for the operation
1795 *
1796 * Wait devices attached to SFF @link to become ready after
1797 * reset. It contains preceding 150ms wait to avoid accessing TF
1798 * status register too early.
1799 *
1800 * LOCKING:
1801 * Kernel thread context (may sleep).
1802 *
1803 * RETURNS:
1804 * 0 on success, -ENODEV if some or all of devices in @devmask
1805 * don't seem to exist. -errno on other errors.
1806 */
1807int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1808 unsigned long deadline)
1767{ 1809{
1810 struct ata_port *ap = link->ap;
1768 struct ata_ioports *ioaddr = &ap->ioaddr; 1811 struct ata_ioports *ioaddr = &ap->ioaddr;
1769 unsigned int dev0 = devmask & (1 << 0); 1812 unsigned int dev0 = devmask & (1 << 0);
1770 unsigned int dev1 = devmask & (1 << 1); 1813 unsigned int dev1 = devmask & (1 << 1);
1771 int rc, ret = 0; 1814 int rc, ret = 0;
1772 1815
1773 /* if device 0 was found in ata_devchk, wait for its 1816 msleep(ATA_WAIT_AFTER_RESET_MSECS);
1774 * BSY bit to clear 1817
1818 /* always check readiness of the master device */
1819 rc = ata_sff_wait_ready(link, deadline);
1820 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1821 * and TF status is 0xff, bail out on it too.
1775 */ 1822 */
1776 if (dev0) { 1823 if (rc)
1777 rc = ata_sff_wait_ready(ap, deadline); 1824 return rc;
1778 if (rc) {
1779 if (rc != -ENODEV)
1780 return rc;
1781 ret = rc;
1782 }
1783 }
1784 1825
1785 /* if device 1 was found in ata_devchk, wait for register 1826 /* if device 1 was found in ata_devchk, wait for register
1786 * access briefly, then wait for BSY to clear. 1827 * access briefly, then wait for BSY to clear.
@@ -1804,7 +1845,7 @@ static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
1804 msleep(50); /* give drive a breather */ 1845 msleep(50); /* give drive a breather */
1805 } 1846 }
1806 1847
1807 rc = ata_sff_wait_ready(ap, deadline); 1848 rc = ata_sff_wait_ready(link, deadline);
1808 if (rc) { 1849 if (rc) {
1809 if (rc != -ENODEV) 1850 if (rc != -ENODEV)
1810 return rc; 1851 return rc;
@@ -1822,61 +1863,6 @@ static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
1822 return ret; 1863 return ret;
1823} 1864}
1824 1865
1825/**
1826 * ata_sff_wait_after_reset - wait before checking status after reset
1827 * @ap: port containing status register to be polled
1828 * @deadline: deadline jiffies for the operation
1829 *
1830 * After reset, we need to pause a while before reading status.
1831 * Also, certain combination of controller and device report 0xff
1832 * for some duration (e.g. until SATA PHY is up and running)
1833 * which is interpreted as empty port in ATA world. This
1834 * function also waits for such devices to get out of 0xff
1835 * status.
1836 *
1837 * LOCKING:
1838 * Kernel thread context (may sleep).
1839 */
1840void ata_sff_wait_after_reset(struct ata_port *ap, unsigned long deadline)
1841{
1842 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;
1843
1844 if (time_before(until, deadline))
1845 deadline = until;
1846
1847 /* Spec mandates ">= 2ms" before checking status. We wait
1848 * 150ms, because that was the magic delay used for ATAPI
1849 * devices in Hale Landis's ATADRVR, for the period of time
1850 * between when the ATA command register is written, and then
1851 * status is checked. Because waiting for "a while" before
1852 * checking status is fine, post SRST, we perform this magic
1853 * delay here as well.
1854 *
1855 * Old drivers/ide uses the 2mS rule and then waits for ready.
1856 */
1857 msleep(150);
1858
1859 /* Wait for 0xff to clear. Some SATA devices take a long time
1860 * to clear 0xff after reset. For example, HHD424020F7SV00
1861 * iVDR needs >= 800ms while. Quantum GoVault needs even more
1862 * than that.
1863 *
1864 * Note that some PATA controllers (pata_ali) explode if
1865 * status register is read more than once when there's no
1866 * device attached.
1867 */
1868 if (ap->flags & ATA_FLAG_SATA) {
1869 while (1) {
1870 u8 status = ap->ops->sff_check_status(ap);
1871
1872 if (status != 0xff || time_after(jiffies, deadline))
1873 return;
1874
1875 msleep(50);
1876 }
1877 }
1878}
1879
1880static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 1866static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1881 unsigned long deadline) 1867 unsigned long deadline)
1882{ 1868{
@@ -1891,17 +1877,8 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1891 udelay(20); /* FIXME: flush */ 1877 udelay(20); /* FIXME: flush */
1892 iowrite8(ap->ctl, ioaddr->ctl_addr); 1878 iowrite8(ap->ctl, ioaddr->ctl_addr);
1893 1879
1894 /* wait a while before checking status */ 1880 /* wait the port to become ready */
1895 ata_sff_wait_after_reset(ap, deadline); 1881 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
1896
1897 /* Before we perform post reset processing we want to see if
1898 * the bus shows 0xFF because the odd clown forgets the D7
1899 * pulldown resistor.
1900 */
1901 if (ap->ops->sff_check_status(ap) == 0xFF)
1902 return -ENODEV;
1903
1904 return ata_bus_post_reset(ap, devmask, deadline);
1905} 1882}
1906 1883
1907/** 1884/**
@@ -2003,20 +1980,18 @@ int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
2003 return 0; 1980 return 0;
2004 } 1981 }
2005 1982
2006 /* wait a while before checking status */
2007 ata_sff_wait_after_reset(ap, deadline);
2008
2009 /* If PMP is supported, we have to do follow-up SRST. Note 1983 /* If PMP is supported, we have to do follow-up SRST. Note
2010 * that some PMPs don't send D2H Reg FIS after hardreset at 1984 * that some PMPs don't send D2H Reg FIS after hardreset at
2011 * all if the first port is empty. Wait for it just for a 1985 * all if the first port is empty. Wait for it just for a
2012 * second and request follow-up SRST. 1986 * second and request follow-up SRST.
2013 */ 1987 */
2014 if (ap->flags & ATA_FLAG_PMP) { 1988 if (ap->flags & ATA_FLAG_PMP) {
2015 ata_sff_wait_ready(ap, jiffies + HZ); 1989 ata_sff_wait_after_reset(link, 1, jiffies + HZ);
2016 return -EAGAIN; 1990 return -EAGAIN;
2017 } 1991 }
2018 1992
2019 rc = ata_sff_wait_ready(ap, deadline); 1993 /* wait for the link to become online */
1994 rc = ata_sff_wait_after_reset(link, 1, deadline);
2020 /* link occupied, -ENODEV too is an error */ 1995 /* link occupied, -ENODEV too is an error */
2021 if (rc) { 1996 if (rc) {
2022 ata_link_printk(link, KERN_ERR, 1997 ata_link_printk(link, KERN_ERR,
@@ -2024,8 +1999,6 @@ int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
2024 return rc; 1999 return rc;
2025 } 2000 }
2026 2001
2027 ap->ops->sff_dev_select(ap, 0); /* probably unnecessary */
2028
2029 *class = ata_sff_dev_classify(link->device, 1, NULL); 2002 *class = ata_sff_dev_classify(link->device, 1, NULL);
2030 2003
2031 DPRINTK("EXIT, class=%u\n", *class); 2004 DPRINTK("EXIT, class=%u\n", *class);
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index 2b9da715c704..accc275e74cc 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -497,47 +497,68 @@ static unsigned int scc_devchk (struct ata_port *ap,
497} 497}
498 498
499/** 499/**
500 * scc_bus_post_reset - PATA device post reset 500 * scc_wait_after_reset - wait for devices to become ready after reset
501 * 501 *
502 * Note: Original code is ata_bus_post_reset(). 502 * Note: Original code is ata_sff_wait_after_reset
503 */ 503 */
504 504
505static int scc_bus_post_reset(struct ata_port *ap, unsigned int devmask, 505int scc_wait_after_reset(struct ata_link *link, unsigned int devmask,
506 unsigned long deadline) 506 unsigned long deadline)
507{ 507{
508 struct ata_port *ap = link->ap;
508 struct ata_ioports *ioaddr = &ap->ioaddr; 509 struct ata_ioports *ioaddr = &ap->ioaddr;
509 unsigned int dev0 = devmask & (1 << 0); 510 unsigned int dev0 = devmask & (1 << 0);
510 unsigned int dev1 = devmask & (1 << 1); 511 unsigned int dev1 = devmask & (1 << 1);
511 int rc; 512 int rc, ret = 0;
513
514 /* Spec mandates ">= 2ms" before checking status. We wait
515 * 150ms, because that was the magic delay used for ATAPI
516 * devices in Hale Landis's ATADRVR, for the period of time
517 * between when the ATA command register is written, and then
518 * status is checked. Because waiting for "a while" before
519 * checking status is fine, post SRST, we perform this magic
520 * delay here as well.
521 *
522 * Old drivers/ide uses the 2mS rule and then waits for ready.
523 */
524 msleep(150);
512 525
513 /* if device 0 was found in ata_devchk, wait for its 526 /* always check readiness of the master device */
514 * BSY bit to clear 527 rc = ata_sff_wait_ready(link, deadline);
528 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
529 * and TF status is 0xff, bail out on it too.
515 */ 530 */
516 if (dev0) { 531 if (rc)
517 rc = ata_sff_wait_ready(ap, deadline); 532 return rc;
518 if (rc && rc != -ENODEV)
519 return rc;
520 }
521 533
522 /* if device 1 was found in ata_devchk, wait for 534 /* if device 1 was found in ata_devchk, wait for register
523 * register access, then wait for BSY to clear 535 * access briefly, then wait for BSY to clear.
524 */ 536 */
525 while (dev1) { 537 if (dev1) {
526 u8 nsect, lbal; 538 int i;
527 539
528 ap->ops->sff_dev_select(ap, 1); 540 ap->ops->sff_dev_select(ap, 1);
529 nsect = in_be32(ioaddr->nsect_addr); 541
530 lbal = in_be32(ioaddr->lbal_addr); 542 /* Wait for register access. Some ATAPI devices fail
531 if ((nsect == 1) && (lbal == 1)) 543 * to set nsect/lbal after reset, so don't waste too
532 break; 544 * much time on it. We're gonna wait for !BSY anyway.
533 if (time_after(jiffies, deadline)) 545 */
534 return -EBUSY; 546 for (i = 0; i < 2; i++) {
535 msleep(50); /* give drive a breather */ 547 u8 nsect, lbal;
536 } 548
537 if (dev1) { 549 nsect = in_be32(ioaddr->nsect_addr);
538 rc = ata_sff_wait_ready(ap, deadline); 550 lbal = in_be32(ioaddr->lbal_addr);
539 if (rc && rc != -ENODEV) 551 if ((nsect == 1) && (lbal == 1))
540 return rc; 552 break;
553 msleep(50); /* give drive a breather */
554 }
555
556 rc = ata_sff_wait_ready(link, deadline);
557 if (rc) {
558 if (rc != -ENODEV)
559 return rc;
560 ret = rc;
561 }
541 } 562 }
542 563
543 /* is all this really necessary? */ 564 /* is all this really necessary? */
@@ -547,7 +568,7 @@ static int scc_bus_post_reset(struct ata_port *ap, unsigned int devmask,
547 if (dev0) 568 if (dev0)
548 ap->ops->sff_dev_select(ap, 0); 569 ap->ops->sff_dev_select(ap, 0);
549 570
550 return 0; 571 return ret;
551} 572}
552 573
553/** 574/**
@@ -570,17 +591,7 @@ static unsigned int scc_bus_softreset(struct ata_port *ap, unsigned int devmask,
570 udelay(20); 591 udelay(20);
571 out_be32(ioaddr->ctl_addr, ap->ctl); 592 out_be32(ioaddr->ctl_addr, ap->ctl);
572 593
573 /* wait a while before checking status */ 594 scc_wait_after_reset(&ap->link, devmask, deadlien);
574 ata_sff_wait_after_reset(ap, deadline);
575
576 /* Before we perform post reset processing we want to see if
577 * the bus shows 0xFF because the odd clown forgets the D7
578 * pulldown resistor.
579 */
580 if (scc_check_status(ap) == 0xFF)
581 return 0;
582
583 scc_bus_post_reset(ap, devmask, deadline);
584 595
585 return 0; 596 return 0;
586} 597}
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 0b5a736a45e3..9f47d0022453 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -417,10 +417,8 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
417 if (ata_link_online(link)) { 417 if (ata_link_online(link)) {
418 struct ata_taskfile tf; 418 struct ata_taskfile tf;
419 419
420 /* wait a while before checking status */ 420 /* wait for link to become ready */
421 ata_sff_wait_after_reset(ap, deadline); 421 rc = ata_sff_wait_after_reset(link, 1, deadline);
422
423 rc = ata_sff_wait_ready(ap, deadline);
424 /* link occupied, -ENODEV too is an error */ 422 /* link occupied, -ENODEV too is an error */
425 if (rc) { 423 if (rc) {
426 ata_link_printk(link, KERN_WARNING, "device not ready " 424 ata_link_printk(link, KERN_WARNING, "device not ready "
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index e5df37689740..96deeb354e16 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -242,7 +242,7 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
242 242
243 skip_scr: 243 skip_scr:
244 /* wait for !BSY */ 244 /* wait for !BSY */
245 ata_sff_wait_ready(ap, deadline); 245 ata_sff_wait_ready(link, deadline);
246 246
247 return 0; 247 return 0;
248} 248}