diff options
author | Tejun Heo <htejun@gmail.com> | 2007-10-17 22:53:39 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-10-19 22:55:02 -0400 |
commit | aaa092a114696f4425cd57c4d7fa05110007e247 (patch) | |
tree | 6e51269c2ff131190c187f34537c936264145491 /drivers/ata/sata_sis.c | |
parent | 5c1ad8b30587694590691d6a83b1e7adaa7ca6d0 (diff) |
sata_sis: fix SCR read breakage
SCR read for controllers which uses PCI configuration space for SCR
access got broken while adding @val argument to SCR accessors. Fix
it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/sata_sis.c')
-rw-r--r-- | drivers/ata/sata_sis.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index 8d98a9fb0a42..dc8e5c06476c 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
@@ -166,11 +166,11 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |||
166 | return addr; | 166 | return addr; |
167 | } | 167 | } |
168 | 168 | ||
169 | static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) | 169 | static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) |
170 | { | 170 | { |
171 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 171 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
172 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 172 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); |
173 | u32 val, val2 = 0; | 173 | u32 val2 = 0; |
174 | u8 pmr; | 174 | u8 pmr; |
175 | 175 | ||
176 | if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ | 176 | if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ |
@@ -178,13 +178,16 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) | |||
178 | 178 | ||
179 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 179 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
180 | 180 | ||
181 | pci_read_config_dword(pdev, cfg_addr, &val); | 181 | pci_read_config_dword(pdev, cfg_addr, val); |
182 | 182 | ||
183 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || | 183 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || |
184 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) | 184 | (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) |
185 | pci_read_config_dword(pdev, cfg_addr+0x10, &val2); | 185 | pci_read_config_dword(pdev, cfg_addr+0x10, &val2); |
186 | 186 | ||
187 | return (val|val2) & 0xfffffffb; /* avoid problems with powerdowned ports */ | 187 | *val |= val2; |
188 | *val &= 0xfffffffb; /* avoid problems with powerdowned ports */ | ||
189 | |||
190 | return 0; | ||
188 | } | 191 | } |
189 | 192 | ||
190 | static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 193 | static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val) |
@@ -214,7 +217,7 @@ static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
214 | return -EINVAL; | 217 | return -EINVAL; |
215 | 218 | ||
216 | if (ap->flags & SIS_FLAG_CFGSCR) | 219 | if (ap->flags & SIS_FLAG_CFGSCR) |
217 | return sis_scr_cfg_read(ap, sc_reg); | 220 | return sis_scr_cfg_read(ap, sc_reg, val); |
218 | 221 | ||
219 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 222 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
220 | 223 | ||