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authorTejun Heo <htejun@gmail.com>2007-02-01 01:06:36 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-09 17:39:38 -0500
commit0d5ff566779f894ca9937231a181eb31e4adff0e (patch)
treed1c7495c932581c1d41aa7f0fdb303348da49106 /drivers/ata/sata_sis.c
parent1a68ff13c8a9b517de3fd4187dc525412a6eba1b (diff)
libata: convert to iomap
Convert libata core layer and LLDs to use iomap. * managed iomap is used. Pointer to pcim_iomap_table() is cached at host->iomap and used through out LLDs. This basically replaces host->mmio_base. * if possible, pcim_iomap_regions() is used Most iomap operation conversions are taken from Jeff Garzik <jgarzik@pobox.com>'s iomap branch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/sata_sis.c')
-rw-r--r--drivers/ata/sata_sis.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index 4bcb94866333..eee2097c10c0 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -117,7 +117,7 @@ static const struct ata_port_operations sis_ops = {
117 .bmdma_status = ata_bmdma_status, 117 .bmdma_status = ata_bmdma_status,
118 .qc_prep = ata_qc_prep, 118 .qc_prep = ata_qc_prep,
119 .qc_issue = ata_qc_issue_prot, 119 .qc_issue = ata_qc_issue_prot,
120 .data_xfer = ata_pio_data_xfer, 120 .data_xfer = ata_data_xfer,
121 .freeze = ata_bmdma_freeze, 121 .freeze = ata_bmdma_freeze,
122 .thaw = ata_bmdma_thaw, 122 .thaw = ata_bmdma_thaw,
123 .error_handler = ata_bmdma_error_handler, 123 .error_handler = ata_bmdma_error_handler,
@@ -223,11 +223,11 @@ static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
223 223
224 pci_read_config_byte(pdev, SIS_PMR, &pmr); 224 pci_read_config_byte(pdev, SIS_PMR, &pmr);
225 225
226 val = inl(ap->ioaddr.scr_addr + (sc_reg * 4)); 226 val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
227 227
228 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) || 228 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
229 (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED)) 229 (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
230 val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10); 230 val2 = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
231 231
232 return (val | val2) & 0xfffffffb; 232 return (val | val2) & 0xfffffffb;
233} 233}
@@ -245,10 +245,10 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
245 if (ap->flags & SIS_FLAG_CFGSCR) 245 if (ap->flags & SIS_FLAG_CFGSCR)
246 sis_scr_cfg_write(ap, sc_reg, val); 246 sis_scr_cfg_write(ap, sc_reg, val);
247 else { 247 else {
248 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 248 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4));
249 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) || 249 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
250 (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED)) 250 (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
251 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); 251 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
252 } 252 }
253} 253}
254 254
@@ -353,10 +353,14 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
353 return -ENOMEM; 353 return -ENOMEM;
354 354
355 if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) { 355 if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) {
356 probe_ent->port[0].scr_addr = 356 void *mmio;
357 pci_resource_start(pdev, SIS_SCR_PCI_BAR); 357
358 probe_ent->port[1].scr_addr = 358 mmio = pcim_iomap(pdev, SIS_SCR_PCI_BAR, 0);
359 pci_resource_start(pdev, SIS_SCR_PCI_BAR) + port2_start; 359 if (!mmio)
360 return -ENOMEM;
361
362 probe_ent->port[0].scr_addr = mmio;
363 probe_ent->port[1].scr_addr = mmio + port2_start;
360 } 364 }
361 365
362 pci_set_master(pdev); 366 pci_set_master(pdev);