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authorTejun Heo <htejun@gmail.com>2007-04-17 10:44:08 -0400
committerJeff Garzik <jeff@garzik.org>2007-04-28 14:16:03 -0400
commit9a829ccfc833269bdb85751f5048288ab93678ac (patch)
tree89732ae0da2ce1b1076d6ce8e80ac6aad8d9deb0 /drivers/ata/sata_sis.c
parenteca25dca17630ae354f4b1df559ed90578b794fe (diff)
libata: convert ata_pci_init_native_mode() users to new init model
Convert drivers which use ata_pci_init_native_mode() to new init model. ata_pci_init_native_host() is used instead. sata_nv, sata_uli and sata_sis are in this category. Tested on nVidia Corporation CK804 Serial ATA Controller [10de:0054] in both BMDMA and ADMA mode. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/sata_sis.c')
-rw-r--r--drivers/ata/sata_sis.c50
1 files changed, 16 insertions, 34 deletions
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index a787f0d4a5ba..d8ee062e82fc 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -121,7 +121,6 @@ static const struct ata_port_operations sis_ops = {
121 .thaw = ata_bmdma_thaw, 121 .thaw = ata_bmdma_thaw,
122 .error_handler = ata_bmdma_error_handler, 122 .error_handler = ata_bmdma_error_handler,
123 .post_internal_cmd = ata_bmdma_post_internal_cmd, 123 .post_internal_cmd = ata_bmdma_post_internal_cmd,
124 .irq_handler = ata_interrupt,
125 .irq_clear = ata_bmdma_irq_clear, 124 .irq_clear = ata_bmdma_irq_clear,
126 .irq_on = ata_irq_on, 125 .irq_on = ata_irq_on,
127 .irq_ack = ata_irq_ack, 126 .irq_ack = ata_irq_ack,
@@ -131,7 +130,6 @@ static const struct ata_port_operations sis_ops = {
131}; 130};
132 131
133static struct ata_port_info sis_port_info = { 132static struct ata_port_info sis_port_info = {
134 .sht = &sis_sht,
135 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 133 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
136 .pio_mask = 0x1f, 134 .pio_mask = 0x1f,
137 .mwdma_mask = 0x7, 135 .mwdma_mask = 0x7,
@@ -256,12 +254,13 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
256static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 254static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
257{ 255{
258 static int printed_version; 256 static int printed_version;
259 struct ata_probe_ent *probe_ent = NULL; 257 struct ata_port_info pi = sis_port_info;
260 int rc; 258 const struct ata_port_info *ppi[2] = { &pi, &pi };
259 struct ata_host *host;
261 u32 genctl, val; 260 u32 genctl, val;
262 struct ata_port_info pi = sis_port_info, *ppi[2] = { &pi, &pi };
263 u8 pmr; 261 u8 pmr;
264 u8 port2_start = 0x20; 262 u8 port2_start = 0x20;
263 int rc;
265 264
266 if (!printed_version++) 265 if (!printed_version++)
267 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 266 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -270,19 +269,6 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
270 if (rc) 269 if (rc)
271 return rc; 270 return rc;
272 271
273 rc = pci_request_regions(pdev, DRV_NAME);
274 if (rc) {
275 pcim_pin_device(pdev);
276 return rc;
277 }
278
279 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
280 if (rc)
281 return rc;
282 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
283 if (rc)
284 return rc;
285
286 /* check and see if the SCRs are in IO space or PCI cfg space */ 272 /* check and see if the SCRs are in IO space or PCI cfg space */
287 pci_read_config_dword(pdev, SIS_GENCTL, &genctl); 273 pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
288 if ((genctl & GENCTL_IOMAPPED_SCR) == 0) 274 if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
@@ -349,30 +335,26 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
349 break; 335 break;
350 } 336 }
351 337
352 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); 338 rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host);
353 if (!probe_ent) 339 if (rc)
354 return -ENOMEM; 340 return rc;
355 341
356 if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) { 342 if (!(pi.flags & SIS_FLAG_CFGSCR)) {
357 void __iomem *mmio; 343 void __iomem *mmio;
358 344
359 mmio = pcim_iomap(pdev, SIS_SCR_PCI_BAR, 0); 345 rc = pcim_iomap_regions(pdev, 1 << SIS_SCR_PCI_BAR, DRV_NAME);
360 if (!mmio) 346 if (rc)
361 return -ENOMEM; 347 return rc;
348 mmio = host->iomap[SIS_SCR_PCI_BAR];
362 349
363 probe_ent->port[0].scr_addr = mmio; 350 host->ports[0]->ioaddr.scr_addr = mmio;
364 probe_ent->port[1].scr_addr = mmio + port2_start; 351 host->ports[1]->ioaddr.scr_addr = mmio + port2_start;
365 } 352 }
366 353
367 pci_set_master(pdev); 354 pci_set_master(pdev);
368 pci_intx(pdev, 1); 355 pci_intx(pdev, 1);
369 356 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
370 if (!ata_device_add(probe_ent)) 357 &sis_sht);
371 return -EIO;
372
373 devm_kfree(&pdev->dev, probe_ent);
374 return 0;
375
376} 358}
377 359
378static int __init sis_init(void) 360static int __init sis_init(void)