libata: prefer hardreset

When both soft and hard resets are available, libata preferred
softreset till now.  The logic behind it was to be softer to devices;
however, this doesn't really help much.  Rationales for the change:

* BIOS may freeze lock certain things during boot and softreset can't
  unlock those.  This by itself is okay but during operation PHY event
  or other error conditions can trigger hardreset and the device may
  end up with different configuration.

  For example, after a hardreset, previously unlockable HPA can be
  unlocked resulting in different device size and thus revalidation
  failure.  Similar condition can occur during or after resume.

* Certain ATAPI devices require hardreset to recover after certain
  error conditions.  On PATA, this is done by issuing the DEVICE RESET
  command.  On SATA, COMRESET has equivalent effect.  The problem is
  that DEVICE RESET needs its own execution protocol.

  For SFF controllers with bare TF access, it can be easily
  implemented but more advanced controllers (e.g. ahci and sata_sil24)
  require specialized implementations.  Simply using hardreset solves
  the problem nicely.

* COMRESET initialization sequence is the norm in SATA land and many
  SATA devices don't work properly if only SRST is used.  For example,
  some PMPs behave this way and libata works around by always issuing
  hardreset if the host supports PMP.

  Like the above example, libata has developed a number of mechanisms
  aiming to promote softreset to hardreset if softreset is not going
  to work.  This approach is time consuming and error prone.

  Also, note that, dependingon how you read the specs, it could be
  argued that PMP fan-out ports require COMRESET to start operation.
  In fact, all the PMPs on the market except one don't work properly
  if COMRESET is not issued to fan-out ports after PMP reset.

* COMRESET is an integral part of SATA connection and any working
  device should be able to handle COMRESET properly.  After all, it's
  the way to signal hardreset during reboot.  This is the most used
  and recommended (at least by the ahci spec) method of resetting
  devices.

So, this patch makes libata prefer hardreset over softreset by making
the following changes.

* Rename ATA_EH_RESET_MASK to ATA_EH_RESET and use it whereever
  ATA_EH_{SOFT|HARD}RESET used to be used.  ATA_EH_{SOFT|HARD}RESET is
  now only used to tell prereset whether soft or hard reset will be
  issued.

* Strip out now unneeded promote-to-hardreset logics from
  ata_eh_reset(), ata_std_prereset(), sata_pmp_std_prereset() and
  other places.

Signed-off-by: Tejun Heo <htejun@gmail.com>

1 files changed, 27 insertions, 27 deletions

diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index df7988df7908..aa8d0323c9bb 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -286,45 +286,45 @@ static struct sil24_cerr_info {
                                     "device error via D2H FIS" },
         [PORT_CERR_SDB]         = { AC_ERR_DEV, 0,
                                     "device error via SDB FIS" },
-        [PORT_CERR_DATA]        = { AC_ERR_ATA_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_DATA]        = { AC_ERR_ATA_BUS, ATA_EH_RESET,
                                     "error in data FIS" },
-        [PORT_CERR_SEND]        = { AC_ERR_ATA_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_SEND]        = { AC_ERR_ATA_BUS, ATA_EH_RESET,
                                     "failed to transmit command FIS" },
-        [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET,
                                      "protocol mismatch" },
-        [PORT_CERR_DIRECTION]   = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_DIRECTION]   = { AC_ERR_HSM, ATA_EH_RESET,
                                     "data directon mismatch" },
-        [PORT_CERR_UNDERRUN]    = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_UNDERRUN]    = { AC_ERR_HSM, ATA_EH_RESET,
                                     "ran out of SGEs while writing" },
-        [PORT_CERR_OVERRUN]     = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_OVERRUN]     = { AC_ERR_HSM, ATA_EH_RESET,
                                     "ran out of SGEs while reading" },
-        [PORT_CERR_PKT_PROT]    = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_PKT_PROT]    = { AC_ERR_HSM, ATA_EH_RESET,
                                     "invalid data directon for ATAPI CDB" },
-        [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_SOFTRESET,
+        [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET,
                                      "SGT not on qword boundary" },
-        [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI target abort while fetching SGT" },
-        [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI master abort while fetching SGT" },
-        [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI parity error while fetching SGT" },
-        [PORT_CERR_CMD_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_SOFTRESET,
+        [PORT_CERR_CMD_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET,
                                      "PRB not on qword boundary" },
-        [PORT_CERR_CMD_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_CMD_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI target abort while fetching PRB" },
-        [PORT_CERR_CMD_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_CMD_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI master abort while fetching PRB" },
-        [PORT_CERR_CMD_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_CMD_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI parity error while fetching PRB" },
-        [PORT_CERR_XFR_UNDEF]   = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_XFR_UNDEF]   = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "undefined error while transferring data" },
-        [PORT_CERR_XFR_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_XFR_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI target abort while transferring data" },
-        [PORT_CERR_XFR_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_XFR_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI master abort while transferring data" },
-        [PORT_CERR_XFR_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET,
+        [PORT_CERR_XFR_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
                                     "PCI parity error while transferring data" },
-        [PORT_CERR_SENDSERVICE] = { AC_ERR_HSM, ATA_EH_SOFTRESET,
+        [PORT_CERR_SENDSERVICE] = { AC_ERR_HSM, ATA_EH_RESET,
                                     "FIS received while sending service FIS" },
 };
 
@@ -616,7 +616,7 @@ static int sil24_init_port(struct ata_port *ap)
 
         if ((tmp & (PORT_CS_INIT | PORT_CS_RDY)) != PORT_CS_RDY) {
                 pp->do_port_rst = 1;
-                ap->link.eh_context.i.action |= ATA_EH_HARDRESET;
+                ap->link.eh_context.i.action |= ATA_EH_RESET;
                 return -EIO;
         }
 
@@ -1022,7 +1022,7 @@ static void sil24_error_intr(struct ata_port *ap)
 
         if (irq_stat & PORT_IRQ_UNK_FIS) {
                 ehi->err_mask |= AC_ERR_HSM;
-                ehi->action |= ATA_EH_SOFTRESET;
+                ehi->action |= ATA_EH_RESET;
                 ata_ehi_push_desc(ehi, "unknown FIS");
                 freeze = 1;
         }
@@ -1043,7 +1043,7 @@ static void sil24_error_intr(struct ata_port *ap)
                  */
                 if (ap->nr_active_links >= 3) {
                         ehi->err_mask |= AC_ERR_OTHER;
-                        ehi->action |= ATA_EH_HARDRESET;
+                        ehi->action |= ATA_EH_RESET;
                         ata_ehi_push_desc(ehi, "PMP DMA CS errata");
                         pp->do_port_rst = 1;
                         freeze = 1;
@@ -1064,7 +1064,7 @@ static void sil24_error_intr(struct ata_port *ap)
                                                   irq_stat);
                         } else {
                                 err_mask |= AC_ERR_HSM;
-                                action |= ATA_EH_HARDRESET;
+                                action |= ATA_EH_RESET;
                                 freeze = 1;
                         }
                 } else
@@ -1078,12 +1078,12 @@ static void sil24_error_intr(struct ata_port *ap)
                 if (ci && ci->desc) {
                         err_mask |= ci->err_mask;
                         action |= ci->action;
-                        if (action & ATA_EH_RESET_MASK)
+                        if (action & ATA_EH_RESET)
                                 freeze = 1;
                         ata_ehi_push_desc(ehi, "%s", ci->desc);
                 } else {
                         err_mask |= AC_ERR_OTHER;
-                        action |= ATA_EH_SOFTRESET;
+                        action |= ATA_EH_RESET;
                         freeze = 1;
                         ata_ehi_push_desc(ehi, "unknown command error %d",
                                           cerr);
@@ -1153,7 +1153,7 @@ static inline void sil24_host_intr(struct ata_port *ap)
         if (rc < 0) {
                 struct ata_eh_info *ehi = &ap->link.eh_info;
                 ehi->err_mask |= AC_ERR_HSM;
-                ehi->action |= ATA_EH_SOFTRESET;
+                ehi->action |= ATA_EH_RESET;
                 ata_port_freeze(ap);
                 return;
         }