diff options
author | Tejun Heo <htejun@gmail.com> | 2006-10-15 19:47:18 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-12-01 22:40:29 -0500 |
commit | 28c8f3b4f9ec9a5acffdc846effb0695839ecf37 (patch) | |
tree | 31ee9d29e0e81df3dffa3d50b5b96374c73fc871 /drivers/ata/sata_sil24.c | |
parent | 309afcb5c87b5a41da51cc0c36f61c0e0d43ca9a (diff) |
[PATCH] sata_sil24: rename PMP related constants
Rename PMP related constants for consistency.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/sata_sil24.c')
-rw-r--r-- | drivers/ata/sata_sil24.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index 169e200a6a71..64882585a9e3 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -100,10 +100,10 @@ enum { | |||
100 | */ | 100 | */ |
101 | PORT_REGS_SIZE = 0x2000, | 101 | PORT_REGS_SIZE = 0x2000, |
102 | 102 | ||
103 | PORT_LRAM = 0x0000, /* 31 LRAM slots and PM regs */ | 103 | PORT_LRAM = 0x0000, /* 31 LRAM slots and PMP regs */ |
104 | PORT_LRAM_SLOT_SZ = 0x0080, /* 32 bytes PRB + 2 SGE, ACT... */ | 104 | PORT_LRAM_SLOT_SZ = 0x0080, /* 32 bytes PRB + 2 SGE, ACT... */ |
105 | 105 | ||
106 | PORT_PM = 0x0f80, /* 8 bytes PM * 16 (128 bytes) */ | 106 | PORT_PMP = 0x0f80, /* 8 bytes PMP * 16 (128 bytes) */ |
107 | /* 32 bit regs */ | 107 | /* 32 bit regs */ |
108 | PORT_CTRL_STAT = 0x1000, /* write: ctrl-set, read: stat */ | 108 | PORT_CTRL_STAT = 0x1000, /* write: ctrl-set, read: stat */ |
109 | PORT_CTRL_CLR = 0x1004, /* write: ctrl-clear */ | 109 | PORT_CTRL_CLR = 0x1004, /* write: ctrl-clear */ |
@@ -139,9 +139,9 @@ enum { | |||
139 | PORT_CS_INIT = (1 << 2), /* port initialize */ | 139 | PORT_CS_INIT = (1 << 2), /* port initialize */ |
140 | PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */ | 140 | PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */ |
141 | PORT_CS_CDB16 = (1 << 5), /* 0=12b cdb, 1=16b cdb */ | 141 | PORT_CS_CDB16 = (1 << 5), /* 0=12b cdb, 1=16b cdb */ |
142 | PORT_CS_RESUME = (1 << 6), /* port resume */ | 142 | PORT_CS_PMP_RESUME = (1 << 6), /* PMP resume */ |
143 | PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */ | 143 | PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */ |
144 | PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */ | 144 | PORT_CS_PMP_EN = (1 << 13), /* port multiplier enable */ |
145 | PORT_CS_RDY = (1 << 31), /* port ready to accept commands */ | 145 | PORT_CS_RDY = (1 << 31), /* port ready to accept commands */ |
146 | 146 | ||
147 | /* PORT_IRQ_STAT/ENABLE_SET/CLR */ | 147 | /* PORT_IRQ_STAT/ENABLE_SET/CLR */ |
@@ -562,7 +562,7 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class) | |||
562 | 562 | ||
563 | /* do SRST */ | 563 | /* do SRST */ |
564 | prb->ctrl = cpu_to_le16(PRB_CTRL_SRST); | 564 | prb->ctrl = cpu_to_le16(PRB_CTRL_SRST); |
565 | prb->fis[1] = 0; /* no PM yet */ | 565 | prb->fis[1] = 0; /* no PMP yet */ |
566 | 566 | ||
567 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); | 567 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); |
568 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); | 568 | writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); |
@@ -1050,7 +1050,8 @@ static void sil24_init_controller(struct pci_dev *pdev, int n_ports, | |||
1050 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); | 1050 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); |
1051 | 1051 | ||
1052 | /* Clear port multiplier enable and resume bits */ | 1052 | /* Clear port multiplier enable and resume bits */ |
1053 | writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR); | 1053 | writel(PORT_CS_PMP_EN | PORT_CS_PMP_RESUME, |
1054 | port + PORT_CTRL_CLR); | ||
1054 | } | 1055 | } |
1055 | 1056 | ||
1056 | /* Turn on interrupts */ | 1057 | /* Turn on interrupts */ |