libata: convert to chained sg

libata used private sg iterator to handle padding sg.  Now that sg can
be chained, padding can be handled using standard sg ops.  Convert to
chained sg.

* s/qc->__sg/qc->sg/

* s/qc->pad_sgent/qc->extra_sg[]/.  Because chaining consumes one sg
  entry.  There need to be two extra sg entries.  The renaming is also
  for future addition of other extra sg entries.

* Padding setup is moved into ata_sg_setup_extra() which is organized
  in a way that future addition of other extra sg entries is easy.

* qc->orig_n_elem is unused and removed.

* qc->n_elem now contains the number of sg entries that LLDs should
  map.  qc->mapped_n_elem is added to carry the original number of
  mapped sgs for unmapping.

* The last sg of the original sg list is used to chain to extra sg
  list.  The original last sg is pointed to by qc->last_sg and the
  content is stored in qc->saved_last_sg.  It's restored during
  ata_sg_clean().

* All sg walking code has been updated.  Unnecessary assertions and
  checks for conditions the core layer already guarantees are removed.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

1 files changed, 9 insertions, 16 deletions

diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index ed5dc7cb50cd..a0f98fdab7a0 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -1336,21 +1336,18 @@ static void nv_adma_fill_aprd(struct ata_queued_cmd *qc,
 static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb)
 {
         struct nv_adma_port_priv *pp = qc->ap->private_data;
-        unsigned int idx;
         struct nv_adma_prd *aprd;
         struct scatterlist *sg;
+        unsigned int si;
 
         VPRINTK("ENTER\n");
 
-        idx = 0;
-
-        ata_for_each_sg(sg, qc) {
-                aprd = (idx < 5) ? &cpb->aprd[idx] :
-                               &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)];
-                nv_adma_fill_aprd(qc, sg, idx, aprd);
-                idx++;
+        for_each_sg(qc->sg, sg, qc->n_elem, si) {
+                aprd = (si < 5) ? &cpb->aprd[si] :
+                               &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (si-5)];
+                nv_adma_fill_aprd(qc, sg, si, aprd);
         }
-        if (idx > 5)
+        if (si > 5)
                 cpb->next_aprd = cpu_to_le64(((u64)(pp->aprd_dma + NV_ADMA_SGTBL_SZ * qc->tag)));
         else
                 cpb->next_aprd = cpu_to_le64(0);
@@ -1995,17 +1992,14 @@ static void nv_swncq_fill_sg(struct ata_queued_cmd *qc)
 {
         struct ata_port *ap = qc->ap;
         struct scatterlist *sg;
-        unsigned int idx;
         struct nv_swncq_port_priv *pp = ap->private_data;
         struct ata_prd *prd;
-
-        WARN_ON(qc->__sg == NULL);
-        WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
+        unsigned int si, idx;
 
         prd = pp->prd + ATA_MAX_PRD * qc->tag;
 
         idx = 0;
-        ata_for_each_sg(sg, qc) {
+        for_each_sg(qc->sg, sg, qc->n_elem, si) {
                 u32 addr, offset;
                 u32 sg_len, len;
 
@@ -2027,8 +2021,7 @@ static void nv_swncq_fill_sg(struct ata_queued_cmd *qc)
                 }
         }
 
-        if (idx)
-                prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+        prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 static unsigned int nv_swncq_issue_atacmd(struct ata_port *ap,