diff options
author | Mark Lord <liml@rtr.ca> | 2008-05-17 13:34:42 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-05-19 17:28:44 -0400 |
commit | 51de32d200b21333950abc52ea1e589bc4eecef7 (patch) | |
tree | 987158ee6317d8db2a8c8873e4417062397fcd44 /drivers/ata/sata_mv.c | |
parent | c443c5002b24ff5d2f4efcc25a861f0cb835130a (diff) |
sata_mv: don't blindly enable IRQs
Part one of simplifying/fixing handling of the main_irq_mask register
to resolve unexpected interrupt issues observed in 2.6.26-rc*.
Don't blindly enable port IRQs at host init time.
Instead, enable only the bits that we want,
which in this case is simply the PCI_ERR bit.
The per-port bits can wait until the ports are reset/probed for devices.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/sata_mv.c')
-rw-r--r-- | drivers/ata/sata_mv.c | 32 |
1 files changed, 6 insertions, 26 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 239ea4778c56..4e7948e29140 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -202,13 +202,6 @@ enum { | |||
202 | HC_MAIN_RSVD = (0x7f << 25), /* bits 31-25 */ | 202 | HC_MAIN_RSVD = (0x7f << 25), /* bits 31-25 */ |
203 | HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */ | 203 | HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */ |
204 | HC_MAIN_RSVD_SOC = (0x3fffffb << 6), /* bits 31-9, 7-6 */ | 204 | HC_MAIN_RSVD_SOC = (0x3fffffb << 6), /* bits 31-9, 7-6 */ |
205 | HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE | | ||
206 | PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE | | ||
207 | PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT | | ||
208 | HC_MAIN_RSVD), | ||
209 | HC_MAIN_MASKED_IRQS_5 = (PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE | | ||
210 | HC_MAIN_RSVD_5), | ||
211 | HC_MAIN_MASKED_IRQS_SOC = (PORTS_0_3_COAL_DONE | HC_MAIN_RSVD_SOC), | ||
212 | 205 | ||
213 | /* SATAHC registers */ | 206 | /* SATAHC registers */ |
214 | HC_CFG_OFS = 0, | 207 | HC_CFG_OFS = 0, |
@@ -3101,25 +3094,12 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) | |||
3101 | 3094 | ||
3102 | /* and unmask interrupt generation for host regs */ | 3095 | /* and unmask interrupt generation for host regs */ |
3103 | writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs); | 3096 | writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs); |
3104 | if (IS_GEN_I(hpriv)) | 3097 | |
3105 | writelfl(~HC_MAIN_MASKED_IRQS_5, | 3098 | /* |
3106 | hpriv->main_irq_mask_addr); | 3099 | * enable only global host interrupts for now. |
3107 | else | 3100 | * The per-port interrupts get done later as ports are set up. |
3108 | writelfl(~HC_MAIN_MASKED_IRQS, | 3101 | */ |
3109 | hpriv->main_irq_mask_addr); | 3102 | writelfl(PCI_ERR, hpriv->main_irq_mask_addr); |
3110 | |||
3111 | VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x " | ||
3112 | "PCI int cause/mask=0x%08x/0x%08x\n", | ||
3113 | readl(hpriv->main_irq_cause_addr), | ||
3114 | readl(hpriv->main_irq_mask_addr), | ||
3115 | readl(mmio + hpriv->irq_cause_ofs), | ||
3116 | readl(mmio + hpriv->irq_mask_ofs)); | ||
3117 | } else { | ||
3118 | writelfl(~HC_MAIN_MASKED_IRQS_SOC, | ||
3119 | hpriv->main_irq_mask_addr); | ||
3120 | VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x\n", | ||
3121 | readl(hpriv->main_irq_cause_addr), | ||
3122 | readl(hpriv->main_irq_mask_addr)); | ||
3123 | } | 3103 | } |
3124 | done: | 3104 | done: |
3125 | return rc; | 3105 | return rc; |