diff options
author | Tejun Heo <htejun@gmail.com> | 2008-04-30 03:35:16 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-05-06 11:40:56 -0400 |
commit | ba66b242b1c3432b44d893c64124522b3bdce71e (patch) | |
tree | 5b698d3c8e1c3b88e559f8479e2e8fc591470cb9 /drivers/ata/sata_inic162x.c | |
parent | f8b0685a8ea8e3974f8953378ede2111f8d49d22 (diff) |
sata_inic162x: add cardbus support
When attached to cardbus, mmio region is at BAR 1. Other than that,
everything else is the same. Add support for it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/sata_inic162x.c')
-rw-r--r-- | drivers/ata/sata_inic162x.c | 36 |
1 files changed, 24 insertions, 12 deletions
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index 55f8e93ac48e..8c1f06a3c8fd 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -31,7 +31,8 @@ | |||
31 | #define DRV_VERSION "0.3" | 31 | #define DRV_VERSION "0.3" |
32 | 32 | ||
33 | enum { | 33 | enum { |
34 | MMIO_BAR = 5, | 34 | MMIO_BAR_PCI = 5, |
35 | MMIO_BAR_CARDBUS = 1, | ||
35 | 36 | ||
36 | NR_PORTS = 2, | 37 | NR_PORTS = 2, |
37 | 38 | ||
@@ -197,6 +198,7 @@ struct inic_pkt { | |||
197 | } __packed; | 198 | } __packed; |
198 | 199 | ||
199 | struct inic_host_priv { | 200 | struct inic_host_priv { |
201 | void __iomem *mmio_base; | ||
200 | u16 cached_hctl; | 202 | u16 cached_hctl; |
201 | }; | 203 | }; |
202 | 204 | ||
@@ -221,7 +223,9 @@ static const int scr_map[] = { | |||
221 | 223 | ||
222 | static void __iomem *inic_port_base(struct ata_port *ap) | 224 | static void __iomem *inic_port_base(struct ata_port *ap) |
223 | { | 225 | { |
224 | return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; | 226 | struct inic_host_priv *hpriv = ap->host->private_data; |
227 | |||
228 | return hpriv->mmio_base + ap->port_no * PORT_SIZE; | ||
225 | } | 229 | } |
226 | 230 | ||
227 | static void inic_reset_port(void __iomem *port_base) | 231 | static void inic_reset_port(void __iomem *port_base) |
@@ -378,11 +382,11 @@ static void inic_host_intr(struct ata_port *ap) | |||
378 | static irqreturn_t inic_interrupt(int irq, void *dev_instance) | 382 | static irqreturn_t inic_interrupt(int irq, void *dev_instance) |
379 | { | 383 | { |
380 | struct ata_host *host = dev_instance; | 384 | struct ata_host *host = dev_instance; |
381 | void __iomem *mmio_base = host->iomap[MMIO_BAR]; | 385 | struct inic_host_priv *hpriv = host->private_data; |
382 | u16 host_irq_stat; | 386 | u16 host_irq_stat; |
383 | int i, handled = 0;; | 387 | int i, handled = 0;; |
384 | 388 | ||
385 | host_irq_stat = readw(mmio_base + HOST_IRQ_STAT); | 389 | host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); |
386 | 390 | ||
387 | if (unlikely(!(host_irq_stat & HIRQ_GLOBAL))) | 391 | if (unlikely(!(host_irq_stat & HIRQ_GLOBAL))) |
388 | goto out; | 392 | goto out; |
@@ -770,7 +774,6 @@ static int inic_pci_device_resume(struct pci_dev *pdev) | |||
770 | { | 774 | { |
771 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | 775 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
772 | struct inic_host_priv *hpriv = host->private_data; | 776 | struct inic_host_priv *hpriv = host->private_data; |
773 | void __iomem *mmio_base = host->iomap[MMIO_BAR]; | ||
774 | int rc; | 777 | int rc; |
775 | 778 | ||
776 | rc = ata_pci_device_do_resume(pdev); | 779 | rc = ata_pci_device_do_resume(pdev); |
@@ -778,7 +781,7 @@ static int inic_pci_device_resume(struct pci_dev *pdev) | |||
778 | return rc; | 781 | return rc; |
779 | 782 | ||
780 | if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { | 783 | if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { |
781 | rc = init_controller(mmio_base, hpriv->cached_hctl); | 784 | rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); |
782 | if (rc) | 785 | if (rc) |
783 | return rc; | 786 | return rc; |
784 | } | 787 | } |
@@ -796,6 +799,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
796 | struct ata_host *host; | 799 | struct ata_host *host; |
797 | struct inic_host_priv *hpriv; | 800 | struct inic_host_priv *hpriv; |
798 | void __iomem * const *iomap; | 801 | void __iomem * const *iomap; |
802 | int mmio_bar; | ||
799 | int i, rc; | 803 | int i, rc; |
800 | 804 | ||
801 | if (!printed_version++) | 805 | if (!printed_version++) |
@@ -809,22 +813,30 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
809 | 813 | ||
810 | host->private_data = hpriv; | 814 | host->private_data = hpriv; |
811 | 815 | ||
812 | /* acquire resources and fill host */ | 816 | /* Acquire resources and fill host. Note that PCI and cardbus |
817 | * use different BARs. | ||
818 | */ | ||
813 | rc = pcim_enable_device(pdev); | 819 | rc = pcim_enable_device(pdev); |
814 | if (rc) | 820 | if (rc) |
815 | return rc; | 821 | return rc; |
816 | 822 | ||
817 | rc = pcim_iomap_regions(pdev, 1 << MMIO_BAR, DRV_NAME); | 823 | if (pci_resource_flags(pdev, MMIO_BAR_PCI) & IORESOURCE_MEM) |
824 | mmio_bar = MMIO_BAR_PCI; | ||
825 | else | ||
826 | mmio_bar = MMIO_BAR_CARDBUS; | ||
827 | |||
828 | rc = pcim_iomap_regions(pdev, 1 << mmio_bar, DRV_NAME); | ||
818 | if (rc) | 829 | if (rc) |
819 | return rc; | 830 | return rc; |
820 | host->iomap = iomap = pcim_iomap_table(pdev); | 831 | host->iomap = iomap = pcim_iomap_table(pdev); |
821 | hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL); | 832 | hpriv->mmio_base = iomap[mmio_bar]; |
833 | hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL); | ||
822 | 834 | ||
823 | for (i = 0; i < NR_PORTS; i++) { | 835 | for (i = 0; i < NR_PORTS; i++) { |
824 | struct ata_port *ap = host->ports[i]; | 836 | struct ata_port *ap = host->ports[i]; |
825 | 837 | ||
826 | ata_port_pbar_desc(ap, MMIO_BAR, -1, "mmio"); | 838 | ata_port_pbar_desc(ap, mmio_bar, -1, "mmio"); |
827 | ata_port_pbar_desc(ap, MMIO_BAR, i * PORT_SIZE, "port"); | 839 | ata_port_pbar_desc(ap, mmio_bar, i * PORT_SIZE, "port"); |
828 | } | 840 | } |
829 | 841 | ||
830 | /* Set dma_mask. This devices doesn't support 64bit addressing. */ | 842 | /* Set dma_mask. This devices doesn't support 64bit addressing. */ |
@@ -854,7 +866,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
854 | return rc; | 866 | return rc; |
855 | } | 867 | } |
856 | 868 | ||
857 | rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl); | 869 | rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); |
858 | if (rc) { | 870 | if (rc) { |
859 | dev_printk(KERN_ERR, &pdev->dev, | 871 | dev_printk(KERN_ERR, &pdev->dev, |
860 | "failed to initialize controller\n"); | 872 | "failed to initialize controller\n"); |