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authorPrabhakar Kushwaha <prabhakar@freescale.com>2011-03-06 22:58:10 -0500
committerJeff Garzik <jgarzik@pobox.com>2011-03-14 03:05:48 -0400
commit578ca87c9d18d344b449a8eefee40c10e4fc319f (patch)
tree87222242fd3ee975a18a7d2d1b555d5a078ed1cb /drivers/ata/sata_fsl.c
parent4ac7534a7ff1aa1b1486e39bdf169aaa8a9bb3e2 (diff)
sata_fsl: Update RX_WATER_MARK for TRANSCFG
RX_WATER_MARK sets the number of locations in Rx FIFO that can be used before the transport layer instructs the link layer to transmit HOLDS. Note that it can take some time for the HOLDs to get to the other end, and that in the interim there must be enough room in the FIFO to absorb all data that could arrive. Update the new recommended value to 16. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/ata/sata_fsl.c')
-rw-r--r--drivers/ata/sata_fsl.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 2ddb567f165b..7f9eab34a386 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -185,6 +185,11 @@ enum {
185 COMMANDSTAT = 0x20, 185 COMMANDSTAT = 0x20,
186}; 186};
187 187
188/* TRANSCFG (transport-layer) configuration control */
189enum {
190 TRANSCFG_RX_WATER_MARK = (1 << 4),
191};
192
188/* PHY (link-layer) configuration control */ 193/* PHY (link-layer) configuration control */
189enum { 194enum {
190 PHY_BIST_ENABLE = 0x01, 195 PHY_BIST_ENABLE = 0x01,
@@ -1305,6 +1310,7 @@ static int sata_fsl_probe(struct platform_device *ofdev,
1305 struct sata_fsl_host_priv *host_priv = NULL; 1310 struct sata_fsl_host_priv *host_priv = NULL;
1306 int irq; 1311 int irq;
1307 struct ata_host *host; 1312 struct ata_host *host;
1313 u32 temp;
1308 1314
1309 struct ata_port_info pi = sata_fsl_port_info[0]; 1315 struct ata_port_info pi = sata_fsl_port_info[0];
1310 const struct ata_port_info *ppi[] = { &pi, NULL }; 1316 const struct ata_port_info *ppi[] = { &pi, NULL };
@@ -1319,6 +1325,12 @@ static int sata_fsl_probe(struct platform_device *ofdev,
1319 ssr_base = hcr_base + 0x100; 1325 ssr_base = hcr_base + 0x100;
1320 csr_base = hcr_base + 0x140; 1326 csr_base = hcr_base + 0x140;
1321 1327
1328 if (!of_device_is_compatible(ofdev->dev.of_node, "fsl,mpc8315-sata")) {
1329 temp = ioread32(csr_base + TRANSCFG);
1330 temp = temp & 0xffffffe0;
1331 iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG);
1332 }
1333
1322 DPRINTK("@reset i/o = 0x%x\n", ioread32(csr_base + TRANSCFG)); 1334 DPRINTK("@reset i/o = 0x%x\n", ioread32(csr_base + TRANSCFG));
1323 DPRINTK("sizeof(cmd_desc) = %d\n", sizeof(struct command_desc)); 1335 DPRINTK("sizeof(cmd_desc) = %d\n", sizeof(struct command_desc));
1324 DPRINTK("sizeof(#define cmd_desc) = %d\n", SATA_FSL_CMD_DESC_SIZE); 1336 DPRINTK("sizeof(#define cmd_desc) = %d\n", SATA_FSL_CMD_DESC_SIZE);