diff options
author | Dan McGee <dpmcgee@gmail.com> | 2011-09-07 12:23:18 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2011-10-08 00:07:15 -0400 |
commit | 023a0175ad4beaa14b303e133963c971ad31c338 (patch) | |
tree | b42523c36ddb185248632556270a4a1fbf9ec57c /drivers/ata/pata_sis.c | |
parent | 904c04feaf13ed58790a34a0b11cd7b885b94b4b (diff) |
pata_sis: extract a sis_port_base() method
This is similar to the existing sis_old_port_base() method. We do this
same calculation and logic in multiple places (with one more to come in
a future patch), so extracting it into a method makes sense.
Reviewed-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Dan McGee <dpmcgee@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/pata_sis.c')
-rw-r--r-- | drivers/ata/pata_sis.c | 46 |
1 files changed, 28 insertions, 18 deletions
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c index 533f2aefab87..10af293b1c6f 100644 --- a/drivers/ata/pata_sis.c +++ b/drivers/ata/pata_sis.c | |||
@@ -89,6 +89,29 @@ static int sis_old_port_base(struct ata_device *adev) | |||
89 | } | 89 | } |
90 | 90 | ||
91 | /** | 91 | /** |
92 | * sis_port_base - return PCI configuration base for dev | ||
93 | * @adev: device | ||
94 | * | ||
95 | * Returns the base of the PCI configuration registers for this port | ||
96 | * number. | ||
97 | */ | ||
98 | |||
99 | static int sis_port_base(struct ata_device *adev) | ||
100 | { | ||
101 | struct ata_port *ap = adev->link->ap; | ||
102 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
103 | int port = 0x40; | ||
104 | u32 reg54; | ||
105 | |||
106 | /* If bit 30 is set then the registers are mapped at 0x70 not 0x40 */ | ||
107 | pci_read_config_dword(pdev, 0x54, ®54); | ||
108 | if (reg54 & 0x40000000) | ||
109 | port = 0x70; | ||
110 | |||
111 | return port + (8 * ap->port_no) + (4 * adev->devno); | ||
112 | } | ||
113 | |||
114 | /** | ||
92 | * sis_133_cable_detect - check for 40/80 pin | 115 | * sis_133_cable_detect - check for 40/80 pin |
93 | * @ap: Port | 116 | * @ap: Port |
94 | * @deadline: deadline jiffies for the operation | 117 | * @deadline: deadline jiffies for the operation |
@@ -266,9 +289,8 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
266 | static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) | 289 | static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) |
267 | { | 290 | { |
268 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 291 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
269 | int port = 0x40; | 292 | int port; |
270 | u32 t1; | 293 | u32 t1; |
271 | u32 reg54; | ||
272 | int speed = adev->pio_mode - XFER_PIO_0; | 294 | int speed = adev->pio_mode - XFER_PIO_0; |
273 | 295 | ||
274 | const u32 timing133[] = { | 296 | const u32 timing133[] = { |
@@ -288,12 +310,7 @@ static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) | |||
288 | 310 | ||
289 | sis_set_fifo(ap, adev); | 311 | sis_set_fifo(ap, adev); |
290 | 312 | ||
291 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ | 313 | port = sis_port_base(adev); |
292 | pci_read_config_dword(pdev, 0x54, ®54); | ||
293 | if (reg54 & 0x40000000) | ||
294 | port = 0x70; | ||
295 | port += 8 * ap->port_no + 4 * adev->devno; | ||
296 | |||
297 | pci_read_config_dword(pdev, port, &t1); | 314 | pci_read_config_dword(pdev, port, &t1); |
298 | t1 &= 0xC0C00FFF; /* Mask out timing */ | 315 | t1 &= 0xC0C00FFF; /* Mask out timing */ |
299 | 316 | ||
@@ -465,21 +482,14 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a | |||
465 | static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) | 482 | static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
466 | { | 483 | { |
467 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 484 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
468 | int speed = adev->dma_mode - XFER_MW_DMA_0; | 485 | int port; |
469 | int port = 0x40; | ||
470 | u32 t1; | 486 | u32 t1; |
471 | u32 reg54; | ||
472 | 487 | ||
473 | /* bits 4- cycle time 8 - cvs time */ | 488 | /* bits 4- cycle time 8 - cvs time */ |
474 | static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; | 489 | static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; |
475 | static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; | 490 | static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; |
476 | 491 | ||
477 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ | 492 | port = sis_port_base(adev); |
478 | pci_read_config_dword(pdev, 0x54, ®54); | ||
479 | if (reg54 & 0x40000000) | ||
480 | port = 0x70; | ||
481 | port += (8 * ap->port_no) + (4 * adev->devno); | ||
482 | |||
483 | pci_read_config_dword(pdev, port, &t1); | 493 | pci_read_config_dword(pdev, port, &t1); |
484 | 494 | ||
485 | if (adev->dma_mode < XFER_UDMA_0) { | 495 | if (adev->dma_mode < XFER_UDMA_0) { |
@@ -487,7 +497,7 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) | |||
487 | /* FIXME: need data sheet to add MWDMA here. Also lacking on | 497 | /* FIXME: need data sheet to add MWDMA here. Also lacking on |
488 | ide/pci driver */ | 498 | ide/pci driver */ |
489 | } else { | 499 | } else { |
490 | speed = adev->dma_mode - XFER_UDMA_0; | 500 | int speed = adev->dma_mode - XFER_UDMA_0; |
491 | /* if & 8 no UDMA133 - need info for ... */ | 501 | /* if & 8 no UDMA133 - need info for ... */ |
492 | t1 &= ~0x00000FF0; | 502 | t1 &= ~0x00000FF0; |
493 | t1 |= 0x00000004; | 503 | t1 |= 0x00000004; |