diff options
author | Tejun Heo <htejun@gmail.com> | 2007-04-17 10:44:08 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-04-28 14:16:06 -0400 |
commit | 5d728824efeda61d304153bfcf1378a3c18b7d70 (patch) | |
tree | 8a3d4ba0c1c650da5c161f11155e7c19f0fe78aa /drivers/ata/pata_pdc2027x.c | |
parent | 4447d35156169cf136e829eb6b5cac2d6370f2d9 (diff) |
libata: convert the remaining PATA drivers to new init model
Convert pdc_adma, pata_cs5520, pata_isapnp, pata_ixp4xx_cf,
pata_legacy, pata_mpc52xx, pata_mpiix, pata_pcmcia, pata_pdc2027x,
pata_platform, pata_qdi, pata_scc and pata_winbond to new init model.
* init_one()'s now follow more consistent init order
* cs5520 now registers one host with two ports, not two hosts. If any
of the two ports are disabled, it's made dummy as other drivers do.
Tested pdc_adma and pata_legacy. Both are as broken as before. The
rest are compile tested only.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_pdc2027x.c')
-rw-r--r-- | drivers/ata/pata_pdc2027x.c | 98 |
1 files changed, 38 insertions, 60 deletions
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index 8261f4f8c1dc..a61cbc110688 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c | |||
@@ -171,7 +171,6 @@ static struct ata_port_operations pdc2027x_pata100_ops = { | |||
171 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 171 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
172 | .cable_detect = pdc2027x_cable_detect, | 172 | .cable_detect = pdc2027x_cable_detect, |
173 | 173 | ||
174 | .irq_handler = ata_interrupt, | ||
175 | .irq_clear = ata_bmdma_irq_clear, | 174 | .irq_clear = ata_bmdma_irq_clear, |
176 | .irq_on = ata_irq_on, | 175 | .irq_on = ata_irq_on, |
177 | .irq_ack = ata_irq_ack, | 176 | .irq_ack = ata_irq_ack, |
@@ -207,7 +206,6 @@ static struct ata_port_operations pdc2027x_pata133_ops = { | |||
207 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 206 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
208 | .cable_detect = pdc2027x_cable_detect, | 207 | .cable_detect = pdc2027x_cable_detect, |
209 | 208 | ||
210 | .irq_handler = ata_interrupt, | ||
211 | .irq_clear = ata_bmdma_irq_clear, | 209 | .irq_clear = ata_bmdma_irq_clear, |
212 | .irq_on = ata_irq_on, | 210 | .irq_on = ata_irq_on, |
213 | .irq_ack = ata_irq_ack, | 211 | .irq_ack = ata_irq_ack, |
@@ -218,7 +216,6 @@ static struct ata_port_operations pdc2027x_pata133_ops = { | |||
218 | static struct ata_port_info pdc2027x_port_info[] = { | 216 | static struct ata_port_info pdc2027x_port_info[] = { |
219 | /* PDC_UDMA_100 */ | 217 | /* PDC_UDMA_100 */ |
220 | { | 218 | { |
221 | .sht = &pdc2027x_sht, | ||
222 | .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | | 219 | .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | |
223 | ATA_FLAG_MMIO, | 220 | ATA_FLAG_MMIO, |
224 | .pio_mask = 0x1f, /* pio0-4 */ | 221 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -228,7 +225,6 @@ static struct ata_port_info pdc2027x_port_info[] = { | |||
228 | }, | 225 | }, |
229 | /* PDC_UDMA_133 */ | 226 | /* PDC_UDMA_133 */ |
230 | { | 227 | { |
231 | .sht = &pdc2027x_sht, | ||
232 | .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | | 228 | .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | |
233 | ATA_FLAG_MMIO, | 229 | ATA_FLAG_MMIO, |
234 | .pio_mask = 0x1f, /* pio0-4 */ | 230 | .pio_mask = 0x1f, /* pio0-4 */ |
@@ -555,12 +551,12 @@ static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc) | |||
555 | 551 | ||
556 | /** | 552 | /** |
557 | * pdc_read_counter - Read the ctr counter | 553 | * pdc_read_counter - Read the ctr counter |
558 | * @probe_ent: for the port address | 554 | * @host: target ATA host |
559 | */ | 555 | */ |
560 | 556 | ||
561 | static long pdc_read_counter(struct ata_probe_ent *probe_ent) | 557 | static long pdc_read_counter(struct ata_host *host) |
562 | { | 558 | { |
563 | void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; | 559 | void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; |
564 | long counter; | 560 | long counter; |
565 | int retry = 1; | 561 | int retry = 1; |
566 | u32 bccrl, bccrh, bccrlv, bccrhv; | 562 | u32 bccrl, bccrh, bccrlv, bccrhv; |
@@ -598,12 +594,12 @@ retry: | |||
598 | * adjust_pll - Adjust the PLL input clock in Hz. | 594 | * adjust_pll - Adjust the PLL input clock in Hz. |
599 | * | 595 | * |
600 | * @pdc_controller: controller specific information | 596 | * @pdc_controller: controller specific information |
601 | * @probe_ent: For the port address | 597 | * @host: target ATA host |
602 | * @pll_clock: The input of PLL in HZ | 598 | * @pll_clock: The input of PLL in HZ |
603 | */ | 599 | */ |
604 | static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsigned int board_idx) | 600 | static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx) |
605 | { | 601 | { |
606 | void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; | 602 | void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; |
607 | u16 pll_ctl; | 603 | u16 pll_ctl; |
608 | long pll_clock_khz = pll_clock / 1000; | 604 | long pll_clock_khz = pll_clock / 1000; |
609 | long pout_required = board_idx? PDC_133_MHZ:PDC_100_MHZ; | 605 | long pout_required = board_idx? PDC_133_MHZ:PDC_100_MHZ; |
@@ -683,19 +679,19 @@ static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsi | |||
683 | 679 | ||
684 | /** | 680 | /** |
685 | * detect_pll_input_clock - Detect the PLL input clock in Hz. | 681 | * detect_pll_input_clock - Detect the PLL input clock in Hz. |
686 | * @probe_ent: for the port address | 682 | * @host: target ATA host |
687 | * Ex. 16949000 on 33MHz PCI bus for pdc20275. | 683 | * Ex. 16949000 on 33MHz PCI bus for pdc20275. |
688 | * Half of the PCI clock. | 684 | * Half of the PCI clock. |
689 | */ | 685 | */ |
690 | static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent) | 686 | static long pdc_detect_pll_input_clock(struct ata_host *host) |
691 | { | 687 | { |
692 | void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; | 688 | void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; |
693 | u32 scr; | 689 | u32 scr; |
694 | long start_count, end_count; | 690 | long start_count, end_count; |
695 | long pll_clock; | 691 | long pll_clock; |
696 | 692 | ||
697 | /* Read current counter value */ | 693 | /* Read current counter value */ |
698 | start_count = pdc_read_counter(probe_ent); | 694 | start_count = pdc_read_counter(host); |
699 | 695 | ||
700 | /* Start the test mode */ | 696 | /* Start the test mode */ |
701 | scr = readl(mmio_base + PDC_SYS_CTL); | 697 | scr = readl(mmio_base + PDC_SYS_CTL); |
@@ -707,7 +703,7 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent) | |||
707 | mdelay(100); | 703 | mdelay(100); |
708 | 704 | ||
709 | /* Read the counter values again */ | 705 | /* Read the counter values again */ |
710 | end_count = pdc_read_counter(probe_ent); | 706 | end_count = pdc_read_counter(host); |
711 | 707 | ||
712 | /* Stop the test mode */ | 708 | /* Stop the test mode */ |
713 | scr = readl(mmio_base + PDC_SYS_CTL); | 709 | scr = readl(mmio_base + PDC_SYS_CTL); |
@@ -726,11 +722,10 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent) | |||
726 | 722 | ||
727 | /** | 723 | /** |
728 | * pdc_hardware_init - Initialize the hardware. | 724 | * pdc_hardware_init - Initialize the hardware. |
729 | * @pdev: instance of pci_dev found | 725 | * @host: target ATA host |
730 | * @pdc_controller: controller specific information | 726 | * @board_idx: board identifier |
731 | * @pe: for the port address | ||
732 | */ | 727 | */ |
733 | static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, unsigned int board_idx) | 728 | static int pdc_hardware_init(struct ata_host *host, unsigned int board_idx) |
734 | { | 729 | { |
735 | long pll_clock; | 730 | long pll_clock; |
736 | 731 | ||
@@ -740,15 +735,15 @@ static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, uns | |||
740 | * Ex. 25MHz or 40MHz, we have to adjust the cycle_time. | 735 | * Ex. 25MHz or 40MHz, we have to adjust the cycle_time. |
741 | * The pdc20275 controller employs PLL circuit to help correct timing registers setting. | 736 | * The pdc20275 controller employs PLL circuit to help correct timing registers setting. |
742 | */ | 737 | */ |
743 | pll_clock = pdc_detect_pll_input_clock(pe); | 738 | pll_clock = pdc_detect_pll_input_clock(host); |
744 | 739 | ||
745 | if (pll_clock < 0) /* counter overflow? Try again. */ | 740 | if (pll_clock < 0) /* counter overflow? Try again. */ |
746 | pll_clock = pdc_detect_pll_input_clock(pe); | 741 | pll_clock = pdc_detect_pll_input_clock(host); |
747 | 742 | ||
748 | dev_printk(KERN_INFO, &pdev->dev, "PLL input clock %ld kHz\n", pll_clock/1000); | 743 | dev_printk(KERN_INFO, host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); |
749 | 744 | ||
750 | /* Adjust PLL control register */ | 745 | /* Adjust PLL control register */ |
751 | pdc_adjust_pll(pe, pll_clock, board_idx); | 746 | pdc_adjust_pll(host, pll_clock, board_idx); |
752 | 747 | ||
753 | return 0; | 748 | return 0; |
754 | } | 749 | } |
@@ -780,8 +775,7 @@ static void pdc_ata_setup_port(struct ata_ioports *port, void __iomem *base) | |||
780 | * Called when an instance of PCI adapter is inserted. | 775 | * Called when an instance of PCI adapter is inserted. |
781 | * This function checks whether the hardware is supported, | 776 | * This function checks whether the hardware is supported, |
782 | * initialize hardware and register an instance of ata_host to | 777 | * initialize hardware and register an instance of ata_host to |
783 | * libata by providing struct ata_probe_ent and ata_device_add(). | 778 | * libata. (implements struct pci_driver.probe() ) |
784 | * (implements struct pci_driver.probe() ) | ||
785 | * | 779 | * |
786 | * @pdev: instance of pci_dev found | 780 | * @pdev: instance of pci_dev found |
787 | * @ent: matching entry in the id_tbl[] | 781 | * @ent: matching entry in the id_tbl[] |
@@ -790,14 +784,21 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de | |||
790 | { | 784 | { |
791 | static int printed_version; | 785 | static int printed_version; |
792 | unsigned int board_idx = (unsigned int) ent->driver_data; | 786 | unsigned int board_idx = (unsigned int) ent->driver_data; |
793 | 787 | const struct ata_port_info *ppi[] = | |
794 | struct ata_probe_ent *probe_ent; | 788 | { &pdc2027x_port_info[board_idx], NULL }; |
789 | struct ata_host *host; | ||
795 | void __iomem *mmio_base; | 790 | void __iomem *mmio_base; |
796 | int rc; | 791 | int rc; |
797 | 792 | ||
798 | if (!printed_version++) | 793 | if (!printed_version++) |
799 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); | 794 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
800 | 795 | ||
796 | /* alloc host */ | ||
797 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); | ||
798 | if (!host) | ||
799 | return -ENOMEM; | ||
800 | |||
801 | /* acquire resources and fill host */ | ||
801 | rc = pcim_enable_device(pdev); | 802 | rc = pcim_enable_device(pdev); |
802 | if (rc) | 803 | if (rc) |
803 | return rc; | 804 | return rc; |
@@ -805,6 +806,7 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de | |||
805 | rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME); | 806 | rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME); |
806 | if (rc) | 807 | if (rc) |
807 | return rc; | 808 | return rc; |
809 | host->iomap = pcim_iomap_table(pdev); | ||
808 | 810 | ||
809 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | 811 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
810 | if (rc) | 812 | if (rc) |
@@ -814,46 +816,22 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de | |||
814 | if (rc) | 816 | if (rc) |
815 | return rc; | 817 | return rc; |
816 | 818 | ||
817 | /* Prepare the probe entry */ | 819 | mmio_base = host->iomap[PDC_MMIO_BAR]; |
818 | probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); | ||
819 | if (probe_ent == NULL) | ||
820 | return -ENOMEM; | ||
821 | |||
822 | probe_ent->dev = pci_dev_to_dev(pdev); | ||
823 | INIT_LIST_HEAD(&probe_ent->node); | ||
824 | |||
825 | probe_ent->sht = pdc2027x_port_info[board_idx].sht; | ||
826 | probe_ent->port_flags = pdc2027x_port_info[board_idx].flags; | ||
827 | probe_ent->pio_mask = pdc2027x_port_info[board_idx].pio_mask; | ||
828 | probe_ent->mwdma_mask = pdc2027x_port_info[board_idx].mwdma_mask; | ||
829 | probe_ent->udma_mask = pdc2027x_port_info[board_idx].udma_mask; | ||
830 | probe_ent->port_ops = pdc2027x_port_info[board_idx].port_ops; | ||
831 | 820 | ||
832 | probe_ent->irq = pdev->irq; | 821 | pdc_ata_setup_port(&host->ports[0]->ioaddr, mmio_base + 0x17c0); |
833 | probe_ent->irq_flags = IRQF_SHARED; | 822 | host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x1000; |
834 | probe_ent->iomap = pcim_iomap_table(pdev); | 823 | pdc_ata_setup_port(&host->ports[1]->ioaddr, mmio_base + 0x15c0); |
824 | host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x1008; | ||
835 | 825 | ||
836 | mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; | ||
837 | |||
838 | pdc_ata_setup_port(&probe_ent->port[0], mmio_base + 0x17c0); | ||
839 | probe_ent->port[0].bmdma_addr = mmio_base + 0x1000; | ||
840 | pdc_ata_setup_port(&probe_ent->port[1], mmio_base + 0x15c0); | ||
841 | probe_ent->port[1].bmdma_addr = mmio_base + 0x1008; | ||
842 | |||
843 | probe_ent->n_ports = 2; | ||
844 | |||
845 | pci_set_master(pdev); | ||
846 | //pci_enable_intx(pdev); | 826 | //pci_enable_intx(pdev); |
847 | 827 | ||
848 | /* initialize adapter */ | 828 | /* initialize adapter */ |
849 | if (pdc_hardware_init(pdev, probe_ent, board_idx) != 0) | 829 | if (pdc_hardware_init(host, board_idx) != 0) |
850 | return -EIO; | 830 | return -EIO; |
851 | 831 | ||
852 | if (!ata_device_add(probe_ent)) | 832 | pci_set_master(pdev); |
853 | return -ENODEV; | 833 | return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, |
854 | 834 | &pdc2027x_sht); | |
855 | devm_kfree(&pdev->dev, probe_ent); | ||
856 | return 0; | ||
857 | } | 835 | } |
858 | 836 | ||
859 | /** | 837 | /** |