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authorTejun Heo <htejun@gmail.com>2007-02-01 01:06:36 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-09 17:39:38 -0500
commit0d5ff566779f894ca9937231a181eb31e4adff0e (patch)
treed1c7495c932581c1d41aa7f0fdb303348da49106 /drivers/ata/pata_optidma.c
parent1a68ff13c8a9b517de3fd4187dc525412a6eba1b (diff)
libata: convert to iomap
Convert libata core layer and LLDs to use iomap. * managed iomap is used. Pointer to pcim_iomap_table() is cached at host->iomap and used through out LLDs. This basically replaces host->mmio_base. * if possible, pcim_iomap_regions() is used Most iomap operation conversions are taken from Jeff Garzik <jgarzik@pobox.com>'s iomap branch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_optidma.c')
-rw-r--r--drivers/ata/pata_optidma.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 74d2e7a28da0..067fca1fa8a1 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -91,12 +91,12 @@ static void optidma_error_handler(struct ata_port *ap)
91 91
92static void optidma_unlock(struct ata_port *ap) 92static void optidma_unlock(struct ata_port *ap)
93{ 93{
94 unsigned long regio = ap->ioaddr.cmd_addr; 94 void __iomem *regio = ap->ioaddr.cmd_addr;
95 95
96 /* These 3 unlock the control register access */ 96 /* These 3 unlock the control register access */
97 inw(regio + 1); 97 ioread16(regio + 1);
98 inw(regio + 1); 98 ioread16(regio + 1);
99 outb(3, regio + 2); 99 iowrite8(3, regio + 2);
100} 100}
101 101
102/** 102/**
@@ -108,10 +108,10 @@ static void optidma_unlock(struct ata_port *ap)
108 108
109static void optidma_lock(struct ata_port *ap) 109static void optidma_lock(struct ata_port *ap)
110{ 110{
111 unsigned long regio = ap->ioaddr.cmd_addr; 111 void __iomem *regio = ap->ioaddr.cmd_addr;
112 112
113 /* Relock */ 113 /* Relock */
114 outb(0x83, regio + 2); 114 iowrite8(0x83, regio + 2);
115} 115}
116 116
117/** 117/**
@@ -133,7 +133,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo
133 struct ata_device *pair = ata_dev_pair(adev); 133 struct ata_device *pair = ata_dev_pair(adev);
134 int pio = adev->pio_mode - XFER_PIO_0; 134 int pio = adev->pio_mode - XFER_PIO_0;
135 int dma = adev->dma_mode - XFER_MW_DMA_0; 135 int dma = adev->dma_mode - XFER_MW_DMA_0;
136 unsigned long regio = ap->ioaddr.cmd_addr; 136 void __iomem *regio = ap->ioaddr.cmd_addr;
137 u8 addr; 137 u8 addr;
138 138
139 /* Address table precomputed with a DCLK of 2 */ 139 /* Address table precomputed with a DCLK of 2 */
@@ -178,20 +178,20 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo
178 178
179 /* Commence primary programming sequence */ 179 /* Commence primary programming sequence */
180 /* First we load the device number into the timing select */ 180 /* First we load the device number into the timing select */
181 outb(adev->devno, regio + MISC_REG); 181 iowrite8(adev->devno, regio + MISC_REG);
182 /* Now we load the data timings into read data/write data */ 182 /* Now we load the data timings into read data/write data */
183 if (mode < XFER_MW_DMA_0) { 183 if (mode < XFER_MW_DMA_0) {
184 outb(data_rec_timing[pci_clock][pio], regio + READ_REG); 184 iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG);
185 outb(data_rec_timing[pci_clock][pio], regio + WRITE_REG); 185 iowrite8(data_rec_timing[pci_clock][pio], regio + WRITE_REG);
186 } else if (mode < XFER_UDMA_0) { 186 } else if (mode < XFER_UDMA_0) {
187 outb(dma_data_rec_timing[pci_clock][dma], regio + READ_REG); 187 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG);
188 outb(dma_data_rec_timing[pci_clock][dma], regio + WRITE_REG); 188 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + WRITE_REG);
189 } 189 }
190 /* Finally we load the address setup into the misc register */ 190 /* Finally we load the address setup into the misc register */
191 outb(addr | adev->devno, regio + MISC_REG); 191 iowrite8(addr | adev->devno, regio + MISC_REG);
192 192
193 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ 193 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */
194 outb(0x85, regio + CNTRL_REG); 194 iowrite8(0x85, regio + CNTRL_REG);
195 195
196 /* Switch back to IDE mode */ 196 /* Switch back to IDE mode */
197 optidma_lock(ap); 197 optidma_lock(ap);
@@ -389,7 +389,7 @@ static struct ata_port_operations optidma_port_ops = {
389 .qc_prep = ata_qc_prep, 389 .qc_prep = ata_qc_prep,
390 .qc_issue = ata_qc_issue_prot, 390 .qc_issue = ata_qc_issue_prot,
391 391
392 .data_xfer = ata_pio_data_xfer, 392 .data_xfer = ata_data_xfer,
393 393
394 .irq_handler = ata_interrupt, 394 .irq_handler = ata_interrupt,
395 .irq_clear = ata_bmdma_irq_clear, 395 .irq_clear = ata_bmdma_irq_clear,
@@ -422,7 +422,7 @@ static struct ata_port_operations optiplus_port_ops = {
422 .qc_prep = ata_qc_prep, 422 .qc_prep = ata_qc_prep,
423 .qc_issue = ata_qc_issue_prot, 423 .qc_issue = ata_qc_issue_prot,
424 424
425 .data_xfer = ata_pio_data_xfer, 425 .data_xfer = ata_data_xfer,
426 426
427 .irq_handler = ata_interrupt, 427 .irq_handler = ata_interrupt,
428 .irq_clear = ata_bmdma_irq_clear, 428 .irq_clear = ata_bmdma_irq_clear,