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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-12-15 17:13:26 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-15 17:13:26 -0500
commit7e1548a597ef7e26d5d62f8be3be6da9e101b26c (patch)
treefe6cbf4d9a3c1afdba04fb276fef0f932403727c /drivers/ata/pata_ninja32.c
parent1f7f569c0ae6e619504095eabf796edd712d943d (diff)
parent2619bc327417f549f1c89d5ef9b4a4aa768f41a2 (diff)
Merge branch 'omap3-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Diffstat (limited to 'drivers/ata/pata_ninja32.c')
-rw-r--r--drivers/ata/pata_ninja32.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c
index 4e466eae8b46..4dd9a3b031e4 100644
--- a/drivers/ata/pata_ninja32.c
+++ b/drivers/ata/pata_ninja32.c
@@ -44,7 +44,7 @@
44#include <linux/libata.h> 44#include <linux/libata.h>
45 45
46#define DRV_NAME "pata_ninja32" 46#define DRV_NAME "pata_ninja32"
47#define DRV_VERSION "0.1.1" 47#define DRV_VERSION "0.1.3"
48 48
49 49
50/** 50/**
@@ -130,7 +130,8 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
130 return rc; 130 return rc;
131 pci_set_master(dev); 131 pci_set_master(dev);
132 132
133 /* Set up the register mappings */ 133 /* Set up the register mappings. We use the I/O mapping as only the
134 older chips also have MMIO on BAR 1 */
134 base = host->iomap[0]; 135 base = host->iomap[0];
135 if (!base) 136 if (!base)
136 return -ENOMEM; 137 return -ENOMEM;
@@ -167,8 +168,12 @@ static int ninja32_reinit_one(struct pci_dev *pdev)
167#endif 168#endif
168 169
169static const struct pci_device_id ninja32[] = { 170static const struct pci_device_id ninja32[] = {
171 { 0x10FC, 0x0003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
172 { 0x1145, 0x8008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
173 { 0x1145, 0xf008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
170 { 0x1145, 0xf021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 174 { 0x1145, 0xf021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
171 { 0x1145, 0xf024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 175 { 0x1145, 0xf024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
176 { 0x1145, 0xf02C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
172 { }, 177 { },
173}; 178};
174 179