diff options
author | Tejun Heo <htejun@gmail.com> | 2007-02-01 01:06:36 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-02-09 17:39:38 -0500 |
commit | 0d5ff566779f894ca9937231a181eb31e4adff0e (patch) | |
tree | d1c7495c932581c1d41aa7f0fdb303348da49106 /drivers/ata/pata_legacy.c | |
parent | 1a68ff13c8a9b517de3fd4187dc525412a6eba1b (diff) |
libata: convert to iomap
Convert libata core layer and LLDs to use iomap.
* managed iomap is used. Pointer to pcim_iomap_table() is cached at
host->iomap and used through out LLDs. This basically replaces
host->mmio_base.
* if possible, pcim_iomap_regions() is used
Most iomap operation conversions are taken from Jeff Garzik
<jgarzik@pobox.com>'s iomap branch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_legacy.c')
-rw-r--r-- | drivers/ata/pata_legacy.c | 101 |
1 files changed, 55 insertions, 46 deletions
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index 9532b9bb6d2f..78b5f7136e1e 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c | |||
@@ -164,7 +164,7 @@ static struct ata_port_operations simple_port_ops = { | |||
164 | .qc_prep = ata_qc_prep, | 164 | .qc_prep = ata_qc_prep, |
165 | .qc_issue = ata_qc_issue_prot, | 165 | .qc_issue = ata_qc_issue_prot, |
166 | 166 | ||
167 | .data_xfer = ata_pio_data_xfer_noirq, | 167 | .data_xfer = ata_data_xfer_noirq, |
168 | 168 | ||
169 | .irq_handler = ata_interrupt, | 169 | .irq_handler = ata_interrupt, |
170 | .irq_clear = ata_bmdma_irq_clear, | 170 | .irq_clear = ata_bmdma_irq_clear, |
@@ -187,7 +187,7 @@ static struct ata_port_operations legacy_port_ops = { | |||
187 | .qc_prep = ata_qc_prep, | 187 | .qc_prep = ata_qc_prep, |
188 | .qc_issue = ata_qc_issue_prot, | 188 | .qc_issue = ata_qc_issue_prot, |
189 | 189 | ||
190 | .data_xfer = ata_pio_data_xfer_noirq, | 190 | .data_xfer = ata_data_xfer_noirq, |
191 | 191 | ||
192 | .irq_handler = ata_interrupt, | 192 | .irq_handler = ata_interrupt, |
193 | .irq_clear = ata_bmdma_irq_clear, | 193 | .irq_clear = ata_bmdma_irq_clear, |
@@ -253,31 +253,33 @@ static void pdc_data_xfer_vlb(struct ata_device *adev, unsigned char *buf, unsig | |||
253 | local_irq_save(flags); | 253 | local_irq_save(flags); |
254 | 254 | ||
255 | /* Perform the 32bit I/O synchronization sequence */ | 255 | /* Perform the 32bit I/O synchronization sequence */ |
256 | inb(ap->ioaddr.nsect_addr); | 256 | ioread8(ap->ioaddr.nsect_addr); |
257 | inb(ap->ioaddr.nsect_addr); | 257 | ioread8(ap->ioaddr.nsect_addr); |
258 | inb(ap->ioaddr.nsect_addr); | 258 | ioread8(ap->ioaddr.nsect_addr); |
259 | 259 | ||
260 | /* Now the data */ | 260 | /* Now the data */ |
261 | 261 | ||
262 | if (write_data) | 262 | if (write_data) |
263 | outsl(ap->ioaddr.data_addr, buf, buflen >> 2); | 263 | iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); |
264 | else | 264 | else |
265 | insl(ap->ioaddr.data_addr, buf, buflen >> 2); | 265 | ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); |
266 | 266 | ||
267 | if (unlikely(slop)) { | 267 | if (unlikely(slop)) { |
268 | u32 pad; | 268 | u32 pad; |
269 | if (write_data) { | 269 | if (write_data) { |
270 | memcpy(&pad, buf + buflen - slop, slop); | 270 | memcpy(&pad, buf + buflen - slop, slop); |
271 | outl(le32_to_cpu(pad), ap->ioaddr.data_addr); | 271 | pad = le32_to_cpu(pad); |
272 | iowrite32(pad, ap->ioaddr.data_addr); | ||
272 | } else { | 273 | } else { |
273 | pad = cpu_to_le16(inl(ap->ioaddr.data_addr)); | 274 | pad = ioread32(ap->ioaddr.data_addr); |
275 | pad = cpu_to_le16(pad); | ||
274 | memcpy(buf + buflen - slop, &pad, slop); | 276 | memcpy(buf + buflen - slop, &pad, slop); |
275 | } | 277 | } |
276 | } | 278 | } |
277 | local_irq_restore(flags); | 279 | local_irq_restore(flags); |
278 | } | 280 | } |
279 | else | 281 | else |
280 | ata_pio_data_xfer_noirq(adev, buf, buflen, write_data); | 282 | ata_data_xfer_noirq(adev, buf, buflen, write_data); |
281 | } | 283 | } |
282 | 284 | ||
283 | static struct ata_port_operations pdc20230_port_ops = { | 285 | static struct ata_port_operations pdc20230_port_ops = { |
@@ -326,8 +328,8 @@ static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
326 | inb(0x3E6); | 328 | inb(0x3E6); |
327 | inb(0x3E6); | 329 | inb(0x3E6); |
328 | 330 | ||
329 | outb(recover << 4 | active, ap->ioaddr.device_addr); | 331 | iowrite8(recover << 4 | active, ap->ioaddr.device_addr); |
330 | inb(ap->ioaddr.status_addr); | 332 | ioread8(ap->ioaddr.status_addr); |
331 | } | 333 | } |
332 | 334 | ||
333 | static struct ata_port_operations ht6560a_port_ops = { | 335 | static struct ata_port_operations ht6560a_port_ops = { |
@@ -345,7 +347,7 @@ static struct ata_port_operations ht6560a_port_ops = { | |||
345 | .qc_prep = ata_qc_prep, | 347 | .qc_prep = ata_qc_prep, |
346 | .qc_issue = ata_qc_issue_prot, | 348 | .qc_issue = ata_qc_issue_prot, |
347 | 349 | ||
348 | .data_xfer = ata_pio_data_xfer, /* Check vlb/noirq */ | 350 | .data_xfer = ata_data_xfer, /* Check vlb/noirq */ |
349 | 351 | ||
350 | .irq_handler = ata_interrupt, | 352 | .irq_handler = ata_interrupt, |
351 | .irq_clear = ata_bmdma_irq_clear, | 353 | .irq_clear = ata_bmdma_irq_clear, |
@@ -379,7 +381,7 @@ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
379 | inb(0x3E6); | 381 | inb(0x3E6); |
380 | inb(0x3E6); | 382 | inb(0x3E6); |
381 | 383 | ||
382 | outb(recover << 4 | active, ap->ioaddr.device_addr); | 384 | iowrite8(recover << 4 | active, ap->ioaddr.device_addr); |
383 | 385 | ||
384 | if (adev->class != ATA_DEV_ATA) { | 386 | if (adev->class != ATA_DEV_ATA) { |
385 | u8 rconf = inb(0x3E6); | 387 | u8 rconf = inb(0x3E6); |
@@ -388,7 +390,7 @@ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
388 | outb(rconf, 0x3E6); | 390 | outb(rconf, 0x3E6); |
389 | } | 391 | } |
390 | } | 392 | } |
391 | inb(ap->ioaddr.status_addr); | 393 | ioread8(ap->ioaddr.status_addr); |
392 | } | 394 | } |
393 | 395 | ||
394 | static struct ata_port_operations ht6560b_port_ops = { | 396 | static struct ata_port_operations ht6560b_port_ops = { |
@@ -406,7 +408,7 @@ static struct ata_port_operations ht6560b_port_ops = { | |||
406 | .qc_prep = ata_qc_prep, | 408 | .qc_prep = ata_qc_prep, |
407 | .qc_issue = ata_qc_issue_prot, | 409 | .qc_issue = ata_qc_issue_prot, |
408 | 410 | ||
409 | .data_xfer = ata_pio_data_xfer, /* FIXME: Check 32bit and noirq */ | 411 | .data_xfer = ata_data_xfer, /* FIXME: Check 32bit and noirq */ |
410 | 412 | ||
411 | .irq_handler = ata_interrupt, | 413 | .irq_handler = ata_interrupt, |
412 | .irq_clear = ata_bmdma_irq_clear, | 414 | .irq_clear = ata_bmdma_irq_clear, |
@@ -454,12 +456,12 @@ static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev | |||
454 | u8 rc; | 456 | u8 rc; |
455 | 457 | ||
456 | /* Enter configuration mode */ | 458 | /* Enter configuration mode */ |
457 | inw(ap->ioaddr.error_addr); | 459 | ioread16(ap->ioaddr.error_addr); |
458 | inw(ap->ioaddr.error_addr); | 460 | ioread16(ap->ioaddr.error_addr); |
459 | outb(3, ap->ioaddr.nsect_addr); | 461 | iowrite8(3, ap->ioaddr.nsect_addr); |
460 | 462 | ||
461 | /* Read VLB clock strapping */ | 463 | /* Read VLB clock strapping */ |
462 | clock = 1000000000 / khz[inb(ap->ioaddr.lbah_addr) & 0x03]; | 464 | clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03]; |
463 | 465 | ||
464 | /* Get the timing data in cycles */ | 466 | /* Get the timing data in cycles */ |
465 | ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); | 467 | ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); |
@@ -477,33 +479,33 @@ static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev | |||
477 | setup = FIT(t.setup, 1, 4) - 1; | 479 | setup = FIT(t.setup, 1, 4) - 1; |
478 | 480 | ||
479 | /* Select the right timing bank for write timing */ | 481 | /* Select the right timing bank for write timing */ |
480 | rc = inb(ap->ioaddr.lbal_addr); | 482 | rc = ioread8(ap->ioaddr.lbal_addr); |
481 | rc &= 0x7F; | 483 | rc &= 0x7F; |
482 | rc |= (adev->devno << 7); | 484 | rc |= (adev->devno << 7); |
483 | outb(rc, ap->ioaddr.lbal_addr); | 485 | iowrite8(rc, ap->ioaddr.lbal_addr); |
484 | 486 | ||
485 | /* Write the timings */ | 487 | /* Write the timings */ |
486 | outb(active << 4 | recover, ap->ioaddr.error_addr); | 488 | iowrite8(active << 4 | recover, ap->ioaddr.error_addr); |
487 | 489 | ||
488 | /* Select the right bank for read timings, also | 490 | /* Select the right bank for read timings, also |
489 | load the shared timings for address */ | 491 | load the shared timings for address */ |
490 | rc = inb(ap->ioaddr.device_addr); | 492 | rc = ioread8(ap->ioaddr.device_addr); |
491 | rc &= 0xC0; | 493 | rc &= 0xC0; |
492 | rc |= adev->devno; /* Index select */ | 494 | rc |= adev->devno; /* Index select */ |
493 | rc |= (setup << 4) | 0x04; | 495 | rc |= (setup << 4) | 0x04; |
494 | outb(rc, ap->ioaddr.device_addr); | 496 | iowrite8(rc, ap->ioaddr.device_addr); |
495 | 497 | ||
496 | /* Load the read timings */ | 498 | /* Load the read timings */ |
497 | outb(active << 4 | recover, ap->ioaddr.data_addr); | 499 | iowrite8(active << 4 | recover, ap->ioaddr.data_addr); |
498 | 500 | ||
499 | /* Ensure the timing register mode is right */ | 501 | /* Ensure the timing register mode is right */ |
500 | rc = inb (ap->ioaddr.lbal_addr); | 502 | rc = ioread8(ap->ioaddr.lbal_addr); |
501 | rc &= 0x73; | 503 | rc &= 0x73; |
502 | rc |= 0x84; | 504 | rc |= 0x84; |
503 | outb(rc, ap->ioaddr.lbal_addr); | 505 | iowrite8(rc, ap->ioaddr.lbal_addr); |
504 | 506 | ||
505 | /* Exit command mode */ | 507 | /* Exit command mode */ |
506 | outb(0x83, ap->ioaddr.nsect_addr); | 508 | iowrite8(0x83, ap->ioaddr.nsect_addr); |
507 | } | 509 | } |
508 | 510 | ||
509 | 511 | ||
@@ -522,7 +524,7 @@ static struct ata_port_operations opti82c611a_port_ops = { | |||
522 | .qc_prep = ata_qc_prep, | 524 | .qc_prep = ata_qc_prep, |
523 | .qc_issue = ata_qc_issue_prot, | 525 | .qc_issue = ata_qc_issue_prot, |
524 | 526 | ||
525 | .data_xfer = ata_pio_data_xfer, | 527 | .data_xfer = ata_data_xfer, |
526 | 528 | ||
527 | .irq_handler = ata_interrupt, | 529 | .irq_handler = ata_interrupt, |
528 | .irq_clear = ata_bmdma_irq_clear, | 530 | .irq_clear = ata_bmdma_irq_clear, |
@@ -551,9 +553,9 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
551 | sysclk = opti_syscfg(0xAC) & 0xC0; /* BIOS set */ | 553 | sysclk = opti_syscfg(0xAC) & 0xC0; /* BIOS set */ |
552 | 554 | ||
553 | /* Enter configuration mode */ | 555 | /* Enter configuration mode */ |
554 | inw(ap->ioaddr.error_addr); | 556 | ioread16(ap->ioaddr.error_addr); |
555 | inw(ap->ioaddr.error_addr); | 557 | ioread16(ap->ioaddr.error_addr); |
556 | outb(3, ap->ioaddr.nsect_addr); | 558 | iowrite8(3, ap->ioaddr.nsect_addr); |
557 | 559 | ||
558 | /* Read VLB clock strapping */ | 560 | /* Read VLB clock strapping */ |
559 | clock = 1000000000 / khz[sysclk]; | 561 | clock = 1000000000 / khz[sysclk]; |
@@ -574,33 +576,33 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
574 | setup = FIT(t.setup, 1, 4) - 1; | 576 | setup = FIT(t.setup, 1, 4) - 1; |
575 | 577 | ||
576 | /* Select the right timing bank for write timing */ | 578 | /* Select the right timing bank for write timing */ |
577 | rc = inb(ap->ioaddr.lbal_addr); | 579 | rc = ioread8(ap->ioaddr.lbal_addr); |
578 | rc &= 0x7F; | 580 | rc &= 0x7F; |
579 | rc |= (adev->devno << 7); | 581 | rc |= (adev->devno << 7); |
580 | outb(rc, ap->ioaddr.lbal_addr); | 582 | iowrite8(rc, ap->ioaddr.lbal_addr); |
581 | 583 | ||
582 | /* Write the timings */ | 584 | /* Write the timings */ |
583 | outb(active << 4 | recover, ap->ioaddr.error_addr); | 585 | iowrite8(active << 4 | recover, ap->ioaddr.error_addr); |
584 | 586 | ||
585 | /* Select the right bank for read timings, also | 587 | /* Select the right bank for read timings, also |
586 | load the shared timings for address */ | 588 | load the shared timings for address */ |
587 | rc = inb(ap->ioaddr.device_addr); | 589 | rc = ioread8(ap->ioaddr.device_addr); |
588 | rc &= 0xC0; | 590 | rc &= 0xC0; |
589 | rc |= adev->devno; /* Index select */ | 591 | rc |= adev->devno; /* Index select */ |
590 | rc |= (setup << 4) | 0x04; | 592 | rc |= (setup << 4) | 0x04; |
591 | outb(rc, ap->ioaddr.device_addr); | 593 | iowrite8(rc, ap->ioaddr.device_addr); |
592 | 594 | ||
593 | /* Load the read timings */ | 595 | /* Load the read timings */ |
594 | outb(active << 4 | recover, ap->ioaddr.data_addr); | 596 | iowrite8(active << 4 | recover, ap->ioaddr.data_addr); |
595 | 597 | ||
596 | /* Ensure the timing register mode is right */ | 598 | /* Ensure the timing register mode is right */ |
597 | rc = inb (ap->ioaddr.lbal_addr); | 599 | rc = ioread8(ap->ioaddr.lbal_addr); |
598 | rc &= 0x73; | 600 | rc &= 0x73; |
599 | rc |= 0x84; | 601 | rc |= 0x84; |
600 | outb(rc, ap->ioaddr.lbal_addr); | 602 | iowrite8(rc, ap->ioaddr.lbal_addr); |
601 | 603 | ||
602 | /* Exit command mode */ | 604 | /* Exit command mode */ |
603 | outb(0x83, ap->ioaddr.nsect_addr); | 605 | iowrite8(0x83, ap->ioaddr.nsect_addr); |
604 | 606 | ||
605 | /* We need to know this for quad device on the MVB */ | 607 | /* We need to know this for quad device on the MVB */ |
606 | ap->host->private_data = ap; | 608 | ap->host->private_data = ap; |
@@ -650,7 +652,7 @@ static struct ata_port_operations opti82c46x_port_ops = { | |||
650 | .qc_prep = ata_qc_prep, | 652 | .qc_prep = ata_qc_prep, |
651 | .qc_issue = opti82c46x_qc_issue_prot, | 653 | .qc_issue = opti82c46x_qc_issue_prot, |
652 | 654 | ||
653 | .data_xfer = ata_pio_data_xfer, | 655 | .data_xfer = ata_data_xfer, |
654 | 656 | ||
655 | .irq_handler = ata_interrupt, | 657 | .irq_handler = ata_interrupt, |
656 | .irq_clear = ata_bmdma_irq_clear, | 658 | .irq_clear = ata_bmdma_irq_clear, |
@@ -676,6 +678,7 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl | |||
676 | struct ata_probe_ent ae; | 678 | struct ata_probe_ent ae; |
677 | struct platform_device *pdev; | 679 | struct platform_device *pdev; |
678 | struct ata_port_operations *ops = &legacy_port_ops; | 680 | struct ata_port_operations *ops = &legacy_port_ops; |
681 | void __iomem *io_addr, *ctrl_addr; | ||
679 | int pio_modes = pio_mask; | 682 | int pio_modes = pio_mask; |
680 | u32 mask = (1 << port); | 683 | u32 mask = (1 << port); |
681 | int ret; | 684 | int ret; |
@@ -689,6 +692,12 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl | |||
689 | devm_request_region(&pdev->dev, ctrl, 1, "pata_legacy") == NULL) | 692 | devm_request_region(&pdev->dev, ctrl, 1, "pata_legacy") == NULL) |
690 | goto fail; | 693 | goto fail; |
691 | 694 | ||
695 | ret = -ENOMEM; | ||
696 | io_addr = devm_ioport_map(&pdev->dev, io, 8); | ||
697 | ctrl_addr = devm_ioport_map(&pdev->dev, ctrl, 1); | ||
698 | if (!io_addr || !ctrl_addr) | ||
699 | goto fail; | ||
700 | |||
692 | if (ht6560a & mask) { | 701 | if (ht6560a & mask) { |
693 | ops = &ht6560a_port_ops; | 702 | ops = &ht6560a_port_ops; |
694 | pio_modes = 0x07; | 703 | pio_modes = 0x07; |
@@ -754,9 +763,9 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl | |||
754 | ae.irq = irq; | 763 | ae.irq = irq; |
755 | ae.irq_flags = 0; | 764 | ae.irq_flags = 0; |
756 | ae.port_flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST; | 765 | ae.port_flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST; |
757 | ae.port[0].cmd_addr = io; | 766 | ae.port[0].cmd_addr = io_addr; |
758 | ae.port[0].altstatus_addr = ctrl; | 767 | ae.port[0].altstatus_addr = ctrl_addr; |
759 | ae.port[0].ctl_addr = ctrl; | 768 | ae.port[0].ctl_addr = ctrl_addr; |
760 | ata_std_ports(&ae.port[0]); | 769 | ata_std_ports(&ae.port[0]); |
761 | ae.private_data = ld; | 770 | ae.private_data = ld; |
762 | 771 | ||