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authorJeff Garzik <jeff@garzik.org>2006-08-29 18:12:40 -0400
committerJeff Garzik <jeff@garzik.org>2006-08-29 18:12:40 -0400
commit669a5db411d85a14f86cd92bc16bf7ab5b8aa235 (patch)
tree8d4f9d63e18185695a4d97e1a3fa4e18b61c7345 /drivers/ata/pata_hpt3x3.c
parentb01e86fee6c821e4e003fd4e9f65453ac478a58e (diff)
[libata] Add a bunch of PATA drivers.
The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_hpt3x3.c')
-rw-r--r--drivers/ata/pata_hpt3x3.c226
1 files changed, 226 insertions, 0 deletions
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
new file mode 100644
index 000000000000..c93406ebf6ed
--- /dev/null
+++ b/drivers/ata/pata_hpt3x3.c
@@ -0,0 +1,226 @@
1/*
2 * pata_hpt3x3 - HPT3x3 driver
3 * (c) Copyright 2005-2006 Red Hat
4 *
5 * Was pata_hpt34x but the naming was confusing as it supported the
6 * 343 and 363 so it has been renamed.
7 *
8 * Based on:
9 * linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
10 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
11 *
12 * May be copied or modified under the terms of the GNU General Public
13 * License
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/blkdev.h>
21#include <linux/delay.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24
25#define DRV_NAME "pata_hpt3x3"
26#define DRV_VERSION "0.4.1"
27
28static int hpt3x3_probe_init(struct ata_port *ap)
29{
30 ap->cbl = ATA_CBL_PATA40;
31 return ata_std_prereset(ap);
32}
33
34/**
35 * hpt3x3_probe_reset - reset the hpt3x3 bus
36 * @ap: ATA port to reset
37 *
38 * Perform the housekeeping when doing an ATA bus reeset. We just
39 * need to force the cable type.
40 */
41
42static void hpt3x3_error_handler(struct ata_port *ap)
43{
44 return ata_bmdma_drive_eh(ap, hpt3x3_probe_init, ata_std_softreset, NULL, ata_std_postreset);
45}
46
47/**
48 * hpt3x3_set_piomode - PIO setup
49 * @ap: ATA interface
50 * @adev: device on the interface
51 *
52 * Set our PIO requirements. This is fairly simple on the HPT3x3 as
53 * all we have to do is clear the MWDMA and UDMA bits then load the
54 * mode number.
55 */
56
57static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
58{
59 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
60 u32 r1, r2;
61 int dn = 2 * ap->port_no + adev->devno;
62
63 pci_read_config_dword(pdev, 0x44, &r1);
64 pci_read_config_dword(pdev, 0x48, &r2);
65 /* Load the PIO timing number */
66 r1 &= ~(7 << (3 * dn));
67 r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
68 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
69
70 pci_write_config_dword(pdev, 0x44, r1);
71 pci_write_config_dword(pdev, 0x48, r2);
72}
73
74/**
75 * hpt3x3_set_dmamode - DMA timing setup
76 * @ap: ATA interface
77 * @adev: Device being configured
78 *
79 * Set up the channel for MWDMA or UDMA modes. Much the same as with
80 * PIO, load the mode number and then set MWDMA or UDMA flag.
81 */
82
83static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
84{
85 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
86 u32 r1, r2;
87 int dn = 2 * ap->port_no + adev->devno;
88 int mode_num = adev->dma_mode & 0x0F;
89
90 pci_read_config_dword(pdev, 0x44, &r1);
91 pci_read_config_dword(pdev, 0x48, &r2);
92 /* Load the timing number */
93 r1 &= ~(7 << (3 * dn));
94 r1 |= (mode_num << (3 * dn));
95 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
96
97 if (adev->dma_mode >= XFER_UDMA_0)
98 r2 |= 0x01 << dn; /* Ultra mode */
99 else
100 r2 |= 0x10 << dn; /* MWDMA */
101
102 pci_write_config_dword(pdev, 0x44, r1);
103 pci_write_config_dword(pdev, 0x48, r2);
104}
105
106static struct scsi_host_template hpt3x3_sht = {
107 .module = THIS_MODULE,
108 .name = DRV_NAME,
109 .ioctl = ata_scsi_ioctl,
110 .queuecommand = ata_scsi_queuecmd,
111 .can_queue = ATA_DEF_QUEUE,
112 .this_id = ATA_SHT_THIS_ID,
113 .sg_tablesize = LIBATA_MAX_PRD,
114 .max_sectors = ATA_MAX_SECTORS,
115 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
116 .emulated = ATA_SHT_EMULATED,
117 .use_clustering = ATA_SHT_USE_CLUSTERING,
118 .proc_name = DRV_NAME,
119 .dma_boundary = ATA_DMA_BOUNDARY,
120 .slave_configure = ata_scsi_slave_config,
121 .bios_param = ata_std_bios_param,
122};
123
124static struct ata_port_operations hpt3x3_port_ops = {
125 .port_disable = ata_port_disable,
126 .set_piomode = hpt3x3_set_piomode,
127 .set_dmamode = hpt3x3_set_dmamode,
128 .mode_filter = ata_pci_default_filter,
129
130 .tf_load = ata_tf_load,
131 .tf_read = ata_tf_read,
132 .check_status = ata_check_status,
133 .exec_command = ata_exec_command,
134 .dev_select = ata_std_dev_select,
135
136 .freeze = ata_bmdma_freeze,
137 .thaw = ata_bmdma_thaw,
138 .error_handler = hpt3x3_error_handler,
139 .post_internal_cmd = ata_bmdma_post_internal_cmd,
140
141 .bmdma_setup = ata_bmdma_setup,
142 .bmdma_start = ata_bmdma_start,
143 .bmdma_stop = ata_bmdma_stop,
144 .bmdma_status = ata_bmdma_status,
145
146 .qc_prep = ata_qc_prep,
147 .qc_issue = ata_qc_issue_prot,
148 .eng_timeout = ata_eng_timeout,
149 .data_xfer = ata_pio_data_xfer,
150
151 .irq_handler = ata_interrupt,
152 .irq_clear = ata_bmdma_irq_clear,
153
154 .port_start = ata_port_start,
155 .port_stop = ata_port_stop,
156 .host_stop = ata_host_stop
157};
158
159/**
160 * hpt3x3_init_one - Initialise an HPT343/363
161 * @dev: PCI device
162 * @id: Entry in match table
163 *
164 * Perform basic initialisation. The chip has a quirk that it won't
165 * function unless it is at XX00. The old ATA driver touched this up
166 * but we leave it for pci quirks to do properly.
167 */
168
169static int hpt3x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
170{
171 static struct ata_port_info info = {
172 .sht = &hpt3x3_sht,
173 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
174 .pio_mask = 0x1f,
175 .mwdma_mask = 0x07,
176 .udma_mask = 0x07,
177 .port_ops = &hpt3x3_port_ops
178 };
179 static struct ata_port_info *port_info[2] = { &info, &info };
180 u16 cmd;
181
182 /* Initialize the board */
183 pci_write_config_word(dev, 0x80, 0x00);
184 /* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
185 pci_read_config_word(dev, PCI_COMMAND, &cmd);
186 if (cmd & PCI_COMMAND_MEMORY)
187 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
188 else
189 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
190
191 /* Now kick off ATA set up */
192 return ata_pci_init_one(dev, port_info, 2);
193}
194
195static struct pci_device_id hpt3x3[] = {
196 { PCI_DEVICE(PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT343), },
197 { 0, },
198};
199
200static struct pci_driver hpt3x3_pci_driver = {
201 .name = DRV_NAME,
202 .id_table = hpt3x3,
203 .probe = hpt3x3_init_one,
204 .remove = ata_pci_remove_one
205};
206
207static int __init hpt3x3_init(void)
208{
209 return pci_register_driver(&hpt3x3_pci_driver);
210}
211
212
213static void __exit hpt3x3_exit(void)
214{
215 pci_unregister_driver(&hpt3x3_pci_driver);
216}
217
218
219MODULE_AUTHOR("Alan Cox");
220MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
221MODULE_LICENSE("GPL");
222MODULE_DEVICE_TABLE(pci, hpt3x3);
223MODULE_VERSION(DRV_VERSION);
224
225module_init(hpt3x3_init);
226module_exit(hpt3x3_exit);