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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2010-01-18 12:15:47 -0500
committerJeff Garzik <jgarzik@redhat.com>2010-03-01 14:58:45 -0500
commit3403c24529ddfb4a47f5cfe8496370997f1b0758 (patch)
treece9a7a889d03f34a747902b308d2f61a059e4944 /drivers/ata/pata_cypress.c
parent8ebf473860e8166e3d4f152a02e22b9cdddcd440 (diff)
pata_cypress: fix PIO timings underclocking
Timing registers should be programmed with the desired number of clocks minus one clock. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/pata_cypress.c')
-rw-r--r--drivers/ata/pata_cypress.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index 8fb040bf7361..ff6c37de5a12 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -62,14 +62,16 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
62 return; 62 return;
63 } 63 }
64 64
65 time_16 = clamp_val(t.recover, 0, 15) | (clamp_val(t.active, 0, 15) << 4); 65 time_16 = clamp_val(t.recover - 1, 0, 15) |
66 time_8 = clamp_val(t.act8b, 0, 15) | (clamp_val(t.rec8b, 0, 15) << 4); 66 (clamp_val(t.active - 1, 0, 15) << 4);
67 time_8 = clamp_val(t.act8b - 1, 0, 15) |
68 (clamp_val(t.rec8b - 1, 0, 15) << 4);
67 69
68 if (adev->devno == 0) { 70 if (adev->devno == 0) {
69 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 71 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
70 72
71 addr &= ~0x0F; /* Mask bits */ 73 addr &= ~0x0F; /* Mask bits */
72 addr |= clamp_val(t.setup, 0, 15); 74 addr |= clamp_val(t.setup - 1, 0, 15);
73 75
74 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 76 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
75 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); 77 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
@@ -79,7 +81,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
79 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 81 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
80 82
81 addr &= ~0xF0; /* Mask bits */ 83 addr &= ~0xF0; /* Mask bits */
82 addr |= (clamp_val(t.setup, 0, 15) << 4); 84 addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
83 85
84 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 86 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
85 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); 87 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);