diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-08-29 18:12:40 -0400 |
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committer | Jeff Garzik <jeff@garzik.org> | 2006-08-29 18:12:40 -0400 |
commit | 669a5db411d85a14f86cd92bc16bf7ab5b8aa235 (patch) | |
tree | 8d4f9d63e18185695a4d97e1a3fa4e18b61c7345 /drivers/ata/pata_cs5535.c | |
parent | b01e86fee6c821e4e003fd4e9f65453ac478a58e (diff) |
[libata] Add a bunch of PATA drivers.
The vast majority of drivers and changes are from Alan Cox. Albert Lee
contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton,
and Tejun Heo contributed various minor fixes and updates.
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_cs5535.c')
-rw-r--r-- | drivers/ata/pata_cs5535.c | 291 |
1 files changed, 291 insertions, 0 deletions
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c new file mode 100644 index 000000000000..69d6b4258724 --- /dev/null +++ b/drivers/ata/pata_cs5535.c | |||
@@ -0,0 +1,291 @@ | |||
1 | /* | ||
2 | * pata-cs5535.c - CS5535 PATA for new ATA layer | ||
3 | * (C) 2005-2006 Red Hat Inc | ||
4 | * Alan Cox <alan@redhat.com> | ||
5 | * | ||
6 | * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and | ||
7 | * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de | ||
8 | * and Alexander Kiausch <alex.kiausch@t-online.de> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | * | ||
23 | * Loosely based on the piix & svwks drivers. | ||
24 | * | ||
25 | * Documentation: | ||
26 | * Available from AMD web site. | ||
27 | * TODO | ||
28 | * Review errata to see if serializing is neccessary | ||
29 | */ | ||
30 | |||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/module.h> | ||
33 | #include <linux/pci.h> | ||
34 | #include <linux/init.h> | ||
35 | #include <linux/blkdev.h> | ||
36 | #include <linux/delay.h> | ||
37 | #include <scsi/scsi_host.h> | ||
38 | #include <linux/libata.h> | ||
39 | #include <asm/msr.h> | ||
40 | |||
41 | #define DRV_NAME "cs5535" | ||
42 | #define DRV_VERSION "0.2.10" | ||
43 | |||
44 | /* | ||
45 | * The Geode (Aka Athlon GX now) uses an internal MSR based | ||
46 | * bus system for control. Demented but there you go. | ||
47 | */ | ||
48 | |||
49 | #define MSR_ATAC_BASE 0x51300000 | ||
50 | #define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0) | ||
51 | #define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01) | ||
52 | #define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02) | ||
53 | #define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03) | ||
54 | #define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04) | ||
55 | #define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05) | ||
56 | #define ATAC_IO_BAR (MSR_ATAC_BASE+0x08) | ||
57 | #define ATAC_RESET (MSR_ATAC_BASE+0x10) | ||
58 | #define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20) | ||
59 | #define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21) | ||
60 | #define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22) | ||
61 | #define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23) | ||
62 | #define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24) | ||
63 | |||
64 | #define ATAC_BM0_CMD_PRIM 0x00 | ||
65 | #define ATAC_BM0_STS_PRIM 0x02 | ||
66 | #define ATAC_BM0_PRD 0x04 | ||
67 | |||
68 | #define CS5535_CABLE_DETECT 0x48 | ||
69 | |||
70 | #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 ) | ||
71 | |||
72 | /** | ||
73 | * cs5535_pre_reset - detect cable type | ||
74 | * @ap: Port to detect on | ||
75 | * | ||
76 | * Perform cable detection for ATA66 capable cable. Return a libata | ||
77 | * cable type. | ||
78 | */ | ||
79 | |||
80 | static int cs5535_pre_reset(struct ata_port *ap) | ||
81 | { | ||
82 | u8 cable; | ||
83 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | ||
84 | |||
85 | pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable); | ||
86 | if (cable & 1) | ||
87 | ap->cbl = ATA_CBL_PATA80; | ||
88 | else | ||
89 | ap->cbl = ATA_CBL_PATA40; | ||
90 | return ata_std_prereset(ap); | ||
91 | } | ||
92 | |||
93 | /** | ||
94 | * cs5535_error_handler - reset/probe | ||
95 | * @ap: Port to reset | ||
96 | * | ||
97 | * Reset and configure a port | ||
98 | */ | ||
99 | |||
100 | static void cs5535_error_handler(struct ata_port *ap) | ||
101 | { | ||
102 | ata_bmdma_drive_eh(ap, cs5535_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | ||
103 | } | ||
104 | |||
105 | /** | ||
106 | * cs5535_set_piomode - PIO setup | ||
107 | * @ap: ATA interface | ||
108 | * @adev: device on the interface | ||
109 | * | ||
110 | * Set our PIO requirements. The CS5535 is pretty clean about all this | ||
111 | */ | ||
112 | |||
113 | static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev) | ||
114 | { | ||
115 | static const u16 pio_timings[5] = { | ||
116 | 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 | ||
117 | }; | ||
118 | static const u16 pio_cmd_timings[5] = { | ||
119 | 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 | ||
120 | }; | ||
121 | u32 reg, dummy; | ||
122 | struct ata_device *pair = ata_dev_pair(adev); | ||
123 | |||
124 | int mode = adev->pio_mode - XFER_PIO_0; | ||
125 | int cmdmode = mode; | ||
126 | |||
127 | /* Command timing has to be for the lowest of the pair of devices */ | ||
128 | if (pair) { | ||
129 | int pairmode = pair->pio_mode - XFER_PIO_0; | ||
130 | cmdmode = min(mode, pairmode); | ||
131 | /* Write the other drive timing register if it changed */ | ||
132 | if (cmdmode < pairmode) | ||
133 | wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno, | ||
134 | pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0); | ||
135 | } | ||
136 | /* Write the drive timing register */ | ||
137 | wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno, | ||
138 | pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0); | ||
139 | |||
140 | /* Set the PIO "format 1" bit in the DMA timing register */ | ||
141 | rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); | ||
142 | wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0); | ||
143 | } | ||
144 | |||
145 | /** | ||
146 | * cs5535_set_dmamode - DMA timing setup | ||
147 | * @ap: ATA interface | ||
148 | * @adev: Device being configured | ||
149 | * | ||
150 | */ | ||
151 | |||
152 | static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev) | ||
153 | { | ||
154 | static const u32 udma_timings[5] = { | ||
155 | 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 | ||
156 | }; | ||
157 | static const u32 mwdma_timings[3] = { | ||
158 | 0x7F0FFFF3, 0x7F035352, 0x7F024241 | ||
159 | }; | ||
160 | u32 reg, dummy; | ||
161 | int mode = adev->dma_mode; | ||
162 | |||
163 | rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); | ||
164 | reg &= 0x80000000UL; | ||
165 | if (mode >= XFER_UDMA_0) | ||
166 | reg |= udma_timings[mode - XFER_UDMA_0]; | ||
167 | else | ||
168 | reg |= mwdma_timings[mode - XFER_MW_DMA_0]; | ||
169 | wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0); | ||
170 | } | ||
171 | |||
172 | static struct scsi_host_template cs5535_sht = { | ||
173 | .module = THIS_MODULE, | ||
174 | .name = DRV_NAME, | ||
175 | .ioctl = ata_scsi_ioctl, | ||
176 | .queuecommand = ata_scsi_queuecmd, | ||
177 | .can_queue = ATA_DEF_QUEUE, | ||
178 | .this_id = ATA_SHT_THIS_ID, | ||
179 | .sg_tablesize = LIBATA_MAX_PRD, | ||
180 | .max_sectors = ATA_MAX_SECTORS, | ||
181 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | ||
182 | .emulated = ATA_SHT_EMULATED, | ||
183 | .use_clustering = ATA_SHT_USE_CLUSTERING, | ||
184 | .proc_name = DRV_NAME, | ||
185 | .dma_boundary = ATA_DMA_BOUNDARY, | ||
186 | .slave_configure = ata_scsi_slave_config, | ||
187 | .bios_param = ata_std_bios_param, | ||
188 | }; | ||
189 | |||
190 | static struct ata_port_operations cs5535_port_ops = { | ||
191 | .port_disable = ata_port_disable, | ||
192 | .set_piomode = cs5535_set_piomode, | ||
193 | .set_dmamode = cs5535_set_dmamode, | ||
194 | .mode_filter = ata_pci_default_filter, | ||
195 | |||
196 | .tf_load = ata_tf_load, | ||
197 | .tf_read = ata_tf_read, | ||
198 | .check_status = ata_check_status, | ||
199 | .exec_command = ata_exec_command, | ||
200 | .dev_select = ata_std_dev_select, | ||
201 | |||
202 | .freeze = ata_bmdma_freeze, | ||
203 | .thaw = ata_bmdma_thaw, | ||
204 | .error_handler = cs5535_error_handler, | ||
205 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | ||
206 | |||
207 | .bmdma_setup = ata_bmdma_setup, | ||
208 | .bmdma_start = ata_bmdma_start, | ||
209 | .bmdma_stop = ata_bmdma_stop, | ||
210 | .bmdma_status = ata_bmdma_status, | ||
211 | |||
212 | .qc_prep = ata_qc_prep, | ||
213 | .qc_issue = ata_qc_issue_prot, | ||
214 | .eng_timeout = ata_eng_timeout, | ||
215 | .data_xfer = ata_pio_data_xfer, | ||
216 | |||
217 | .irq_handler = ata_interrupt, | ||
218 | .irq_clear = ata_bmdma_irq_clear, | ||
219 | |||
220 | .port_start = ata_port_start, | ||
221 | .port_stop = ata_port_stop, | ||
222 | .host_stop = ata_host_stop | ||
223 | }; | ||
224 | |||
225 | /** | ||
226 | * cs5535_init_one - Initialise a CS5530 | ||
227 | * @dev: PCI device | ||
228 | * @id: Entry in match table | ||
229 | * | ||
230 | * Install a driver for the newly found CS5530 companion chip. Most of | ||
231 | * this is just housekeeping. We have to set the chip up correctly and | ||
232 | * turn off various bits of emulation magic. | ||
233 | */ | ||
234 | |||
235 | static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id) | ||
236 | { | ||
237 | static struct ata_port_info info = { | ||
238 | .sht = &cs5535_sht, | ||
239 | .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST, | ||
240 | .pio_mask = 0x1f, | ||
241 | .mwdma_mask = 0x07, | ||
242 | .udma_mask = 0x1f, | ||
243 | .port_ops = &cs5535_port_ops | ||
244 | }; | ||
245 | struct ata_port_info *ports[1] = { &info }; | ||
246 | |||
247 | u32 timings, dummy; | ||
248 | |||
249 | /* Check the BIOS set the initial timing clock. If not set the | ||
250 | timings for PIO0 */ | ||
251 | rdmsr(ATAC_CH0D0_PIO, timings, dummy); | ||
252 | if (CS5535_BAD_PIO(timings)) | ||
253 | wrmsr(ATAC_CH0D0_PIO, 0xF7F4F7F4UL, 0); | ||
254 | rdmsr(ATAC_CH0D1_PIO, timings, dummy); | ||
255 | if (CS5535_BAD_PIO(timings)) | ||
256 | wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0); | ||
257 | return ata_pci_init_one(dev, ports, 1); | ||
258 | } | ||
259 | |||
260 | static struct pci_device_id cs5535[] = { | ||
261 | { PCI_DEVICE(PCI_VENDOR_ID_NS, 0x002D), }, | ||
262 | { 0, }, | ||
263 | }; | ||
264 | |||
265 | static struct pci_driver cs5535_pci_driver = { | ||
266 | .name = DRV_NAME, | ||
267 | .id_table = cs5535, | ||
268 | .probe = cs5535_init_one, | ||
269 | .remove = ata_pci_remove_one | ||
270 | }; | ||
271 | |||
272 | static int __init cs5535_init(void) | ||
273 | { | ||
274 | return pci_register_driver(&cs5535_pci_driver); | ||
275 | } | ||
276 | |||
277 | |||
278 | static void __exit cs5535_exit(void) | ||
279 | { | ||
280 | pci_unregister_driver(&cs5535_pci_driver); | ||
281 | } | ||
282 | |||
283 | |||
284 | MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch"); | ||
285 | MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530"); | ||
286 | MODULE_LICENSE("GPL"); | ||
287 | MODULE_DEVICE_TABLE(pci, cs5535); | ||
288 | MODULE_VERSION(DRV_VERSION); | ||
289 | |||
290 | module_init(cs5535_init); | ||
291 | module_exit(cs5535_exit); | ||