diff options
author | Tejun Heo <htejun@gmail.com> | 2007-02-01 01:06:36 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-02-09 17:39:38 -0500 |
commit | 0d5ff566779f894ca9937231a181eb31e4adff0e (patch) | |
tree | d1c7495c932581c1d41aa7f0fdb303348da49106 /drivers/ata/pata_cs5530.c | |
parent | 1a68ff13c8a9b517de3fd4187dc525412a6eba1b (diff) |
libata: convert to iomap
Convert libata core layer and LLDs to use iomap.
* managed iomap is used. Pointer to pcim_iomap_table() is cached at
host->iomap and used through out LLDs. This basically replaces
host->mmio_base.
* if possible, pcim_iomap_regions() is used
Most iomap operation conversions are taken from Jeff Garzik
<jgarzik@pobox.com>'s iomap branch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_cs5530.c')
-rw-r--r-- | drivers/ata/pata_cs5530.c | 29 |
1 files changed, 18 insertions, 11 deletions
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c index 29d459be19be..b9fd5388b476 100644 --- a/drivers/ata/pata_cs5530.c +++ b/drivers/ata/pata_cs5530.c | |||
@@ -37,6 +37,13 @@ | |||
37 | #define DRV_NAME "pata_cs5530" | 37 | #define DRV_NAME "pata_cs5530" |
38 | #define DRV_VERSION "0.7.1" | 38 | #define DRV_VERSION "0.7.1" |
39 | 39 | ||
40 | static void __iomem *cs5530_port_base(struct ata_port *ap) | ||
41 | { | ||
42 | unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr; | ||
43 | |||
44 | return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no); | ||
45 | } | ||
46 | |||
40 | /** | 47 | /** |
41 | * cs5530_set_piomode - PIO setup | 48 | * cs5530_set_piomode - PIO setup |
42 | * @ap: ATA interface | 49 | * @ap: ATA interface |
@@ -52,19 +59,19 @@ static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
52 | {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, | 59 | {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, |
53 | {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010} | 60 | {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010} |
54 | }; | 61 | }; |
55 | unsigned long base = ( ap->ioaddr.bmdma_addr & ~0x0F) + 0x20 + 0x10 * ap->port_no; | 62 | void __iomem *base = cs5530_port_base(ap); |
56 | u32 tuning; | 63 | u32 tuning; |
57 | int format; | 64 | int format; |
58 | 65 | ||
59 | /* Find out which table to use */ | 66 | /* Find out which table to use */ |
60 | tuning = inl(base + 0x04); | 67 | tuning = ioread32(base + 0x04); |
61 | format = (tuning & 0x80000000UL) ? 1 : 0; | 68 | format = (tuning & 0x80000000UL) ? 1 : 0; |
62 | 69 | ||
63 | /* Now load the right timing register */ | 70 | /* Now load the right timing register */ |
64 | if (adev->devno) | 71 | if (adev->devno) |
65 | base += 0x08; | 72 | base += 0x08; |
66 | 73 | ||
67 | outl(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); | 74 | iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); |
68 | } | 75 | } |
69 | 76 | ||
70 | /** | 77 | /** |
@@ -79,12 +86,12 @@ static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
79 | 86 | ||
80 | static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) | 87 | static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
81 | { | 88 | { |
82 | unsigned long base = ( ap->ioaddr.bmdma_addr & ~0x0F) + 0x20 + 0x10 * ap->port_no; | 89 | void __iomem *base = cs5530_port_base(ap); |
83 | u32 tuning, timing = 0; | 90 | u32 tuning, timing = 0; |
84 | u8 reg; | 91 | u8 reg; |
85 | 92 | ||
86 | /* Find out which table to use */ | 93 | /* Find out which table to use */ |
87 | tuning = inl(base + 0x04); | 94 | tuning = ioread32(base + 0x04); |
88 | 95 | ||
89 | switch(adev->dma_mode) { | 96 | switch(adev->dma_mode) { |
90 | case XFER_UDMA_0: | 97 | case XFER_UDMA_0: |
@@ -105,20 +112,20 @@ static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |||
105 | /* Merge in the PIO format bit */ | 112 | /* Merge in the PIO format bit */ |
106 | timing |= (tuning & 0x80000000UL); | 113 | timing |= (tuning & 0x80000000UL); |
107 | if (adev->devno == 0) /* Master */ | 114 | if (adev->devno == 0) /* Master */ |
108 | outl(timing, base + 0x04); | 115 | iowrite32(timing, base + 0x04); |
109 | else { | 116 | else { |
110 | if (timing & 0x00100000) | 117 | if (timing & 0x00100000) |
111 | tuning |= 0x00100000; /* UDMA for both */ | 118 | tuning |= 0x00100000; /* UDMA for both */ |
112 | else | 119 | else |
113 | tuning &= ~0x00100000; /* MWDMA for both */ | 120 | tuning &= ~0x00100000; /* MWDMA for both */ |
114 | outl(tuning, base + 0x04); | 121 | iowrite32(tuning, base + 0x04); |
115 | outl(timing, base + 0x0C); | 122 | iowrite32(timing, base + 0x0C); |
116 | } | 123 | } |
117 | 124 | ||
118 | /* Set the DMA capable bit in the BMDMA area */ | 125 | /* Set the DMA capable bit in the BMDMA area */ |
119 | reg = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | 126 | reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
120 | reg |= (1 << (5 + adev->devno)); | 127 | reg |= (1 << (5 + adev->devno)); |
121 | outb(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | 128 | iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
122 | 129 | ||
123 | /* Remember the last DMA setup we did */ | 130 | /* Remember the last DMA setup we did */ |
124 | 131 | ||
@@ -210,7 +217,7 @@ static struct ata_port_operations cs5530_port_ops = { | |||
210 | .qc_prep = ata_qc_prep, | 217 | .qc_prep = ata_qc_prep, |
211 | .qc_issue = cs5530_qc_issue_prot, | 218 | .qc_issue = cs5530_qc_issue_prot, |
212 | 219 | ||
213 | .data_xfer = ata_pio_data_xfer, | 220 | .data_xfer = ata_data_xfer, |
214 | 221 | ||
215 | .irq_handler = ata_interrupt, | 222 | .irq_handler = ata_interrupt, |
216 | .irq_clear = ata_bmdma_irq_clear, | 223 | .irq_clear = ata_bmdma_irq_clear, |