diff options
author | Tejun Heo <htejun@gmail.com> | 2008-05-19 13:17:51 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-07-14 15:59:32 -0400 |
commit | 341c2c958ec7bdd9f54733a8b0b432fe76842a82 (patch) | |
tree | 1af1983fe82ad032de6142229fe6c70f04466918 /drivers/ata/libata-core.c | |
parent | bce7f793daec3e65ec5c5705d2457b81fe7b5725 (diff) |
libata: consistently use msecs for time durations
libata has been using mix of jiffies and msecs for time druations.
This is getting confusing. As writing sub HZ values in jiffies is
PITA and msecs_to_jiffies() can't be used as initializer, unify unit
for all time durations to msecs. So, durations are in msecs and
deadlines are in jiffies. ata_deadline() is added to compute deadline
from a start time and duration in msecs.
While at it, drop now superflous _msec suffix from arguments and
rename @timeout to @deadline if it represents a fixed point in time
rather than duration.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/libata-core.c')
-rw-r--r-- | drivers/ata/libata-core.c | 44 |
1 files changed, 21 insertions, 23 deletions
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 303fc0d2b978..c5c3b1b516e1 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -54,7 +54,6 @@ | |||
54 | #include <linux/completion.h> | 54 | #include <linux/completion.h> |
55 | #include <linux/suspend.h> | 55 | #include <linux/suspend.h> |
56 | #include <linux/workqueue.h> | 56 | #include <linux/workqueue.h> |
57 | #include <linux/jiffies.h> | ||
58 | #include <linux/scatterlist.h> | 57 | #include <linux/scatterlist.h> |
59 | #include <linux/io.h> | 58 | #include <linux/io.h> |
60 | #include <scsi/scsi.h> | 59 | #include <scsi/scsi.h> |
@@ -145,7 +144,7 @@ static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CF | |||
145 | module_param_named(dma, libata_dma_mask, int, 0444); | 144 | module_param_named(dma, libata_dma_mask, int, 0444); |
146 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); | 145 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); |
147 | 146 | ||
148 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; | 147 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / 1000; |
149 | module_param(ata_probe_timeout, int, 0444); | 148 | module_param(ata_probe_timeout, int, 0444); |
150 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | 149 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); |
151 | 150 | ||
@@ -1533,7 +1532,7 @@ unsigned long ata_id_xfermask(const u16 *id) | |||
1533 | * @ap: The ata_port to queue port_task for | 1532 | * @ap: The ata_port to queue port_task for |
1534 | * @fn: workqueue function to be scheduled | 1533 | * @fn: workqueue function to be scheduled |
1535 | * @data: data for @fn to use | 1534 | * @data: data for @fn to use |
1536 | * @delay: delay time for workqueue function | 1535 | * @delay: delay time in msecs for workqueue function |
1537 | * | 1536 | * |
1538 | * Schedule @fn(@data) for execution after @delay jiffies using | 1537 | * Schedule @fn(@data) for execution after @delay jiffies using |
1539 | * port_task. There is one port_task per port and it's the | 1538 | * port_task. There is one port_task per port and it's the |
@@ -1552,7 +1551,7 @@ void ata_pio_queue_task(struct ata_port *ap, void *data, unsigned long delay) | |||
1552 | ap->port_task_data = data; | 1551 | ap->port_task_data = data; |
1553 | 1552 | ||
1554 | /* may fail if ata_port_flush_task() in progress */ | 1553 | /* may fail if ata_port_flush_task() in progress */ |
1555 | queue_delayed_work(ata_wq, &ap->port_task, delay); | 1554 | queue_delayed_work(ata_wq, &ap->port_task, msecs_to_jiffies(delay)); |
1556 | } | 1555 | } |
1557 | 1556 | ||
1558 | /** | 1557 | /** |
@@ -1685,7 +1684,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, | |||
1685 | spin_unlock_irqrestore(ap->lock, flags); | 1684 | spin_unlock_irqrestore(ap->lock, flags); |
1686 | 1685 | ||
1687 | if (!timeout) | 1686 | if (!timeout) |
1688 | timeout = ata_probe_timeout * 1000 / HZ; | 1687 | timeout = ata_probe_timeout * 1000; |
1689 | 1688 | ||
1690 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); | 1689 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); |
1691 | 1690 | ||
@@ -3319,7 +3318,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
3319 | int (*check_ready)(struct ata_link *link)) | 3318 | int (*check_ready)(struct ata_link *link)) |
3320 | { | 3319 | { |
3321 | unsigned long start = jiffies; | 3320 | unsigned long start = jiffies; |
3322 | unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT; | 3321 | unsigned long nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT); |
3323 | int warned = 0; | 3322 | int warned = 0; |
3324 | 3323 | ||
3325 | if (time_after(nodev_deadline, deadline)) | 3324 | if (time_after(nodev_deadline, deadline)) |
@@ -3387,7 +3386,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
3387 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, | 3386 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, |
3388 | int (*check_ready)(struct ata_link *link)) | 3387 | int (*check_ready)(struct ata_link *link)) |
3389 | { | 3388 | { |
3390 | msleep(ATA_WAIT_AFTER_RESET_MSECS); | 3389 | msleep(ATA_WAIT_AFTER_RESET); |
3391 | 3390 | ||
3392 | return ata_wait_ready(link, deadline, check_ready); | 3391 | return ata_wait_ready(link, deadline, check_ready); |
3393 | } | 3392 | } |
@@ -3417,13 +3416,13 @@ int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, | |||
3417 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, | 3416 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, |
3418 | unsigned long deadline) | 3417 | unsigned long deadline) |
3419 | { | 3418 | { |
3420 | unsigned long interval_msec = params[0]; | 3419 | unsigned long interval = params[0]; |
3421 | unsigned long duration = msecs_to_jiffies(params[1]); | 3420 | unsigned long duration = params[1]; |
3422 | unsigned long last_jiffies, t; | 3421 | unsigned long last_jiffies, t; |
3423 | u32 last, cur; | 3422 | u32 last, cur; |
3424 | int rc; | 3423 | int rc; |
3425 | 3424 | ||
3426 | t = jiffies + msecs_to_jiffies(params[2]); | 3425 | t = ata_deadline(jiffies, params[2]); |
3427 | if (time_before(t, deadline)) | 3426 | if (time_before(t, deadline)) |
3428 | deadline = t; | 3427 | deadline = t; |
3429 | 3428 | ||
@@ -3435,7 +3434,7 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, | |||
3435 | last_jiffies = jiffies; | 3434 | last_jiffies = jiffies; |
3436 | 3435 | ||
3437 | while (1) { | 3436 | while (1) { |
3438 | msleep(interval_msec); | 3437 | msleep(interval); |
3439 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) | 3438 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
3440 | return rc; | 3439 | return rc; |
3441 | cur &= 0xf; | 3440 | cur &= 0xf; |
@@ -3444,7 +3443,8 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, | |||
3444 | if (cur == last) { | 3443 | if (cur == last) { |
3445 | if (cur == 1 && time_before(jiffies, deadline)) | 3444 | if (cur == 1 && time_before(jiffies, deadline)) |
3446 | continue; | 3445 | continue; |
3447 | if (time_after(jiffies, last_jiffies + duration)) | 3446 | if (time_after(jiffies, |
3447 | ata_deadline(last_jiffies, duration))) | ||
3448 | return 0; | 3448 | return 0; |
3449 | continue; | 3449 | continue; |
3450 | } | 3450 | } |
@@ -3636,7 +3636,8 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, | |||
3636 | if (check_ready) { | 3636 | if (check_ready) { |
3637 | unsigned long pmp_deadline; | 3637 | unsigned long pmp_deadline; |
3638 | 3638 | ||
3639 | pmp_deadline = jiffies + ATA_TMOUT_PMP_SRST_WAIT; | 3639 | pmp_deadline = ata_deadline(jiffies, |
3640 | ATA_TMOUT_PMP_SRST_WAIT); | ||
3640 | if (time_after(pmp_deadline, deadline)) | 3641 | if (time_after(pmp_deadline, deadline)) |
3641 | pmp_deadline = deadline; | 3642 | pmp_deadline = deadline; |
3642 | ata_wait_ready(link, pmp_deadline, check_ready); | 3643 | ata_wait_ready(link, pmp_deadline, check_ready); |
@@ -6073,8 +6074,6 @@ static void __init ata_parse_force_param(void) | |||
6073 | 6074 | ||
6074 | static int __init ata_init(void) | 6075 | static int __init ata_init(void) |
6075 | { | 6076 | { |
6076 | ata_probe_timeout *= HZ; | ||
6077 | |||
6078 | ata_parse_force_param(); | 6077 | ata_parse_force_param(); |
6079 | 6078 | ||
6080 | ata_wq = create_workqueue("ata"); | 6079 | ata_wq = create_workqueue("ata"); |
@@ -6127,8 +6126,8 @@ int ata_ratelimit(void) | |||
6127 | * @reg: IO-mapped register | 6126 | * @reg: IO-mapped register |
6128 | * @mask: Mask to apply to read register value | 6127 | * @mask: Mask to apply to read register value |
6129 | * @val: Wait condition | 6128 | * @val: Wait condition |
6130 | * @interval_msec: polling interval in milliseconds | 6129 | * @interval: polling interval in milliseconds |
6131 | * @timeout_msec: timeout in milliseconds | 6130 | * @timeout: timeout in milliseconds |
6132 | * | 6131 | * |
6133 | * Waiting for some bits of register to change is a common | 6132 | * Waiting for some bits of register to change is a common |
6134 | * operation for ATA controllers. This function reads 32bit LE | 6133 | * operation for ATA controllers. This function reads 32bit LE |
@@ -6146,10 +6145,9 @@ int ata_ratelimit(void) | |||
6146 | * The final register value. | 6145 | * The final register value. |
6147 | */ | 6146 | */ |
6148 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | 6147 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, |
6149 | unsigned long interval_msec, | 6148 | unsigned long interval, unsigned long timeout) |
6150 | unsigned long timeout_msec) | ||
6151 | { | 6149 | { |
6152 | unsigned long timeout; | 6150 | unsigned long deadline; |
6153 | u32 tmp; | 6151 | u32 tmp; |
6154 | 6152 | ||
6155 | tmp = ioread32(reg); | 6153 | tmp = ioread32(reg); |
@@ -6158,10 +6156,10 @@ u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |||
6158 | * preceding writes reach the controller before starting to | 6156 | * preceding writes reach the controller before starting to |
6159 | * eat away the timeout. | 6157 | * eat away the timeout. |
6160 | */ | 6158 | */ |
6161 | timeout = jiffies + (timeout_msec * HZ) / 1000; | 6159 | deadline = ata_deadline(jiffies, timeout); |
6162 | 6160 | ||
6163 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | 6161 | while ((tmp & mask) == val && time_before(jiffies, deadline)) { |
6164 | msleep(interval_msec); | 6162 | msleep(interval); |
6165 | tmp = ioread32(reg); | 6163 | tmp = ioread32(reg); |
6166 | } | 6164 | } |
6167 | 6165 | ||