diff options
author | Tejun Heo <htejun@gmail.com> | 2008-01-18 04:36:29 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2008-01-23 05:24:16 -0500 |
commit | 8b09f0da0f873698a7e8b329dfb7b10fd42d5cdf (patch) | |
tree | ec3bbe5ede4450021fcc18dcd40e6451363fdce2 /drivers/ata/ata_piix.c | |
parent | 4e6b79fa61091a0ed9b0af0f573cc257772cd88d (diff) |
ata_piix: convert to prepare - activate initialization
ata_piix requires more configuration during initialization than most
other SFF compliant controllers and one-go initialzation with
ata_pci_one() is too rigid.
This patch converts ata_piix to use two step prepare - activate
initialization used by other more advanced controllers. This
conversion brings the happy side effect of enabling PCI device before
accessing PCI configuration registers. Other than that, there
shouldn't be any behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r-- | drivers/ata/ata_piix.c | 79 |
1 files changed, 37 insertions, 42 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 3183b3f38e49..024e6d52eab2 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -316,7 +316,6 @@ static const struct ata_port_operations piix_pata_ops = { | |||
316 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 316 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
317 | .cable_detect = ata_cable_40wire, | 317 | .cable_detect = ata_cable_40wire, |
318 | 318 | ||
319 | .irq_handler = ata_interrupt, | ||
320 | .irq_clear = ata_bmdma_irq_clear, | 319 | .irq_clear = ata_bmdma_irq_clear, |
321 | .irq_on = ata_irq_on, | 320 | .irq_on = ata_irq_on, |
322 | 321 | ||
@@ -348,7 +347,6 @@ static const struct ata_port_operations ich_pata_ops = { | |||
348 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 347 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
349 | .cable_detect = ich_pata_cable_detect, | 348 | .cable_detect = ich_pata_cable_detect, |
350 | 349 | ||
351 | .irq_handler = ata_interrupt, | ||
352 | .irq_clear = ata_bmdma_irq_clear, | 350 | .irq_clear = ata_bmdma_irq_clear, |
353 | .irq_on = ata_irq_on, | 351 | .irq_on = ata_irq_on, |
354 | 352 | ||
@@ -375,7 +373,6 @@ static const struct ata_port_operations piix_sata_ops = { | |||
375 | .error_handler = ata_bmdma_error_handler, | 373 | .error_handler = ata_bmdma_error_handler, |
376 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | 374 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
377 | 375 | ||
378 | .irq_handler = ata_interrupt, | ||
379 | .irq_clear = ata_bmdma_irq_clear, | 376 | .irq_clear = ata_bmdma_irq_clear, |
380 | .irq_on = ata_irq_on, | 377 | .irq_on = ata_irq_on, |
381 | 378 | ||
@@ -521,7 +518,6 @@ static const struct piix_map_db *piix_map_db_table[] = { | |||
521 | static struct ata_port_info piix_port_info[] = { | 518 | static struct ata_port_info piix_port_info[] = { |
522 | [piix_pata_mwdma] = /* PIIX3 MWDMA only */ | 519 | [piix_pata_mwdma] = /* PIIX3 MWDMA only */ |
523 | { | 520 | { |
524 | .sht = &piix_sht, | ||
525 | .flags = PIIX_PATA_FLAGS, | 521 | .flags = PIIX_PATA_FLAGS, |
526 | .pio_mask = 0x1f, /* pio0-4 */ | 522 | .pio_mask = 0x1f, /* pio0-4 */ |
527 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ | 523 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ |
@@ -530,7 +526,6 @@ static struct ata_port_info piix_port_info[] = { | |||
530 | 526 | ||
531 | [piix_pata_33] = /* PIIX4 at 33MHz */ | 527 | [piix_pata_33] = /* PIIX4 at 33MHz */ |
532 | { | 528 | { |
533 | .sht = &piix_sht, | ||
534 | .flags = PIIX_PATA_FLAGS, | 529 | .flags = PIIX_PATA_FLAGS, |
535 | .pio_mask = 0x1f, /* pio0-4 */ | 530 | .pio_mask = 0x1f, /* pio0-4 */ |
536 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ | 531 | .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ |
@@ -540,7 +535,6 @@ static struct ata_port_info piix_port_info[] = { | |||
540 | 535 | ||
541 | [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/ | 536 | [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/ |
542 | { | 537 | { |
543 | .sht = &piix_sht, | ||
544 | .flags = PIIX_PATA_FLAGS, | 538 | .flags = PIIX_PATA_FLAGS, |
545 | .pio_mask = 0x1f, /* pio 0-4 */ | 539 | .pio_mask = 0x1f, /* pio 0-4 */ |
546 | .mwdma_mask = 0x06, /* Check: maybe 0x07 */ | 540 | .mwdma_mask = 0x06, /* Check: maybe 0x07 */ |
@@ -550,7 +544,6 @@ static struct ata_port_info piix_port_info[] = { | |||
550 | 544 | ||
551 | [ich_pata_66] = /* ICH controllers up to 66MHz */ | 545 | [ich_pata_66] = /* ICH controllers up to 66MHz */ |
552 | { | 546 | { |
553 | .sht = &piix_sht, | ||
554 | .flags = PIIX_PATA_FLAGS, | 547 | .flags = PIIX_PATA_FLAGS, |
555 | .pio_mask = 0x1f, /* pio 0-4 */ | 548 | .pio_mask = 0x1f, /* pio 0-4 */ |
556 | .mwdma_mask = 0x06, /* MWDMA0 is broken on chip */ | 549 | .mwdma_mask = 0x06, /* MWDMA0 is broken on chip */ |
@@ -560,7 +553,6 @@ static struct ata_port_info piix_port_info[] = { | |||
560 | 553 | ||
561 | [ich_pata_100] = | 554 | [ich_pata_100] = |
562 | { | 555 | { |
563 | .sht = &piix_sht, | ||
564 | .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR, | 556 | .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR, |
565 | .pio_mask = 0x1f, /* pio0-4 */ | 557 | .pio_mask = 0x1f, /* pio0-4 */ |
566 | .mwdma_mask = 0x06, /* mwdma1-2 */ | 558 | .mwdma_mask = 0x06, /* mwdma1-2 */ |
@@ -570,7 +562,6 @@ static struct ata_port_info piix_port_info[] = { | |||
570 | 562 | ||
571 | [ich5_sata] = | 563 | [ich5_sata] = |
572 | { | 564 | { |
573 | .sht = &piix_sht, | ||
574 | .flags = PIIX_SATA_FLAGS, | 565 | .flags = PIIX_SATA_FLAGS, |
575 | .pio_mask = 0x1f, /* pio0-4 */ | 566 | .pio_mask = 0x1f, /* pio0-4 */ |
576 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 567 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -580,7 +571,6 @@ static struct ata_port_info piix_port_info[] = { | |||
580 | 571 | ||
581 | [ich6_sata] = | 572 | [ich6_sata] = |
582 | { | 573 | { |
583 | .sht = &piix_sht, | ||
584 | .flags = PIIX_SATA_FLAGS, | 574 | .flags = PIIX_SATA_FLAGS, |
585 | .pio_mask = 0x1f, /* pio0-4 */ | 575 | .pio_mask = 0x1f, /* pio0-4 */ |
586 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 576 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -590,7 +580,6 @@ static struct ata_port_info piix_port_info[] = { | |||
590 | 580 | ||
591 | [ich6_sata_ahci] = | 581 | [ich6_sata_ahci] = |
592 | { | 582 | { |
593 | .sht = &piix_sht, | ||
594 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 583 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
595 | .pio_mask = 0x1f, /* pio0-4 */ | 584 | .pio_mask = 0x1f, /* pio0-4 */ |
596 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 585 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -600,7 +589,6 @@ static struct ata_port_info piix_port_info[] = { | |||
600 | 589 | ||
601 | [ich6m_sata_ahci] = | 590 | [ich6m_sata_ahci] = |
602 | { | 591 | { |
603 | .sht = &piix_sht, | ||
604 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 592 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
605 | .pio_mask = 0x1f, /* pio0-4 */ | 593 | .pio_mask = 0x1f, /* pio0-4 */ |
606 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 594 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -610,7 +598,6 @@ static struct ata_port_info piix_port_info[] = { | |||
610 | 598 | ||
611 | [ich8_sata_ahci] = | 599 | [ich8_sata_ahci] = |
612 | { | 600 | { |
613 | .sht = &piix_sht, | ||
614 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 601 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
615 | .pio_mask = 0x1f, /* pio0-4 */ | 602 | .pio_mask = 0x1f, /* pio0-4 */ |
616 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 603 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -620,7 +607,6 @@ static struct ata_port_info piix_port_info[] = { | |||
620 | 607 | ||
621 | [ich8_2port_sata] = | 608 | [ich8_2port_sata] = |
622 | { | 609 | { |
623 | .sht = &piix_sht, | ||
624 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 610 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
625 | .pio_mask = 0x1f, /* pio0-4 */ | 611 | .pio_mask = 0x1f, /* pio0-4 */ |
626 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 612 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -630,7 +616,6 @@ static struct ata_port_info piix_port_info[] = { | |||
630 | 616 | ||
631 | [tolapai_sata_ahci] = | 617 | [tolapai_sata_ahci] = |
632 | { | 618 | { |
633 | .sht = &piix_sht, | ||
634 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 619 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
635 | .pio_mask = 0x1f, /* pio0-4 */ | 620 | .pio_mask = 0x1f, /* pio0-4 */ |
636 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 621 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -640,7 +625,6 @@ static struct ata_port_info piix_port_info[] = { | |||
640 | 625 | ||
641 | [ich8m_apple_sata_ahci] = | 626 | [ich8m_apple_sata_ahci] = |
642 | { | 627 | { |
643 | .sht = &piix_sht, | ||
644 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, | 628 | .flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI, |
645 | .pio_mask = 0x1f, /* pio0-4 */ | 629 | .pio_mask = 0x1f, /* pio0-4 */ |
646 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 630 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
@@ -1256,10 +1240,10 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) | |||
1256 | return no_piix_dma; | 1240 | return no_piix_dma; |
1257 | } | 1241 | } |
1258 | 1242 | ||
1259 | static void __devinit piix_init_pcs(struct pci_dev *pdev, | 1243 | static void __devinit piix_init_pcs(struct ata_host *host, |
1260 | struct ata_port_info *pinfo, | ||
1261 | const struct piix_map_db *map_db) | 1244 | const struct piix_map_db *map_db) |
1262 | { | 1245 | { |
1246 | struct pci_dev *pdev = to_pci_dev(host->dev); | ||
1263 | u16 pcs, new_pcs; | 1247 | u16 pcs, new_pcs; |
1264 | 1248 | ||
1265 | pci_read_config_word(pdev, ICH5_PCS, &pcs); | 1249 | pci_read_config_word(pdev, ICH5_PCS, &pcs); |
@@ -1273,11 +1257,10 @@ static void __devinit piix_init_pcs(struct pci_dev *pdev, | |||
1273 | } | 1257 | } |
1274 | } | 1258 | } |
1275 | 1259 | ||
1276 | static void __devinit piix_init_sata_map(struct pci_dev *pdev, | 1260 | static const int *__devinit piix_init_sata_map(struct pci_dev *pdev, |
1277 | struct ata_port_info *pinfo, | 1261 | struct ata_port_info *pinfo, |
1278 | const struct piix_map_db *map_db) | 1262 | const struct piix_map_db *map_db) |
1279 | { | 1263 | { |
1280 | struct piix_host_priv *hpriv = pinfo[0].private_data; | ||
1281 | const int *map; | 1264 | const int *map; |
1282 | int i, invalid_map = 0; | 1265 | int i, invalid_map = 0; |
1283 | u8 map_value; | 1266 | u8 map_value; |
@@ -1301,7 +1284,6 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev, | |||
1301 | case IDE: | 1284 | case IDE: |
1302 | WARN_ON((i & 1) || map[i + 1] != IDE); | 1285 | WARN_ON((i & 1) || map[i + 1] != IDE); |
1303 | pinfo[i / 2] = piix_port_info[ich_pata_100]; | 1286 | pinfo[i / 2] = piix_port_info[ich_pata_100]; |
1304 | pinfo[i / 2].private_data = hpriv; | ||
1305 | i++; | 1287 | i++; |
1306 | printk(" IDE IDE"); | 1288 | printk(" IDE IDE"); |
1307 | break; | 1289 | break; |
@@ -1319,7 +1301,7 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev, | |||
1319 | dev_printk(KERN_ERR, &pdev->dev, | 1301 | dev_printk(KERN_ERR, &pdev->dev, |
1320 | "invalid MAP value %u\n", map_value); | 1302 | "invalid MAP value %u\n", map_value); |
1321 | 1303 | ||
1322 | hpriv->map = map; | 1304 | return map; |
1323 | } | 1305 | } |
1324 | 1306 | ||
1325 | static void piix_iocfg_bit18_quirk(struct pci_dev *pdev) | 1307 | static void piix_iocfg_bit18_quirk(struct pci_dev *pdev) |
@@ -1378,8 +1360,10 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1378 | struct device *dev = &pdev->dev; | 1360 | struct device *dev = &pdev->dev; |
1379 | struct ata_port_info port_info[2]; | 1361 | struct ata_port_info port_info[2]; |
1380 | const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] }; | 1362 | const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] }; |
1381 | struct piix_host_priv *hpriv; | ||
1382 | unsigned long port_flags; | 1363 | unsigned long port_flags; |
1364 | struct ata_host *host; | ||
1365 | struct piix_host_priv *hpriv; | ||
1366 | int rc; | ||
1383 | 1367 | ||
1384 | if (!printed_version++) | 1368 | if (!printed_version++) |
1385 | dev_printk(KERN_DEBUG, &pdev->dev, | 1369 | dev_printk(KERN_DEBUG, &pdev->dev, |
@@ -1389,17 +1373,31 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1389 | if (!in_module_init) | 1373 | if (!in_module_init) |
1390 | return -ENODEV; | 1374 | return -ENODEV; |
1391 | 1375 | ||
1376 | port_info[0] = piix_port_info[ent->driver_data]; | ||
1377 | port_info[1] = piix_port_info[ent->driver_data]; | ||
1378 | |||
1379 | port_flags = port_info[0].flags; | ||
1380 | |||
1381 | /* enable device and prepare host */ | ||
1382 | rc = pcim_enable_device(pdev); | ||
1383 | if (rc) | ||
1384 | return rc; | ||
1385 | |||
1386 | /* SATA map init can change port_info, do it before prepping host */ | ||
1392 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); | 1387 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); |
1393 | if (!hpriv) | 1388 | if (!hpriv) |
1394 | return -ENOMEM; | 1389 | return -ENOMEM; |
1395 | 1390 | ||
1396 | port_info[0] = piix_port_info[ent->driver_data]; | 1391 | if (port_flags & ATA_FLAG_SATA) |
1397 | port_info[1] = piix_port_info[ent->driver_data]; | 1392 | hpriv->map = piix_init_sata_map(pdev, port_info, |
1398 | port_info[0].private_data = hpriv; | 1393 | piix_map_db_table[ent->driver_data]); |
1399 | port_info[1].private_data = hpriv; | ||
1400 | 1394 | ||
1401 | port_flags = port_info[0].flags; | 1395 | rc = ata_pci_prepare_sff_host(pdev, ppi, &host); |
1396 | if (rc) | ||
1397 | return rc; | ||
1398 | host->private_data = hpriv; | ||
1402 | 1399 | ||
1400 | /* initialize controller */ | ||
1403 | if (port_flags & PIIX_FLAG_AHCI) { | 1401 | if (port_flags & PIIX_FLAG_AHCI) { |
1404 | u8 tmp; | 1402 | u8 tmp; |
1405 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); | 1403 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); |
@@ -1410,13 +1408,8 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1410 | } | 1408 | } |
1411 | } | 1409 | } |
1412 | 1410 | ||
1413 | /* Initialize SATA map */ | 1411 | if (port_flags & ATA_FLAG_SATA) |
1414 | if (port_flags & ATA_FLAG_SATA) { | 1412 | piix_init_pcs(host, piix_map_db_table[ent->driver_data]); |
1415 | piix_init_sata_map(pdev, port_info, | ||
1416 | piix_map_db_table[ent->driver_data]); | ||
1417 | piix_init_pcs(pdev, port_info, | ||
1418 | piix_map_db_table[ent->driver_data]); | ||
1419 | } | ||
1420 | 1413 | ||
1421 | /* apply IOCFG bit18 quirk */ | 1414 | /* apply IOCFG bit18 quirk */ |
1422 | piix_iocfg_bit18_quirk(pdev); | 1415 | piix_iocfg_bit18_quirk(pdev); |
@@ -1434,12 +1427,14 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1434 | /* This writes into the master table but it does not | 1427 | /* This writes into the master table but it does not |
1435 | really matter for this errata as we will apply it to | 1428 | really matter for this errata as we will apply it to |
1436 | all the PIIX devices on the board */ | 1429 | all the PIIX devices on the board */ |
1437 | port_info[0].mwdma_mask = 0; | 1430 | host->ports[0]->mwdma_mask = 0; |
1438 | port_info[0].udma_mask = 0; | 1431 | host->ports[0]->udma_mask = 0; |
1439 | port_info[1].mwdma_mask = 0; | 1432 | host->ports[1]->mwdma_mask = 0; |
1440 | port_info[1].udma_mask = 0; | 1433 | host->ports[1]->udma_mask = 0; |
1441 | } | 1434 | } |
1442 | return ata_pci_init_one(pdev, ppi); | 1435 | |
1436 | pci_set_master(pdev); | ||
1437 | return ata_pci_activate_sff_host(host, ata_interrupt, &piix_sht); | ||
1443 | } | 1438 | } |
1444 | 1439 | ||
1445 | static int __init piix_init(void) | 1440 | static int __init piix_init(void) |