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authorTejun Heo <htejun@gmail.com>2007-10-16 17:21:24 -0400
committerJeff Garzik <jeff@garzik.org>2007-10-29 06:15:27 -0400
commit88ff6eafbb2a1c55f0f0e2e16d72e7b10d8ae8a5 (patch)
treead6ab294a4f725540bfa24b7a451273b99fa71c1 /drivers/ata/ahci.c
parent054a5fbaceb2eb3a31ea843c1cf0b8e10b91478c (diff)
libata: implement ata_wait_after_reset()
On certain device/controller combination, 0xff status is asserted after reset and doesn't get cleared during 150ms post-reset wait. As 0xff status is interpreted as no device (for good reasons), this can lead to misdetection on such cases. This patch implements ata_wait_after_reset() which replaces the 150ms sleep and waits upto ATA_TMOUT_FF_WAIT if status is 0xff. ATA_TMOUT_FF_WAIT is currently 800ms which is enough for HHD424020F7SV00 to get detected but not enough for Quantum GoVault drive which is known to take upto 2s. Without parallel probing, spending 2s on 0xff port would incur too much delay on ata_piix's which use 0xff to indicate empty port and doesn't have SCR register, so GoVault needs to wait till parallel probing. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r--drivers/ata/ahci.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 49cf4cf1a5a2..93bcb2cb3d35 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1153,15 +1153,8 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
1153 tf.ctl &= ~ATA_SRST; 1153 tf.ctl &= ~ATA_SRST;
1154 ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0); 1154 ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
1155 1155
1156 /* spec mandates ">= 2ms" before checking status. 1156 /* wait a while before checking status */
1157 * We wait 150ms, because that was the magic delay used for 1157 ata_wait_after_reset(ap, deadline);
1158 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1159 * between when the ATA command register is written, and then
1160 * status is checked. Because waiting for "a while" before
1161 * checking status is fine, post SRST, we perform this magic
1162 * delay here as well.
1163 */
1164 msleep(150);
1165 1158
1166 rc = ata_wait_ready(ap, deadline); 1159 rc = ata_wait_ready(ap, deadline);
1167 /* link occupied, -ENODEV too is an error */ 1160 /* link occupied, -ENODEV too is an error */