diff options
author | Tejun Heo <tj@kernel.org> | 2010-03-28 21:32:39 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2010-05-14 17:08:01 -0400 |
commit | 441577efa0dc9ae40fb72c602896fc76a87c0a3a (patch) | |
tree | 7ebfe6939da5261e97099bb42c84410e428bb1a3 /drivers/ata/ahci.c | |
parent | 96d60303fd3336893a93565d58c4f1805a327061 (diff) |
ahci: clean up board IDs
ahci over time has grown a number of board IDs and it's a bit of mess
right now. Clean it up such that,
* board_id_* now live in a separate enum board_ids and numbers are
assigned automatically.
* Board IDs assigned to features are separated from the ones assigned
to specific implementations and both are ordered alphabetically.
* For NV MCPs, define per-generation alias board_ids and assign
matching aliases in the pci id table. This makes mcp_linux, 67-73
use board_ahci_mcp65 instead of board_ahci_yesncq. Both are
identical in content.
* Kill now unused board_ahci_nopmp and board_ahci_yesncq.
This patch doesn't cause any functional change but will make future
changes to board_ids and quirks much less painful.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Peer Chen <pchen@nvidia.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r-- | drivers/ata/ahci.c | 237 |
1 files changed, 117 insertions, 120 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index feaefb84ffa2..ec1221879f9a 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -53,17 +53,28 @@ | |||
53 | 53 | ||
54 | enum { | 54 | enum { |
55 | AHCI_PCI_BAR = 5, | 55 | AHCI_PCI_BAR = 5, |
56 | }; | ||
56 | 57 | ||
57 | board_ahci = 0, | 58 | enum board_ids { |
58 | board_ahci_vt8251 = 1, | 59 | /* board IDs by feature in alphabetical order */ |
59 | board_ahci_ign_iferr = 2, | 60 | board_ahci, |
60 | board_ahci_sb600 = 3, | 61 | board_ahci_ign_iferr, |
61 | board_ahci_mv = 4, | 62 | board_ahci_nosntf, |
62 | board_ahci_sb700 = 5, /* for SB700 and SB800 */ | 63 | |
63 | board_ahci_mcp65 = 6, | 64 | /* board IDs for specific chipsets in alphabetical order */ |
64 | board_ahci_nopmp = 7, | 65 | board_ahci_mcp65, |
65 | board_ahci_yesncq = 8, | 66 | board_ahci_mv, |
66 | board_ahci_nosntf = 9, | 67 | board_ahci_sb600, |
68 | board_ahci_sb700, /* for SB700 and SB800 */ | ||
69 | board_ahci_vt8251, | ||
70 | |||
71 | /* aliases */ | ||
72 | board_ahci_mcp_linux = board_ahci_mcp65, | ||
73 | board_ahci_mcp67 = board_ahci_mcp65, | ||
74 | board_ahci_mcp73 = board_ahci_mcp65, | ||
75 | board_ahci_mcp77 = board_ahci, | ||
76 | board_ahci_mcp79 = board_ahci, | ||
77 | board_ahci_mcp89 = board_ahci, | ||
67 | }; | 78 | }; |
68 | 79 | ||
69 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 80 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
@@ -97,6 +108,7 @@ static struct ata_port_operations ahci_sb600_ops = { | |||
97 | #define AHCI_HFLAGS(flags) .private_data = (void *)(flags) | 108 | #define AHCI_HFLAGS(flags) .private_data = (void *)(flags) |
98 | 109 | ||
99 | static const struct ata_port_info ahci_port_info[] = { | 110 | static const struct ata_port_info ahci_port_info[] = { |
111 | /* by features */ | ||
100 | [board_ahci] = | 112 | [board_ahci] = |
101 | { | 113 | { |
102 | .flags = AHCI_FLAG_COMMON, | 114 | .flags = AHCI_FLAG_COMMON, |
@@ -104,31 +116,30 @@ static const struct ata_port_info ahci_port_info[] = { | |||
104 | .udma_mask = ATA_UDMA6, | 116 | .udma_mask = ATA_UDMA6, |
105 | .port_ops = &ahci_ops, | 117 | .port_ops = &ahci_ops, |
106 | }, | 118 | }, |
107 | [board_ahci_vt8251] = | 119 | [board_ahci_ign_iferr] = |
108 | { | 120 | { |
109 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), | 121 | AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), |
110 | .flags = AHCI_FLAG_COMMON, | 122 | .flags = AHCI_FLAG_COMMON, |
111 | .pio_mask = ATA_PIO4, | 123 | .pio_mask = ATA_PIO4, |
112 | .udma_mask = ATA_UDMA6, | 124 | .udma_mask = ATA_UDMA6, |
113 | .port_ops = &ahci_vt8251_ops, | 125 | .port_ops = &ahci_ops, |
114 | }, | 126 | }, |
115 | [board_ahci_ign_iferr] = | 127 | [board_ahci_nosntf] = |
116 | { | 128 | { |
117 | AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), | 129 | AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), |
118 | .flags = AHCI_FLAG_COMMON, | 130 | .flags = AHCI_FLAG_COMMON, |
119 | .pio_mask = ATA_PIO4, | 131 | .pio_mask = ATA_PIO4, |
120 | .udma_mask = ATA_UDMA6, | 132 | .udma_mask = ATA_UDMA6, |
121 | .port_ops = &ahci_ops, | 133 | .port_ops = &ahci_ops, |
122 | }, | 134 | }, |
123 | [board_ahci_sb600] = | 135 | /* by chipsets */ |
136 | [board_ahci_mcp65] = | ||
124 | { | 137 | { |
125 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | | 138 | AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), |
126 | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 | | ||
127 | AHCI_HFLAG_32BIT_ONLY), | ||
128 | .flags = AHCI_FLAG_COMMON, | 139 | .flags = AHCI_FLAG_COMMON, |
129 | .pio_mask = ATA_PIO4, | 140 | .pio_mask = ATA_PIO4, |
130 | .udma_mask = ATA_UDMA6, | 141 | .udma_mask = ATA_UDMA6, |
131 | .port_ops = &ahci_sb600_ops, | 142 | .port_ops = &ahci_ops, |
132 | }, | 143 | }, |
133 | [board_ahci_mv] = | 144 | [board_ahci_mv] = |
134 | { | 145 | { |
@@ -140,45 +151,31 @@ static const struct ata_port_info ahci_port_info[] = { | |||
140 | .udma_mask = ATA_UDMA6, | 151 | .udma_mask = ATA_UDMA6, |
141 | .port_ops = &ahci_ops, | 152 | .port_ops = &ahci_ops, |
142 | }, | 153 | }, |
143 | [board_ahci_sb700] = /* for SB700 and SB800 */ | 154 | [board_ahci_sb600] = |
144 | { | 155 | { |
145 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), | 156 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | |
157 | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 | | ||
158 | AHCI_HFLAG_32BIT_ONLY), | ||
146 | .flags = AHCI_FLAG_COMMON, | 159 | .flags = AHCI_FLAG_COMMON, |
147 | .pio_mask = ATA_PIO4, | 160 | .pio_mask = ATA_PIO4, |
148 | .udma_mask = ATA_UDMA6, | 161 | .udma_mask = ATA_UDMA6, |
149 | .port_ops = &ahci_sb600_ops, | 162 | .port_ops = &ahci_sb600_ops, |
150 | }, | 163 | }, |
151 | [board_ahci_mcp65] = | 164 | [board_ahci_sb700] = /* for SB700 and SB800 */ |
152 | { | ||
153 | AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), | ||
154 | .flags = AHCI_FLAG_COMMON, | ||
155 | .pio_mask = ATA_PIO4, | ||
156 | .udma_mask = ATA_UDMA6, | ||
157 | .port_ops = &ahci_ops, | ||
158 | }, | ||
159 | [board_ahci_nopmp] = | ||
160 | { | ||
161 | AHCI_HFLAGS (AHCI_HFLAG_NO_PMP), | ||
162 | .flags = AHCI_FLAG_COMMON, | ||
163 | .pio_mask = ATA_PIO4, | ||
164 | .udma_mask = ATA_UDMA6, | ||
165 | .port_ops = &ahci_ops, | ||
166 | }, | ||
167 | [board_ahci_yesncq] = | ||
168 | { | 165 | { |
169 | AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), | 166 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), |
170 | .flags = AHCI_FLAG_COMMON, | 167 | .flags = AHCI_FLAG_COMMON, |
171 | .pio_mask = ATA_PIO4, | 168 | .pio_mask = ATA_PIO4, |
172 | .udma_mask = ATA_UDMA6, | 169 | .udma_mask = ATA_UDMA6, |
173 | .port_ops = &ahci_ops, | 170 | .port_ops = &ahci_sb600_ops, |
174 | }, | 171 | }, |
175 | [board_ahci_nosntf] = | 172 | [board_ahci_vt8251] = |
176 | { | 173 | { |
177 | AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), | 174 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), |
178 | .flags = AHCI_FLAG_COMMON, | 175 | .flags = AHCI_FLAG_COMMON, |
179 | .pio_mask = ATA_PIO4, | 176 | .pio_mask = ATA_PIO4, |
180 | .udma_mask = ATA_UDMA6, | 177 | .udma_mask = ATA_UDMA6, |
181 | .port_ops = &ahci_ops, | 178 | .port_ops = &ahci_vt8251_ops, |
182 | }, | 179 | }, |
183 | }; | 180 | }; |
184 | 181 | ||
@@ -263,82 +260,82 @@ static const struct pci_device_id ahci_pci_tbl[] = { | |||
263 | { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */ | 260 | { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */ |
264 | { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */ | 261 | { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */ |
265 | { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */ | 262 | { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */ |
266 | { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq }, /* MCP67 */ | 263 | { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_mcp67 }, /* MCP67 */ |
267 | { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq }, /* MCP67 */ | 264 | { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_mcp67 }, /* MCP67 */ |
268 | { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq }, /* MCP67 */ | 265 | { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_mcp67 }, /* MCP67 */ |
269 | { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq }, /* MCP67 */ | 266 | { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_mcp67 }, /* MCP67 */ |
270 | { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq }, /* MCP67 */ | 267 | { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_mcp67 }, /* MCP67 */ |
271 | { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq }, /* MCP67 */ | 268 | { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_mcp67 }, /* MCP67 */ |
272 | { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq }, /* MCP67 */ | 269 | { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_mcp67 }, /* MCP67 */ |
273 | { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq }, /* MCP67 */ | 270 | { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_mcp67 }, /* MCP67 */ |
274 | { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq }, /* MCP67 */ | 271 | { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_mcp67 }, /* MCP67 */ |
275 | { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */ | 272 | { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_mcp67 }, /* MCP67 */ |
276 | { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */ | 273 | { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_mcp67 }, /* MCP67 */ |
277 | { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */ | 274 | { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_mcp67 }, /* MCP67 */ |
278 | { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */ | 275 | { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_mcp_linux }, /* Linux ID */ |
279 | { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_yesncq }, /* Linux ID */ | 276 | { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_mcp_linux }, /* Linux ID */ |
280 | { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_yesncq }, /* Linux ID */ | 277 | { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_mcp_linux }, /* Linux ID */ |
281 | { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_yesncq }, /* Linux ID */ | 278 | { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_mcp_linux }, /* Linux ID */ |
282 | { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_yesncq }, /* Linux ID */ | 279 | { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_mcp_linux }, /* Linux ID */ |
283 | { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_yesncq }, /* Linux ID */ | 280 | { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_mcp_linux }, /* Linux ID */ |
284 | { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_yesncq }, /* Linux ID */ | 281 | { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_mcp_linux }, /* Linux ID */ |
285 | { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_yesncq }, /* Linux ID */ | 282 | { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_mcp_linux }, /* Linux ID */ |
286 | { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_yesncq }, /* Linux ID */ | 283 | { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_mcp_linux }, /* Linux ID */ |
287 | { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_yesncq }, /* Linux ID */ | 284 | { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_mcp_linux }, /* Linux ID */ |
288 | { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_yesncq }, /* Linux ID */ | 285 | { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_mcp_linux }, /* Linux ID */ |
289 | { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_yesncq }, /* Linux ID */ | 286 | { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_mcp_linux }, /* Linux ID */ |
290 | { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_yesncq }, /* Linux ID */ | 287 | { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_mcp_linux }, /* Linux ID */ |
291 | { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_yesncq }, /* Linux ID */ | 288 | { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_mcp_linux }, /* Linux ID */ |
292 | { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_yesncq }, /* Linux ID */ | 289 | { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_mcp_linux }, /* Linux ID */ |
293 | { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_yesncq }, /* Linux ID */ | 290 | { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_mcp_linux }, /* Linux ID */ |
294 | { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */ | 291 | { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_mcp73 }, /* MCP73 */ |
295 | { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */ | 292 | { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_mcp73 }, /* MCP73 */ |
296 | { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */ | 293 | { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_mcp73 }, /* MCP73 */ |
297 | { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq }, /* MCP73 */ | 294 | { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_mcp73 }, /* MCP73 */ |
298 | { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq }, /* MCP73 */ | 295 | { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_mcp73 }, /* MCP73 */ |
299 | { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq }, /* MCP73 */ | 296 | { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_mcp73 }, /* MCP73 */ |
300 | { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq }, /* MCP73 */ | 297 | { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_mcp73 }, /* MCP73 */ |
301 | { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq }, /* MCP73 */ | 298 | { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_mcp73 }, /* MCP73 */ |
302 | { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq }, /* MCP73 */ | 299 | { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_mcp73 }, /* MCP73 */ |
303 | { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq }, /* MCP73 */ | 300 | { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_mcp73 }, /* MCP73 */ |
304 | { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq }, /* MCP73 */ | 301 | { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_mcp73 }, /* MCP73 */ |
305 | { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq }, /* MCP73 */ | 302 | { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_mcp73 }, /* MCP73 */ |
306 | { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci }, /* MCP77 */ | 303 | { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci_mcp77 }, /* MCP77 */ |
307 | { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci }, /* MCP77 */ | 304 | { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci_mcp77 }, /* MCP77 */ |
308 | { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci }, /* MCP77 */ | 305 | { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci_mcp77 }, /* MCP77 */ |
309 | { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci }, /* MCP77 */ | 306 | { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci_mcp77 }, /* MCP77 */ |
310 | { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci }, /* MCP77 */ | 307 | { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci_mcp77 }, /* MCP77 */ |
311 | { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci }, /* MCP77 */ | 308 | { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci_mcp77 }, /* MCP77 */ |
312 | { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci }, /* MCP77 */ | 309 | { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci_mcp77 }, /* MCP77 */ |
313 | { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci }, /* MCP77 */ | 310 | { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci_mcp77 }, /* MCP77 */ |
314 | { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci }, /* MCP77 */ | 311 | { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci_mcp77 }, /* MCP77 */ |
315 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */ | 312 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci_mcp77 }, /* MCP77 */ |
316 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */ | 313 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci_mcp77 }, /* MCP77 */ |
317 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */ | 314 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci_mcp77 }, /* MCP77 */ |
318 | { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci }, /* MCP79 */ | 315 | { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci_mcp79 }, /* MCP79 */ |
319 | { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci }, /* MCP79 */ | 316 | { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci_mcp79 }, /* MCP79 */ |
320 | { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci }, /* MCP79 */ | 317 | { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci_mcp79 }, /* MCP79 */ |
321 | { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci }, /* MCP79 */ | 318 | { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci_mcp79 }, /* MCP79 */ |
322 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci }, /* MCP79 */ | 319 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci_mcp79 }, /* MCP79 */ |
323 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci }, /* MCP79 */ | 320 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci_mcp79 }, /* MCP79 */ |
324 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci }, /* MCP79 */ | 321 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci_mcp79 }, /* MCP79 */ |
325 | { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci }, /* MCP79 */ | 322 | { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci_mcp79 }, /* MCP79 */ |
326 | { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci }, /* MCP79 */ | 323 | { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci_mcp79 }, /* MCP79 */ |
327 | { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */ | 324 | { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci_mcp79 }, /* MCP79 */ |
328 | { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */ | 325 | { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci_mcp79 }, /* MCP79 */ |
329 | { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */ | 326 | { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci_mcp79 }, /* MCP79 */ |
330 | { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci }, /* MCP89 */ | 327 | { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci_mcp89 }, /* MCP89 */ |
331 | { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci }, /* MCP89 */ | 328 | { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci_mcp89 }, /* MCP89 */ |
332 | { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci }, /* MCP89 */ | 329 | { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci_mcp89 }, /* MCP89 */ |
333 | { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci }, /* MCP89 */ | 330 | { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci_mcp89 }, /* MCP89 */ |
334 | { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci }, /* MCP89 */ | 331 | { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci_mcp89 }, /* MCP89 */ |
335 | { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci }, /* MCP89 */ | 332 | { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci_mcp89 }, /* MCP89 */ |
336 | { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci }, /* MCP89 */ | 333 | { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci_mcp89 }, /* MCP89 */ |
337 | { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci }, /* MCP89 */ | 334 | { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci_mcp89 }, /* MCP89 */ |
338 | { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci }, /* MCP89 */ | 335 | { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci_mcp89 }, /* MCP89 */ |
339 | { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci }, /* MCP89 */ | 336 | { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci_mcp89 }, /* MCP89 */ |
340 | { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci }, /* MCP89 */ | 337 | { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci_mcp89 }, /* MCP89 */ |
341 | { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci }, /* MCP89 */ | 338 | { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci_mcp89 }, /* MCP89 */ |
342 | 339 | ||
343 | /* SiS */ | 340 | /* SiS */ |
344 | { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ | 341 | { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ |