aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ata/ahci.c
diff options
context:
space:
mode:
authorTejun Heo <htejun@gmail.com>2007-04-17 10:44:08 -0400
committerJeff Garzik <jeff@garzik.org>2007-04-28 14:16:06 -0400
commit4447d35156169cf136e829eb6b5cac2d6370f2d9 (patch)
tree20be4c582ea4ce1cce1b0f8dbea949a410a72e3c /drivers/ata/ahci.c
parent9a829ccfc833269bdb85751f5048288ab93678ac (diff)
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv, sata_sx4, sata_vsc and sata_inic162x to new init model. Now that host and ap are available during intialization, functions are converted to take either host or ap instead of low level parameters which were inevitable for functions shared between init and other paths. This simplifies code quite a bit. * init_one()'s now follow more consistent init order * ahci_setup_port() and ahci_host_init() collapsed into ahci_init_one() for init order consistency * sata_vsc uses port_info instead of setting fields manually * in sata_svw, k2_board_info converted to port_info (info is now in port flags). port number is honored now. Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r--drivers/ata/ahci.c327
1 files changed, 135 insertions, 192 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index fe4f0fe36bfb..7c61bc7ebd71 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -211,7 +211,6 @@ static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
211static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 211static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
212static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 212static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
213static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); 213static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
214static irqreturn_t ahci_interrupt (int irq, void *dev_instance);
215static void ahci_irq_clear(struct ata_port *ap); 214static void ahci_irq_clear(struct ata_port *ap);
216static int ahci_port_start(struct ata_port *ap); 215static int ahci_port_start(struct ata_port *ap);
217static void ahci_port_stop(struct ata_port *ap); 216static void ahci_port_stop(struct ata_port *ap);
@@ -265,7 +264,6 @@ static const struct ata_port_operations ahci_ops = {
265 .qc_prep = ahci_qc_prep, 264 .qc_prep = ahci_qc_prep,
266 .qc_issue = ahci_qc_issue, 265 .qc_issue = ahci_qc_issue,
267 266
268 .irq_handler = ahci_interrupt,
269 .irq_clear = ahci_irq_clear, 267 .irq_clear = ahci_irq_clear,
270 .irq_on = ata_dummy_irq_on, 268 .irq_on = ata_dummy_irq_on,
271 .irq_ack = ata_dummy_irq_ack, 269 .irq_ack = ata_dummy_irq_ack,
@@ -300,7 +298,6 @@ static const struct ata_port_operations ahci_vt8251_ops = {
300 .qc_prep = ahci_qc_prep, 298 .qc_prep = ahci_qc_prep,
301 .qc_issue = ahci_qc_issue, 299 .qc_issue = ahci_qc_issue,
302 300
303 .irq_handler = ahci_interrupt,
304 .irq_clear = ahci_irq_clear, 301 .irq_clear = ahci_irq_clear,
305 .irq_on = ata_dummy_irq_on, 302 .irq_on = ata_dummy_irq_on,
306 .irq_ack = ata_dummy_irq_ack, 303 .irq_ack = ata_dummy_irq_ack,
@@ -326,7 +323,6 @@ static const struct ata_port_operations ahci_vt8251_ops = {
326static const struct ata_port_info ahci_port_info[] = { 323static const struct ata_port_info ahci_port_info[] = {
327 /* board_ahci */ 324 /* board_ahci */
328 { 325 {
329 .sht = &ahci_sht,
330 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 326 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
331 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | 327 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
332 ATA_FLAG_SKIP_D2H_BSY, 328 ATA_FLAG_SKIP_D2H_BSY,
@@ -336,7 +332,6 @@ static const struct ata_port_info ahci_port_info[] = {
336 }, 332 },
337 /* board_ahci_pi */ 333 /* board_ahci_pi */
338 { 334 {
339 .sht = &ahci_sht,
340 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 335 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
341 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | 336 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
342 ATA_FLAG_SKIP_D2H_BSY | AHCI_FLAG_HONOR_PI, 337 ATA_FLAG_SKIP_D2H_BSY | AHCI_FLAG_HONOR_PI,
@@ -346,7 +341,6 @@ static const struct ata_port_info ahci_port_info[] = {
346 }, 341 },
347 /* board_ahci_vt8251 */ 342 /* board_ahci_vt8251 */
348 { 343 {
349 .sht = &ahci_sht,
350 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 344 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
351 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | 345 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
352 ATA_FLAG_SKIP_D2H_BSY | 346 ATA_FLAG_SKIP_D2H_BSY |
@@ -357,7 +351,6 @@ static const struct ata_port_info ahci_port_info[] = {
357 }, 351 },
358 /* board_ahci_ign_iferr */ 352 /* board_ahci_ign_iferr */
359 { 353 {
360 .sht = &ahci_sht,
361 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 354 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
362 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | 355 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
363 ATA_FLAG_SKIP_D2H_BSY | 356 ATA_FLAG_SKIP_D2H_BSY |
@@ -473,15 +466,18 @@ static inline int ahci_nr_ports(u32 cap)
473 return (cap & 0x1f) + 1; 466 return (cap & 0x1f) + 1;
474} 467}
475 468
476static inline void __iomem *ahci_port_base(void __iomem *base, 469static inline void __iomem *ahci_port_base(struct ata_port *ap)
477 unsigned int port)
478{ 470{
479 return base + 0x100 + (port * 0x80); 471 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
472
473 return mmio + 0x100 + (ap->port_no * 0x80);
480} 474}
481 475
482/** 476/**
483 * ahci_save_initial_config - Save and fixup initial config values 477 * ahci_save_initial_config - Save and fixup initial config values
484 * @probe_ent: probe_ent of target device 478 * @pdev: target PCI device
479 * @pi: associated ATA port info
480 * @hpriv: host private area to store config values
485 * 481 *
486 * Some registers containing configuration info might be setup by 482 * Some registers containing configuration info might be setup by
487 * BIOS and might be cleared on reset. This function saves the 483 * BIOS and might be cleared on reset. This function saves the
@@ -493,10 +489,11 @@ static inline void __iomem *ahci_port_base(void __iomem *base,
493 * LOCKING: 489 * LOCKING:
494 * None. 490 * None.
495 */ 491 */
496static void ahci_save_initial_config(struct ata_probe_ent *probe_ent) 492static void ahci_save_initial_config(struct pci_dev *pdev,
493 const struct ata_port_info *pi,
494 struct ahci_host_priv *hpriv)
497{ 495{
498 struct ahci_host_priv *hpriv = probe_ent->private_data; 496 void __iomem *mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR];
499 void __iomem *mmio = probe_ent->iomap[AHCI_PCI_BAR];
500 u32 cap, port_map; 497 u32 cap, port_map;
501 int i; 498 int i;
502 499
@@ -509,7 +506,7 @@ static void ahci_save_initial_config(struct ata_probe_ent *probe_ent)
509 /* fixup zero port_map */ 506 /* fixup zero port_map */
510 if (!port_map) { 507 if (!port_map) {
511 port_map = (1 << ahci_nr_ports(hpriv->cap)) - 1; 508 port_map = (1 << ahci_nr_ports(hpriv->cap)) - 1;
512 dev_printk(KERN_WARNING, probe_ent->dev, 509 dev_printk(KERN_WARNING, &pdev->dev,
513 "PORTS_IMPL is zero, forcing 0x%x\n", port_map); 510 "PORTS_IMPL is zero, forcing 0x%x\n", port_map);
514 511
515 /* write the fixed up value to the PI register */ 512 /* write the fixed up value to the PI register */
@@ -517,7 +514,7 @@ static void ahci_save_initial_config(struct ata_probe_ent *probe_ent)
517 } 514 }
518 515
519 /* cross check port_map and cap.n_ports */ 516 /* cross check port_map and cap.n_ports */
520 if (probe_ent->port_flags & AHCI_FLAG_HONOR_PI) { 517 if (pi->flags & AHCI_FLAG_HONOR_PI) {
521 u32 tmp_port_map = port_map; 518 u32 tmp_port_map = port_map;
522 int n_ports = ahci_nr_ports(cap); 519 int n_ports = ahci_nr_ports(cap);
523 520
@@ -532,7 +529,7 @@ static void ahci_save_initial_config(struct ata_probe_ent *probe_ent)
532 * port_map is used to determine number of ports. 529 * port_map is used to determine number of ports.
533 */ 530 */
534 if (n_ports || tmp_port_map) 531 if (n_ports || tmp_port_map)
535 dev_printk(KERN_WARNING, probe_ent->dev, 532 dev_printk(KERN_WARNING, &pdev->dev,
536 "nr_ports (%u) and implemented port map " 533 "nr_ports (%u) and implemented port map "
537 "(0x%x) don't match\n", 534 "(0x%x) don't match\n",
538 ahci_nr_ports(cap), port_map); 535 ahci_nr_ports(cap), port_map);
@@ -548,17 +545,18 @@ static void ahci_save_initial_config(struct ata_probe_ent *probe_ent)
548 545
549/** 546/**
550 * ahci_restore_initial_config - Restore initial config 547 * ahci_restore_initial_config - Restore initial config
551 * @mmio: MMIO base for the host 548 * @host: target ATA host
552 * @hpriv: host private data
553 * 549 *
554 * Restore initial config stored by ahci_save_initial_config(). 550 * Restore initial config stored by ahci_save_initial_config().
555 * 551 *
556 * LOCKING: 552 * LOCKING:
557 * None. 553 * None.
558 */ 554 */
559static void ahci_restore_initial_config(void __iomem *mmio, 555static void ahci_restore_initial_config(struct ata_host *host)
560 struct ahci_host_priv *hpriv)
561{ 556{
557 struct ahci_host_priv *hpriv = host->private_data;
558 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
559
562 writel(hpriv->saved_cap, mmio + HOST_CAP); 560 writel(hpriv->saved_cap, mmio + HOST_CAP);
563 writel(hpriv->saved_port_map, mmio + HOST_PORTS_IMPL); 561 writel(hpriv->saved_port_map, mmio + HOST_PORTS_IMPL);
564 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ 562 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
@@ -598,8 +596,9 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
598 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 596 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
599} 597}
600 598
601static void ahci_start_engine(void __iomem *port_mmio) 599static void ahci_start_engine(struct ata_port *ap)
602{ 600{
601 void __iomem *port_mmio = ahci_port_base(ap);
603 u32 tmp; 602 u32 tmp;
604 603
605 /* start DMA */ 604 /* start DMA */
@@ -609,8 +608,9 @@ static void ahci_start_engine(void __iomem *port_mmio)
609 readl(port_mmio + PORT_CMD); /* flush */ 608 readl(port_mmio + PORT_CMD); /* flush */
610} 609}
611 610
612static int ahci_stop_engine(void __iomem *port_mmio) 611static int ahci_stop_engine(struct ata_port *ap)
613{ 612{
613 void __iomem *port_mmio = ahci_port_base(ap);
614 u32 tmp; 614 u32 tmp;
615 615
616 tmp = readl(port_mmio + PORT_CMD); 616 tmp = readl(port_mmio + PORT_CMD);
@@ -632,19 +632,23 @@ static int ahci_stop_engine(void __iomem *port_mmio)
632 return 0; 632 return 0;
633} 633}
634 634
635static void ahci_start_fis_rx(void __iomem *port_mmio, u32 cap, 635static void ahci_start_fis_rx(struct ata_port *ap)
636 dma_addr_t cmd_slot_dma, dma_addr_t rx_fis_dma)
637{ 636{
637 void __iomem *port_mmio = ahci_port_base(ap);
638 struct ahci_host_priv *hpriv = ap->host->private_data;
639 struct ahci_port_priv *pp = ap->private_data;
638 u32 tmp; 640 u32 tmp;
639 641
640 /* set FIS registers */ 642 /* set FIS registers */
641 if (cap & HOST_CAP_64) 643 if (hpriv->cap & HOST_CAP_64)
642 writel((cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI); 644 writel((pp->cmd_slot_dma >> 16) >> 16,
643 writel(cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR); 645 port_mmio + PORT_LST_ADDR_HI);
646 writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
644 647
645 if (cap & HOST_CAP_64) 648 if (hpriv->cap & HOST_CAP_64)
646 writel((rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI); 649 writel((pp->rx_fis_dma >> 16) >> 16,
647 writel(rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR); 650 port_mmio + PORT_FIS_ADDR_HI);
651 writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
648 652
649 /* enable FIS reception */ 653 /* enable FIS reception */
650 tmp = readl(port_mmio + PORT_CMD); 654 tmp = readl(port_mmio + PORT_CMD);
@@ -655,8 +659,9 @@ static void ahci_start_fis_rx(void __iomem *port_mmio, u32 cap,
655 readl(port_mmio + PORT_CMD); 659 readl(port_mmio + PORT_CMD);
656} 660}
657 661
658static int ahci_stop_fis_rx(void __iomem *port_mmio) 662static int ahci_stop_fis_rx(struct ata_port *ap)
659{ 663{
664 void __iomem *port_mmio = ahci_port_base(ap);
660 u32 tmp; 665 u32 tmp;
661 666
662 /* disable FIS reception */ 667 /* disable FIS reception */
@@ -673,14 +678,16 @@ static int ahci_stop_fis_rx(void __iomem *port_mmio)
673 return 0; 678 return 0;
674} 679}
675 680
676static void ahci_power_up(void __iomem *port_mmio, u32 cap) 681static void ahci_power_up(struct ata_port *ap)
677{ 682{
683 struct ahci_host_priv *hpriv = ap->host->private_data;
684 void __iomem *port_mmio = ahci_port_base(ap);
678 u32 cmd; 685 u32 cmd;
679 686
680 cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK; 687 cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
681 688
682 /* spin up device */ 689 /* spin up device */
683 if (cap & HOST_CAP_SSS) { 690 if (hpriv->cap & HOST_CAP_SSS) {
684 cmd |= PORT_CMD_SPIN_UP; 691 cmd |= PORT_CMD_SPIN_UP;
685 writel(cmd, port_mmio + PORT_CMD); 692 writel(cmd, port_mmio + PORT_CMD);
686 } 693 }
@@ -690,11 +697,13 @@ static void ahci_power_up(void __iomem *port_mmio, u32 cap)
690} 697}
691 698
692#ifdef CONFIG_PM 699#ifdef CONFIG_PM
693static void ahci_power_down(void __iomem *port_mmio, u32 cap) 700static void ahci_power_down(struct ata_port *ap)
694{ 701{
702 struct ahci_host_priv *hpriv = ap->host->private_data;
703 void __iomem *port_mmio = ahci_port_base(ap);
695 u32 cmd, scontrol; 704 u32 cmd, scontrol;
696 705
697 if (!(cap & HOST_CAP_SSS)) 706 if (!(hpriv->cap & HOST_CAP_SSS))
698 return; 707 return;
699 708
700 /* put device into listen mode, first set PxSCTL.DET to 0 */ 709 /* put device into listen mode, first set PxSCTL.DET to 0 */
@@ -709,29 +718,28 @@ static void ahci_power_down(void __iomem *port_mmio, u32 cap)
709} 718}
710#endif 719#endif
711 720
712static void ahci_init_port(void __iomem *port_mmio, u32 cap, 721static void ahci_init_port(struct ata_port *ap)
713 dma_addr_t cmd_slot_dma, dma_addr_t rx_fis_dma)
714{ 722{
715 /* enable FIS reception */ 723 /* enable FIS reception */
716 ahci_start_fis_rx(port_mmio, cap, cmd_slot_dma, rx_fis_dma); 724 ahci_start_fis_rx(ap);
717 725
718 /* enable DMA */ 726 /* enable DMA */
719 ahci_start_engine(port_mmio); 727 ahci_start_engine(ap);
720} 728}
721 729
722static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg) 730static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
723{ 731{
724 int rc; 732 int rc;
725 733
726 /* disable DMA */ 734 /* disable DMA */
727 rc = ahci_stop_engine(port_mmio); 735 rc = ahci_stop_engine(ap);
728 if (rc) { 736 if (rc) {
729 *emsg = "failed to stop engine"; 737 *emsg = "failed to stop engine";
730 return rc; 738 return rc;
731 } 739 }
732 740
733 /* disable FIS reception */ 741 /* disable FIS reception */
734 rc = ahci_stop_fis_rx(port_mmio); 742 rc = ahci_stop_fis_rx(ap);
735 if (rc) { 743 if (rc) {
736 *emsg = "failed stop FIS RX"; 744 *emsg = "failed stop FIS RX";
737 return rc; 745 return rc;
@@ -740,9 +748,10 @@ static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg)
740 return 0; 748 return 0;
741} 749}
742 750
743static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev, 751static int ahci_reset_controller(struct ata_host *host)
744 struct ahci_host_priv *hpriv)
745{ 752{
753 struct pci_dev *pdev = to_pci_dev(host->dev);
754 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
746 u32 tmp; 755 u32 tmp;
747 756
748 /* global controller reset */ 757 /* global controller reset */
@@ -759,7 +768,7 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev,
759 768
760 tmp = readl(mmio + HOST_CTL); 769 tmp = readl(mmio + HOST_CTL);
761 if (tmp & HOST_RESET) { 770 if (tmp & HOST_RESET) {
762 dev_printk(KERN_ERR, &pdev->dev, 771 dev_printk(KERN_ERR, host->dev,
763 "controller reset failed (0x%x)\n", tmp); 772 "controller reset failed (0x%x)\n", tmp);
764 return -EIO; 773 return -EIO;
765 } 774 }
@@ -769,7 +778,7 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev,
769 (void) readl(mmio + HOST_CTL); /* flush */ 778 (void) readl(mmio + HOST_CTL); /* flush */
770 779
771 /* some registers might be cleared on reset. restore initial values */ 780 /* some registers might be cleared on reset. restore initial values */
772 ahci_restore_initial_config(mmio, hpriv); 781 ahci_restore_initial_config(host);
773 782
774 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 783 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
775 u16 tmp16; 784 u16 tmp16;
@@ -783,23 +792,23 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev,
783 return 0; 792 return 0;
784} 793}
785 794
786static void ahci_init_controller(void __iomem *mmio, struct pci_dev *pdev, 795static void ahci_init_controller(struct ata_host *host)
787 int n_ports, unsigned int port_flags,
788 struct ahci_host_priv *hpriv)
789{ 796{
797 struct pci_dev *pdev = to_pci_dev(host->dev);
798 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
790 int i, rc; 799 int i, rc;
791 u32 tmp; 800 u32 tmp;
792 801
793 for (i = 0; i < n_ports; i++) { 802 for (i = 0; i < host->n_ports; i++) {
794 void __iomem *port_mmio = ahci_port_base(mmio, i); 803 struct ata_port *ap = host->ports[i];
804 void __iomem *port_mmio = ahci_port_base(ap);
795 const char *emsg = NULL; 805 const char *emsg = NULL;
796 806
797 if ((port_flags & AHCI_FLAG_HONOR_PI) && 807 if (ata_port_is_dummy(ap))
798 !(hpriv->port_map & (1 << i)))
799 continue; 808 continue;
800 809
801 /* make sure port is not active */ 810 /* make sure port is not active */
802 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 811 rc = ahci_deinit_port(ap, &emsg);
803 if (rc) 812 if (rc)
804 dev_printk(KERN_WARNING, &pdev->dev, 813 dev_printk(KERN_WARNING, &pdev->dev,
805 "%s (%d)\n", emsg, rc); 814 "%s (%d)\n", emsg, rc);
@@ -827,7 +836,7 @@ static void ahci_init_controller(void __iomem *mmio, struct pci_dev *pdev,
827 836
828static unsigned int ahci_dev_classify(struct ata_port *ap) 837static unsigned int ahci_dev_classify(struct ata_port *ap)
829{ 838{
830 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 839 void __iomem *port_mmio = ahci_port_base(ap);
831 struct ata_taskfile tf; 840 struct ata_taskfile tf;
832 u32 tmp; 841 u32 tmp;
833 842
@@ -877,8 +886,7 @@ static int ahci_clo(struct ata_port *ap)
877static int ahci_softreset(struct ata_port *ap, unsigned int *class) 886static int ahci_softreset(struct ata_port *ap, unsigned int *class)
878{ 887{
879 struct ahci_port_priv *pp = ap->private_data; 888 struct ahci_port_priv *pp = ap->private_data;
880 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 889 void __iomem *port_mmio = ahci_port_base(ap);
881 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
882 const u32 cmd_fis_len = 5; /* five dwords */ 890 const u32 cmd_fis_len = 5; /* five dwords */
883 const char *reason = NULL; 891 const char *reason = NULL;
884 struct ata_taskfile tf; 892 struct ata_taskfile tf;
@@ -895,7 +903,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
895 } 903 }
896 904
897 /* prepare for SRST (AHCI-1.1 10.4.1) */ 905 /* prepare for SRST (AHCI-1.1 10.4.1) */
898 rc = ahci_stop_engine(port_mmio); 906 rc = ahci_stop_engine(ap);
899 if (rc) { 907 if (rc) {
900 reason = "failed to stop engine"; 908 reason = "failed to stop engine";
901 goto fail_restart; 909 goto fail_restart;
@@ -915,7 +923,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
915 } 923 }
916 924
917 /* restart engine */ 925 /* restart engine */
918 ahci_start_engine(port_mmio); 926 ahci_start_engine(ap);
919 927
920 ata_tf_init(ap->device, &tf); 928 ata_tf_init(ap->device, &tf);
921 fis = pp->cmd_tbl; 929 fis = pp->cmd_tbl;
@@ -974,7 +982,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
974 return 0; 982 return 0;
975 983
976 fail_restart: 984 fail_restart:
977 ahci_start_engine(port_mmio); 985 ahci_start_engine(ap);
978 fail: 986 fail:
979 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason); 987 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason);
980 return rc; 988 return rc;
@@ -985,13 +993,11 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
985 struct ahci_port_priv *pp = ap->private_data; 993 struct ahci_port_priv *pp = ap->private_data;
986 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; 994 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
987 struct ata_taskfile tf; 995 struct ata_taskfile tf;
988 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
989 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
990 int rc; 996 int rc;
991 997
992 DPRINTK("ENTER\n"); 998 DPRINTK("ENTER\n");
993 999
994 ahci_stop_engine(port_mmio); 1000 ahci_stop_engine(ap);
995 1001
996 /* clear D2H reception area to properly wait for D2H FIS */ 1002 /* clear D2H reception area to properly wait for D2H FIS */
997 ata_tf_init(ap->device, &tf); 1003 ata_tf_init(ap->device, &tf);
@@ -1000,7 +1006,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
1000 1006
1001 rc = sata_std_hardreset(ap, class); 1007 rc = sata_std_hardreset(ap, class);
1002 1008
1003 ahci_start_engine(port_mmio); 1009 ahci_start_engine(ap);
1004 1010
1005 if (rc == 0 && ata_port_online(ap)) 1011 if (rc == 0 && ata_port_online(ap))
1006 *class = ahci_dev_classify(ap); 1012 *class = ahci_dev_classify(ap);
@@ -1013,20 +1019,18 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
1013 1019
1014static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class) 1020static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class)
1015{ 1021{
1016 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1017 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1018 int rc; 1022 int rc;
1019 1023
1020 DPRINTK("ENTER\n"); 1024 DPRINTK("ENTER\n");
1021 1025
1022 ahci_stop_engine(port_mmio); 1026 ahci_stop_engine(ap);
1023 1027
1024 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context)); 1028 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context));
1025 1029
1026 /* vt8251 needs SError cleared for the port to operate */ 1030 /* vt8251 needs SError cleared for the port to operate */
1027 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR)); 1031 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR));
1028 1032
1029 ahci_start_engine(port_mmio); 1033 ahci_start_engine(ap);
1030 1034
1031 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class); 1035 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
1032 1036
@@ -1038,7 +1042,7 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class)
1038 1042
1039static void ahci_postreset(struct ata_port *ap, unsigned int *class) 1043static void ahci_postreset(struct ata_port *ap, unsigned int *class)
1040{ 1044{
1041 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1045 void __iomem *port_mmio = ahci_port_base(ap);
1042 u32 new_tmp, tmp; 1046 u32 new_tmp, tmp;
1043 1047
1044 ata_std_postreset(ap, class); 1048 ata_std_postreset(ap, class);
@@ -1206,8 +1210,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1206 1210
1207static void ahci_host_intr(struct ata_port *ap) 1211static void ahci_host_intr(struct ata_port *ap)
1208{ 1212{
1209 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1213 void __iomem *port_mmio = ap->ioaddr.cmd_addr;
1210 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1211 struct ata_eh_info *ehi = &ap->eh_info; 1214 struct ata_eh_info *ehi = &ap->eh_info;
1212 struct ahci_port_priv *pp = ap->private_data; 1215 struct ahci_port_priv *pp = ap->private_data;
1213 u32 status, qc_active; 1216 u32 status, qc_active;
@@ -1358,7 +1361,7 @@ static irqreturn_t ahci_interrupt(int irq, void *dev_instance)
1358static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc) 1361static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
1359{ 1362{
1360 struct ata_port *ap = qc->ap; 1363 struct ata_port *ap = qc->ap;
1361 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1364 void __iomem *port_mmio = ahci_port_base(ap);
1362 1365
1363 if (qc->tf.protocol == ATA_PROT_NCQ) 1366 if (qc->tf.protocol == ATA_PROT_NCQ)
1364 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT); 1367 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT);
@@ -1370,8 +1373,7 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
1370 1373
1371static void ahci_freeze(struct ata_port *ap) 1374static void ahci_freeze(struct ata_port *ap)
1372{ 1375{
1373 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1376 void __iomem *port_mmio = ahci_port_base(ap);
1374 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1375 1377
1376 /* turn IRQ off */ 1378 /* turn IRQ off */
1377 writel(0, port_mmio + PORT_IRQ_MASK); 1379 writel(0, port_mmio + PORT_IRQ_MASK);
@@ -1380,7 +1382,7 @@ static void ahci_freeze(struct ata_port *ap)
1380static void ahci_thaw(struct ata_port *ap) 1382static void ahci_thaw(struct ata_port *ap)
1381{ 1383{
1382 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1384 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1383 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); 1385 void __iomem *port_mmio = ahci_port_base(ap);
1384 u32 tmp; 1386 u32 tmp;
1385 1387
1386 /* clear IRQ */ 1388 /* clear IRQ */
@@ -1394,13 +1396,10 @@ static void ahci_thaw(struct ata_port *ap)
1394 1396
1395static void ahci_error_handler(struct ata_port *ap) 1397static void ahci_error_handler(struct ata_port *ap)
1396{ 1398{
1397 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1398 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1399
1400 if (!(ap->pflags & ATA_PFLAG_FROZEN)) { 1399 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
1401 /* restart engine */ 1400 /* restart engine */
1402 ahci_stop_engine(port_mmio); 1401 ahci_stop_engine(ap);
1403 ahci_start_engine(port_mmio); 1402 ahci_start_engine(ap);
1404 } 1403 }
1405 1404
1406 /* perform recovery */ 1405 /* perform recovery */
@@ -1410,13 +1409,10 @@ static void ahci_error_handler(struct ata_port *ap)
1410 1409
1411static void ahci_vt8251_error_handler(struct ata_port *ap) 1410static void ahci_vt8251_error_handler(struct ata_port *ap)
1412{ 1411{
1413 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1414 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1415
1416 if (!(ap->pflags & ATA_PFLAG_FROZEN)) { 1412 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
1417 /* restart engine */ 1413 /* restart engine */
1418 ahci_stop_engine(port_mmio); 1414 ahci_stop_engine(ap);
1419 ahci_start_engine(port_mmio); 1415 ahci_start_engine(ap);
1420 } 1416 }
1421 1417
1422 /* perform recovery */ 1418 /* perform recovery */
@@ -1427,33 +1423,26 @@ static void ahci_vt8251_error_handler(struct ata_port *ap)
1427static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) 1423static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
1428{ 1424{
1429 struct ata_port *ap = qc->ap; 1425 struct ata_port *ap = qc->ap;
1430 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1431 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1432 1426
1433 if (qc->flags & ATA_QCFLAG_FAILED) { 1427 if (qc->flags & ATA_QCFLAG_FAILED) {
1434 /* make DMA engine forget about the failed command */ 1428 /* make DMA engine forget about the failed command */
1435 ahci_stop_engine(port_mmio); 1429 ahci_stop_engine(ap);
1436 ahci_start_engine(port_mmio); 1430 ahci_start_engine(ap);
1437 } 1431 }
1438} 1432}
1439 1433
1440#ifdef CONFIG_PM 1434#ifdef CONFIG_PM
1441static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) 1435static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
1442{ 1436{
1443 struct ahci_host_priv *hpriv = ap->host->private_data;
1444 struct ahci_port_priv *pp = ap->private_data;
1445 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1446 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1447 const char *emsg = NULL; 1437 const char *emsg = NULL;
1448 int rc; 1438 int rc;
1449 1439
1450 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 1440 rc = ahci_deinit_port(ap, &emsg);
1451 if (rc == 0) 1441 if (rc == 0)
1452 ahci_power_down(port_mmio, hpriv->cap); 1442 ahci_power_down(ap);
1453 else { 1443 else {
1454 ata_port_printk(ap, KERN_ERR, "%s (%d)\n", emsg, rc); 1444 ata_port_printk(ap, KERN_ERR, "%s (%d)\n", emsg, rc);
1455 ahci_init_port(port_mmio, hpriv->cap, 1445 ahci_init_port(ap);
1456 pp->cmd_slot_dma, pp->rx_fis_dma);
1457 } 1446 }
1458 1447
1459 return rc; 1448 return rc;
@@ -1461,13 +1450,8 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
1461 1450
1462static int ahci_port_resume(struct ata_port *ap) 1451static int ahci_port_resume(struct ata_port *ap)
1463{ 1452{
1464 struct ahci_port_priv *pp = ap->private_data; 1453 ahci_power_up(ap);
1465 struct ahci_host_priv *hpriv = ap->host->private_data; 1454 ahci_init_port(ap);
1466 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1467 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1468
1469 ahci_power_up(port_mmio, hpriv->cap);
1470 ahci_init_port(port_mmio, hpriv->cap, pp->cmd_slot_dma, pp->rx_fis_dma);
1471 1455
1472 return 0; 1456 return 0;
1473} 1457}
@@ -1495,8 +1479,6 @@ static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
1495static int ahci_pci_device_resume(struct pci_dev *pdev) 1479static int ahci_pci_device_resume(struct pci_dev *pdev)
1496{ 1480{
1497 struct ata_host *host = dev_get_drvdata(&pdev->dev); 1481 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1498 struct ahci_host_priv *hpriv = host->private_data;
1499 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
1500 int rc; 1482 int rc;
1501 1483
1502 rc = ata_pci_device_do_resume(pdev); 1484 rc = ata_pci_device_do_resume(pdev);
@@ -1504,12 +1486,11 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
1504 return rc; 1486 return rc;
1505 1487
1506 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { 1488 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
1507 rc = ahci_reset_controller(mmio, pdev, hpriv); 1489 rc = ahci_reset_controller(host);
1508 if (rc) 1490 if (rc)
1509 return rc; 1491 return rc;
1510 1492
1511 ahci_init_controller(mmio, pdev, host->n_ports, 1493 ahci_init_controller(host);
1512 host->ports[0]->flags, hpriv);
1513 } 1494 }
1514 1495
1515 ata_host_resume(host); 1496 ata_host_resume(host);
@@ -1521,10 +1502,7 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
1521static int ahci_port_start(struct ata_port *ap) 1502static int ahci_port_start(struct ata_port *ap)
1522{ 1503{
1523 struct device *dev = ap->host->dev; 1504 struct device *dev = ap->host->dev;
1524 struct ahci_host_priv *hpriv = ap->host->private_data;
1525 struct ahci_port_priv *pp; 1505 struct ahci_port_priv *pp;
1526 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1527 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1528 void *mem; 1506 void *mem;
1529 dma_addr_t mem_dma; 1507 dma_addr_t mem_dma;
1530 int rc; 1508 int rc;
@@ -1572,60 +1550,29 @@ static int ahci_port_start(struct ata_port *ap)
1572 ap->private_data = pp; 1550 ap->private_data = pp;
1573 1551
1574 /* power up port */ 1552 /* power up port */
1575 ahci_power_up(port_mmio, hpriv->cap); 1553 ahci_power_up(ap);
1576 1554
1577 /* initialize port */ 1555 /* initialize port */
1578 ahci_init_port(port_mmio, hpriv->cap, pp->cmd_slot_dma, pp->rx_fis_dma); 1556 ahci_init_port(ap);
1579 1557
1580 return 0; 1558 return 0;
1581} 1559}
1582 1560
1583static void ahci_port_stop(struct ata_port *ap) 1561static void ahci_port_stop(struct ata_port *ap)
1584{ 1562{
1585 struct ahci_host_priv *hpriv = ap->host->private_data;
1586 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1587 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1588 const char *emsg = NULL; 1563 const char *emsg = NULL;
1589 int rc; 1564 int rc;
1590 1565
1591 /* de-initialize port */ 1566 /* de-initialize port */
1592 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 1567 rc = ahci_deinit_port(ap, &emsg);
1593 if (rc) 1568 if (rc)
1594 ata_port_printk(ap, KERN_WARNING, "%s (%d)\n", emsg, rc); 1569 ata_port_printk(ap, KERN_WARNING, "%s (%d)\n", emsg, rc);
1595} 1570}
1596 1571
1597static void ahci_setup_port(struct ata_ioports *port, void __iomem *base, 1572static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
1598 unsigned int port_idx)
1599{ 1573{
1600 VPRINTK("ENTER, base==0x%lx, port_idx %u\n", base, port_idx);
1601 base = ahci_port_base(base, port_idx);
1602 VPRINTK("base now==0x%lx\n", base);
1603
1604 port->cmd_addr = base;
1605 port->scr_addr = base + PORT_SCR;
1606
1607 VPRINTK("EXIT\n");
1608}
1609
1610static int ahci_host_init(struct ata_probe_ent *probe_ent)
1611{
1612 struct ahci_host_priv *hpriv = probe_ent->private_data;
1613 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
1614 void __iomem *mmio = probe_ent->iomap[AHCI_PCI_BAR];
1615 unsigned int i, using_dac;
1616 int rc; 1574 int rc;
1617 1575
1618 rc = ahci_reset_controller(mmio, pdev, hpriv);
1619 if (rc)
1620 return rc;
1621
1622 probe_ent->n_ports = fls(hpriv->port_map);
1623 probe_ent->dummy_port_mask = ~hpriv->port_map;
1624
1625 VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
1626 hpriv->cap, hpriv->port_map, probe_ent->n_ports);
1627
1628 using_dac = hpriv->cap & HOST_CAP_64;
1629 if (using_dac && 1576 if (using_dac &&
1630 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { 1577 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1631 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1578 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
@@ -1651,23 +1598,14 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
1651 return rc; 1598 return rc;
1652 } 1599 }
1653 } 1600 }
1654
1655 for (i = 0; i < probe_ent->n_ports; i++)
1656 ahci_setup_port(&probe_ent->port[i], mmio, i);
1657
1658 ahci_init_controller(mmio, pdev, probe_ent->n_ports,
1659 probe_ent->port_flags, hpriv);
1660
1661 pci_set_master(pdev);
1662
1663 return 0; 1601 return 0;
1664} 1602}
1665 1603
1666static void ahci_print_info(struct ata_probe_ent *probe_ent) 1604static void ahci_print_info(struct ata_host *host)
1667{ 1605{
1668 struct ahci_host_priv *hpriv = probe_ent->private_data; 1606 struct ahci_host_priv *hpriv = host->private_data;
1669 struct pci_dev *pdev = to_pci_dev(probe_ent->dev); 1607 struct pci_dev *pdev = to_pci_dev(host->dev);
1670 void __iomem *mmio = probe_ent->iomap[AHCI_PCI_BAR]; 1608 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
1671 u32 vers, cap, impl, speed; 1609 u32 vers, cap, impl, speed;
1672 const char *speed_s; 1610 const char *speed_s;
1673 u16 cc; 1611 u16 cc;
@@ -1737,11 +1675,12 @@ static void ahci_print_info(struct ata_probe_ent *probe_ent)
1737static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1675static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1738{ 1676{
1739 static int printed_version; 1677 static int printed_version;
1740 unsigned int board_idx = (unsigned int) ent->driver_data; 1678 struct ata_port_info pi = ahci_port_info[ent->driver_data];
1679 const struct ata_port_info *ppi[] = { &pi, NULL };
1741 struct device *dev = &pdev->dev; 1680 struct device *dev = &pdev->dev;
1742 struct ata_probe_ent *probe_ent;
1743 struct ahci_host_priv *hpriv; 1681 struct ahci_host_priv *hpriv;
1744 int rc; 1682 struct ata_host *host;
1683 int i, rc;
1745 1684
1746 VPRINTK("ENTER\n"); 1685 VPRINTK("ENTER\n");
1747 1686
@@ -1750,6 +1689,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1750 if (!printed_version++) 1689 if (!printed_version++)
1751 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 1690 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
1752 1691
1692 /* acquire resources */
1753 rc = pcim_enable_device(pdev); 1693 rc = pcim_enable_device(pdev);
1754 if (rc) 1694 if (rc)
1755 return rc; 1695 return rc;
@@ -1763,46 +1703,49 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1763 if (pci_enable_msi(pdev)) 1703 if (pci_enable_msi(pdev))
1764 pci_intx(pdev, 1); 1704 pci_intx(pdev, 1);
1765 1705
1766 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
1767 if (probe_ent == NULL)
1768 return -ENOMEM;
1769
1770 probe_ent->dev = pci_dev_to_dev(pdev);
1771 INIT_LIST_HEAD(&probe_ent->node);
1772
1773 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); 1706 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
1774 if (!hpriv) 1707 if (!hpriv)
1775 return -ENOMEM; 1708 return -ENOMEM;
1776 1709
1777 probe_ent->sht = ahci_port_info[board_idx].sht; 1710 /* save initial config */
1778 probe_ent->port_flags = ahci_port_info[board_idx].flags; 1711 ahci_save_initial_config(pdev, &pi, hpriv);
1779 probe_ent->pio_mask = ahci_port_info[board_idx].pio_mask;
1780 probe_ent->udma_mask = ahci_port_info[board_idx].udma_mask;
1781 probe_ent->port_ops = ahci_port_info[board_idx].port_ops;
1782 1712
1783 probe_ent->irq = pdev->irq; 1713 /* prepare host */
1784 probe_ent->irq_flags = IRQF_SHARED; 1714 if (!(pi.flags & AHCI_FLAG_NO_NCQ) && (hpriv->cap & HOST_CAP_NCQ))
1785 probe_ent->iomap = pcim_iomap_table(pdev); 1715 pi.flags |= ATA_FLAG_NCQ;
1786 probe_ent->private_data = hpriv;
1787 1716
1788 /* initialize adapter */ 1717 host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map));
1789 ahci_save_initial_config(probe_ent); 1718 if (!host)
1719 return -ENOMEM;
1720 host->iomap = pcim_iomap_table(pdev);
1721 host->private_data = hpriv;
1722
1723 for (i = 0; i < host->n_ports; i++) {
1724 if (hpriv->port_map & (1 << i)) {
1725 struct ata_port *ap = host->ports[i];
1726 void __iomem *port_mmio = ahci_port_base(ap);
1727
1728 ap->ioaddr.cmd_addr = port_mmio;
1729 ap->ioaddr.scr_addr = port_mmio + PORT_SCR;
1730 } else
1731 host->ports[i]->ops = &ata_dummy_port_ops;
1732 }
1790 1733
1791 rc = ahci_host_init(probe_ent); 1734 /* initialize adapter */
1735 rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64);
1792 if (rc) 1736 if (rc)
1793 return rc; 1737 return rc;
1794 1738
1795 if (!(probe_ent->port_flags & AHCI_FLAG_NO_NCQ) && 1739 rc = ahci_reset_controller(host);
1796 (hpriv->cap & HOST_CAP_NCQ)) 1740 if (rc)
1797 probe_ent->port_flags |= ATA_FLAG_NCQ; 1741 return rc;
1798
1799 ahci_print_info(probe_ent);
1800 1742
1801 if (!ata_device_add(probe_ent)) 1743 ahci_init_controller(host);
1802 return -ENODEV; 1744 ahci_print_info(host);
1803 1745
1804 devm_kfree(dev, probe_ent); 1746 pci_set_master(pdev);
1805 return 0; 1747 return ata_host_activate(host, pdev->irq, ahci_interrupt, IRQF_SHARED,
1748 &ahci_sht);
1806} 1749}
1807 1750
1808static int __init ahci_init(void) 1751static int __init ahci_init(void)