diff options
author | Tejun Heo <htejun@gmail.com> | 2007-07-16 01:29:38 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-07-20 08:02:10 -0400 |
commit | 9977126c4b65c1396b665f7a0eeb8c7dede336f9 (patch) | |
tree | 91901f1356a57ba311bc5c95c4825504642f7d04 /drivers/ata/ahci.c | |
parent | fe36cb53cfd82f3c0796a0826e1c9caf198c8f97 (diff) |
libata: add @is_cmd to ata_tf_to_fis()
Add @is_cmd to ata_tf_to_fis(). This controls bit 7 of the second
byte which tells the device whether this H2D FIS is for a command or
not. This cleans up ahci a bit and will be used by PMP.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r-- | drivers/ata/ahci.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index eaec5e506f5e..61c5b6e68de4 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -1020,8 +1020,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class, | |||
1020 | cmd_fis_len | AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY); | 1020 | cmd_fis_len | AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY); |
1021 | 1021 | ||
1022 | tf.ctl |= ATA_SRST; | 1022 | tf.ctl |= ATA_SRST; |
1023 | ata_tf_to_fis(&tf, fis, 0); | 1023 | ata_tf_to_fis(&tf, 0, 0, fis); |
1024 | fis[1] &= ~(1 << 7); /* turn off Command FIS bit */ | ||
1025 | 1024 | ||
1026 | writel(1, port_mmio + PORT_CMD_ISSUE); | 1025 | writel(1, port_mmio + PORT_CMD_ISSUE); |
1027 | 1026 | ||
@@ -1039,8 +1038,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class, | |||
1039 | ahci_fill_cmd_slot(pp, 0, cmd_fis_len); | 1038 | ahci_fill_cmd_slot(pp, 0, cmd_fis_len); |
1040 | 1039 | ||
1041 | tf.ctl &= ~ATA_SRST; | 1040 | tf.ctl &= ~ATA_SRST; |
1042 | ata_tf_to_fis(&tf, fis, 0); | 1041 | ata_tf_to_fis(&tf, 0, 0, fis); |
1043 | fis[1] &= ~(1 << 7); /* turn off Command FIS bit */ | ||
1044 | 1042 | ||
1045 | writel(1, port_mmio + PORT_CMD_ISSUE); | 1043 | writel(1, port_mmio + PORT_CMD_ISSUE); |
1046 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ | 1044 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ |
@@ -1088,7 +1086,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class, | |||
1088 | /* clear D2H reception area to properly wait for D2H FIS */ | 1086 | /* clear D2H reception area to properly wait for D2H FIS */ |
1089 | ata_tf_init(ap->device, &tf); | 1087 | ata_tf_init(ap->device, &tf); |
1090 | tf.command = 0x80; | 1088 | tf.command = 0x80; |
1091 | ata_tf_to_fis(&tf, d2h_fis, 0); | 1089 | ata_tf_to_fis(&tf, 0, 0, d2h_fis); |
1092 | 1090 | ||
1093 | rc = sata_std_hardreset(ap, class, deadline); | 1091 | rc = sata_std_hardreset(ap, class, deadline); |
1094 | 1092 | ||
@@ -1205,7 +1203,7 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc) | |||
1205 | */ | 1203 | */ |
1206 | cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ; | 1204 | cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ; |
1207 | 1205 | ||
1208 | ata_tf_to_fis(&qc->tf, cmd_tbl, 0); | 1206 | ata_tf_to_fis(&qc->tf, 0, 1, cmd_tbl); |
1209 | if (is_atapi) { | 1207 | if (is_atapi) { |
1210 | memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32); | 1208 | memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32); |
1211 | memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len); | 1209 | memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len); |