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authorTejun Heo <htejun@gmail.com>2007-02-02 02:50:52 -0500
committerJeff Garzik <jeff@garzik.org>2007-05-01 07:49:53 -0400
commitd4b2bab4f26345ea1803feb23ea92fbe3f6b77bc (patch)
tree30a9826351e597828de2b402f1c41b9fca94cf95 /drivers/ata/ahci.c
parentdc87c3985e9b442c60994308a96f887579addc39 (diff)
libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it. ata_wait_ready() which directly takes @deadline is implemented to be used as the wait function. This patch is in preparation for EH timing improvements. * ata_wait_ready() never does busy sleep. It's only used from EH and no wait in EH is that urgent. This function also prints 'be patient' message automatically after 5 secs of waiting if more than 3 secs is remaining till deadline. * ata_bus_post_reset() now fails with error code if any of its wait fails. This is important because earlier reset tries will have shorter timeout than the spec requires. If a device fails to respond before the short timeout, reset should be retried with longer timeout rather than silently ignoring the device. There are three behavior differences. 1. Timeout is applied to both devices at once, not separately. This is more consistent with what the spec says. 2. When a device passes devchk but fails to become ready before deadline. Previouly, post_reset would just succeed and let device classification remove the device. New code fails the reset thus causing reset retry. After a few times, EH will give up disabling the port. 3. When slave device passes devchk but fails to become accessible (TF-wise) after reset. Original code disables dev1 after 30s timeout and continues as if the device doesn't exist, while the patched code fails reset. When this happens, new code fails reset on whole port rather than proceeding with only the primary device. If the failing device is suffering transient problems, new code retries reset which is a better behavior. If the failing device is actually broken, the net effect is identical to it, but not to the other device sharing the channel. In the previous code, reset would have succeeded after 30s thus detecting the working one. In the new code, reset fails and whole port gets disabled. IMO, it's a pathological case anyway (broken device sharing bus with working one) and doesn't really matter. * ata_bus_softreset() is changed to return error code from ata_bus_post_reset(). It used to return 0 unconditionally. * Spin up waiting is to be removed and not converted to honor deadline. * To be on the safe side, deadline is set to 40s for the time being. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r--drivers/ata/ahci.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 34c5534ed64c..0319f10d42d5 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -874,7 +874,8 @@ static int ahci_clo(struct ata_port *ap)
874 return 0; 874 return 0;
875} 875}
876 876
877static int ahci_softreset(struct ata_port *ap, unsigned int *class) 877static int ahci_softreset(struct ata_port *ap, unsigned int *class,
878 unsigned long deadline)
878{ 879{
879 struct ahci_port_priv *pp = ap->private_data; 880 struct ahci_port_priv *pp = ap->private_data;
880 void __iomem *port_mmio = ahci_port_base(ap); 881 void __iomem *port_mmio = ahci_port_base(ap);
@@ -961,8 +962,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
961 962
962 *class = ATA_DEV_NONE; 963 *class = ATA_DEV_NONE;
963 if (ata_port_online(ap)) { 964 if (ata_port_online(ap)) {
964 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { 965 rc = ata_wait_ready(ap, deadline);
965 rc = -EIO; 966 if (rc && rc != -ENODEV) {
966 reason = "device not ready"; 967 reason = "device not ready";
967 goto fail; 968 goto fail;
968 } 969 }
@@ -979,7 +980,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
979 return rc; 980 return rc;
980} 981}
981 982
982static int ahci_hardreset(struct ata_port *ap, unsigned int *class) 983static int ahci_hardreset(struct ata_port *ap, unsigned int *class,
984 unsigned long deadline)
983{ 985{
984 struct ahci_port_priv *pp = ap->private_data; 986 struct ahci_port_priv *pp = ap->private_data;
985 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; 987 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
@@ -995,7 +997,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
995 tf.command = 0x80; 997 tf.command = 0x80;
996 ata_tf_to_fis(&tf, d2h_fis, 0); 998 ata_tf_to_fis(&tf, d2h_fis, 0);
997 999
998 rc = sata_std_hardreset(ap, class); 1000 rc = sata_std_hardreset(ap, class, deadline);
999 1001
1000 ahci_start_engine(ap); 1002 ahci_start_engine(ap);
1001 1003
@@ -1008,7 +1010,8 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
1008 return rc; 1010 return rc;
1009} 1011}
1010 1012
1011static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class) 1013static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class,
1014 unsigned long deadline)
1012{ 1015{
1013 int rc; 1016 int rc;
1014 1017
@@ -1016,7 +1019,8 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class)
1016 1019
1017 ahci_stop_engine(ap); 1020 ahci_stop_engine(ap);
1018 1021
1019 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context)); 1022 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context),
1023 deadline);
1020 1024
1021 /* vt8251 needs SError cleared for the port to operate */ 1025 /* vt8251 needs SError cleared for the port to operate */
1022 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR)); 1026 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR));