diff options
author | Matthew Garrett <mjg@redhat.com> | 2011-03-11 16:12:18 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2011-03-22 23:51:59 -0400 |
commit | f17d9cbf20c4734c4199caa6dee87047f2f8278f (patch) | |
tree | e0392f20c36d010aff18b2e705d07eaac4231852 /drivers/acpi | |
parent | 521cb40b0c44418a4fd36dc633f575813d59a43d (diff) |
ACPICA: Fix access width for reset vector
Section 4.7.3.6 of the ACPI specification requires that the register width
of the reset vector be 8 bits. Windows simply hardcodes the access to be
a byte and ignores the width provided in the FADT, so make sure that we
do the same.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi')
-rw-r--r-- | drivers/acpi/acpica/hwxface.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c index 6f98d210e71c..f75f81ad15c9 100644 --- a/drivers/acpi/acpica/hwxface.c +++ b/drivers/acpi/acpica/hwxface.c | |||
@@ -80,14 +80,14 @@ acpi_status acpi_reset(void) | |||
80 | 80 | ||
81 | if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { | 81 | if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { |
82 | /* | 82 | /* |
83 | * For I/O space, write directly to the OSL. This bypasses the port | 83 | * For I/O space, write directly to the OSL. This |
84 | * validation mechanism, which may block a valid write to the reset | 84 | * bypasses the port validation mechanism, which may |
85 | * register. | 85 | * block a valid write to the reset register. Spec |
86 | * section 4.7.3.6 requires register width to be 8. | ||
86 | */ | 87 | */ |
87 | status = | 88 | status = |
88 | acpi_os_write_port((acpi_io_address) reset_reg->address, | 89 | acpi_os_write_port((acpi_io_address) reset_reg->address, |
89 | acpi_gbl_FADT.reset_value, | 90 | acpi_gbl_FADT.reset_value, 8); |
90 | reset_reg->bit_width); | ||
91 | } else { | 91 | } else { |
92 | /* Write the reset value to the reset register */ | 92 | /* Write the reset value to the reset register */ |
93 | 93 | ||