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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2009-04-06 21:51:29 -0400
committerLen Brown <len.brown@intel.com>2009-04-07 18:17:51 -0400
commitdb954b5898dd3ef3ef93f4144158ea8f97deb058 (patch)
tree781b62baa5aa262fca99198ba326e5e9cc44b26a /drivers/acpi/processor_idle.c
parent577c9c456f0e1371cbade38eaf91ae8e8a308555 (diff)
x86 ACPI: Add support for Always Running APIC timer
Add support for Always Running APIC timer, CPUID_0x6_EAX_Bit2. This bit means the APIC timer continues to run even when CPU is in deep C-states. The advantage is that we can use LAPIC timer on these CPUs always, and there is no need for "slow to read and program" external timers (HPET/PIT) and the timer broadcast logic and related code in C-state entry and exit. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/processor_idle.c')
-rw-r--r--drivers/acpi/processor_idle.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 4e6e758bd397..6fe121434ffb 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -145,6 +145,9 @@ static void acpi_timer_check_state(int state, struct acpi_processor *pr,
145 struct acpi_processor_power *pwr = &pr->power; 145 struct acpi_processor_power *pwr = &pr->power;
146 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 146 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
147 147
148 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
149 return;
150
148 /* 151 /*
149 * Check, if one of the previous states already marked the lapic 152 * Check, if one of the previous states already marked the lapic
150 * unstable 153 * unstable