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authorAndreas Mohr <[andi@rhlx01.fht-esslingen.de]>2006-06-26 15:58:00 -0400
committerLen Brown <len.brown@intel.com>2006-06-28 03:27:02 -0400
commitb488f02156d3deb08f5ad7816d565c370a8cc6f1 (patch)
tree7ba4c86b66451780a39c28b618dcfa8037584cb2 /drivers/acpi/processor_idle.c
parent95b38b3f453c16de0f8cddcde3e71050bbfb37b9 (diff)
ACPI: restore comment justifying 'extra' P_LVLx access
While trying to look for superfluous I/O accesses that can be optimized away, I stumbled upon this ACPI sleep I/O access and couldn't figure out why the hell this dummy op was necessary. After more than one hour of internet research, I had collected a sufficient number of documents (among those very old kernel versions) that finally told me what this dummy read was about: STPCLK# doesn't get asserted in time on (some) chipsets, which is why we need to have a dummy I/O read to delay further instruction processing until the CPU is fully stopped. Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/processor_idle.c')
-rw-r--r--drivers/acpi/processor_idle.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 89d3fd4c3cd2..5551bfbc47aa 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -365,7 +365,9 @@ static void acpi_processor_idle(void)
365 t1 = inl(acpi_fadt.xpm_tmr_blk.address); 365 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
366 /* Invoke C2 */ 366 /* Invoke C2 */
367 inb(cx->address); 367 inb(cx->address);
368 /* Dummy op - must do something useless after P_LVL2 read */ 368 /* Dummy wait op - must do something useless after P_LVL2 read
369 because chipsets cannot guarantee that STPCLK# signal
370 gets asserted in time to freeze execution properly. */
369 t2 = inl(acpi_fadt.xpm_tmr_blk.address); 371 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
370 /* Get end time (ticks) */ 372 /* Get end time (ticks) */
371 t2 = inl(acpi_fadt.xpm_tmr_blk.address); 373 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
@@ -403,7 +405,7 @@ static void acpi_processor_idle(void)
403 t1 = inl(acpi_fadt.xpm_tmr_blk.address); 405 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
404 /* Invoke C3 */ 406 /* Invoke C3 */
405 inb(cx->address); 407 inb(cx->address);
406 /* Dummy op - must do something useless after P_LVL3 read */ 408 /* Dummy wait op (see above) */
407 t2 = inl(acpi_fadt.xpm_tmr_blk.address); 409 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
408 /* Get end time (ticks) */ 410 /* Get end time (ticks) */
409 t2 = inl(acpi_fadt.xpm_tmr_blk.address); 411 t2 = inl(acpi_fadt.xpm_tmr_blk.address);