diff options
author | Len Brown <len.brown@intel.com> | 2007-07-22 02:27:40 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2007-07-22 02:27:40 -0400 |
commit | f79e3185dd0f8650022518d7624c876d8929061b (patch) | |
tree | 4cec3a434036031b4e2d4fef608f5523fb21c829 /drivers/acpi/processor_idle.c | |
parent | e8b495fe09bc793ae26774e7b2667f7f658d56e2 (diff) | |
parent | 8b8eb7d8cfc6cd95ed00cd58754e8493322505bd (diff) |
Pull misc into release branch
Conflicts:
Documentation/feature-removal-schedule.txt
Diffstat (limited to 'drivers/acpi/processor_idle.c')
-rw-r--r-- | drivers/acpi/processor_idle.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index bb5d23be4260..a898991f77cb 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c | |||
@@ -490,7 +490,17 @@ static void acpi_processor_idle(void) | |||
490 | 490 | ||
491 | case ACPI_STATE_C3: | 491 | case ACPI_STATE_C3: |
492 | 492 | ||
493 | if (pr->flags.bm_check) { | 493 | /* |
494 | * disable bus master | ||
495 | * bm_check implies we need ARB_DIS | ||
496 | * !bm_check implies we need cache flush | ||
497 | * bm_control implies whether we can do ARB_DIS | ||
498 | * | ||
499 | * That leaves a case where bm_check is set and bm_control is | ||
500 | * not set. In that case we cannot do much, we enter C3 | ||
501 | * without doing anything. | ||
502 | */ | ||
503 | if (pr->flags.bm_check && pr->flags.bm_control) { | ||
494 | if (atomic_inc_return(&c3_cpu_count) == | 504 | if (atomic_inc_return(&c3_cpu_count) == |
495 | num_online_cpus()) { | 505 | num_online_cpus()) { |
496 | /* | 506 | /* |
@@ -499,7 +509,7 @@ static void acpi_processor_idle(void) | |||
499 | */ | 509 | */ |
500 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); | 510 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); |
501 | } | 511 | } |
502 | } else { | 512 | } else if (!pr->flags.bm_check) { |
503 | /* SMP with no shared cache... Invalidate cache */ | 513 | /* SMP with no shared cache... Invalidate cache */ |
504 | ACPI_FLUSH_CPU_CACHE(); | 514 | ACPI_FLUSH_CPU_CACHE(); |
505 | } | 515 | } |
@@ -511,7 +521,7 @@ static void acpi_processor_idle(void) | |||
511 | acpi_cstate_enter(cx); | 521 | acpi_cstate_enter(cx); |
512 | /* Get end time (ticks) */ | 522 | /* Get end time (ticks) */ |
513 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); | 523 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
514 | if (pr->flags.bm_check) { | 524 | if (pr->flags.bm_check && pr->flags.bm_control) { |
515 | /* Enable bus master arbitration */ | 525 | /* Enable bus master arbitration */ |
516 | atomic_dec(&c3_cpu_count); | 526 | atomic_dec(&c3_cpu_count); |
517 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); | 527 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); |
@@ -961,9 +971,9 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr, | |||
961 | if (pr->flags.bm_check) { | 971 | if (pr->flags.bm_check) { |
962 | /* bus mastering control is necessary */ | 972 | /* bus mastering control is necessary */ |
963 | if (!pr->flags.bm_control) { | 973 | if (!pr->flags.bm_control) { |
974 | /* In this case we enter C3 without bus mastering */ | ||
964 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | 975 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
965 | "C3 support requires bus mastering control\n")); | 976 | "C3 support without bus mastering control\n")); |
966 | return; | ||
967 | } | 977 | } |
968 | } else { | 978 | } else { |
969 | /* | 979 | /* |