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authorLen Brown <len.brown@intel.com>2011-03-23 02:34:15 -0400
committerLen Brown <len.brown@intel.com>2011-03-23 02:34:15 -0400
commitf7f28f7e8c42c67c4bce24415c6cd6da222a1798 (patch)
treebcfeea0ca42e17c04d119b5bfb086fbf112903ca /drivers/acpi/acpica
parent5c129a8600100a5d0f5fdbc1014c5dba1d307bc4 (diff)
parent95cf3e12e7f659e536215b37c67d46f3e2ce95cc (diff)
Merge branch 'reset' into release
Diffstat (limited to 'drivers/acpi/acpica')
-rw-r--r--drivers/acpi/acpica/hwxface.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index 6f98d210e71c..f75f81ad15c9 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -80,14 +80,14 @@ acpi_status acpi_reset(void)
80 80
81 if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { 81 if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
82 /* 82 /*
83 * For I/O space, write directly to the OSL. This bypasses the port 83 * For I/O space, write directly to the OSL. This
84 * validation mechanism, which may block a valid write to the reset 84 * bypasses the port validation mechanism, which may
85 * register. 85 * block a valid write to the reset register. Spec
86 * section 4.7.3.6 requires register width to be 8.
86 */ 87 */
87 status = 88 status =
88 acpi_os_write_port((acpi_io_address) reset_reg->address, 89 acpi_os_write_port((acpi_io_address) reset_reg->address,
89 acpi_gbl_FADT.reset_value, 90 acpi_gbl_FADT.reset_value, 8);
90 reset_reg->bit_width);
91 } else { 91 } else {
92 /* Write the reset value to the reset register */ 92 /* Write the reset value to the reset register */
93 93