diff options
author | Bob Moore <robert.moore@intel.com> | 2009-02-18 01:36:05 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2009-03-26 16:38:26 -0400 |
commit | 32c9ef994d91352b710b948ec369cd18d6bca51b (patch) | |
tree | d915c0c472f8d99fc2ebd8bd4ef8533489f2232d /drivers/acpi/acpica | |
parent | 82d79b86646504a0ab97fe50ac137df65f651a27 (diff) |
ACPICA: Add function to handle PM1 control registers
Added acpi_hw_write_pm1_control. This function writes both of the PM1
control registers (A/B). These registers are different than than
the PM1 A/B status and enable registers in that different values
can be written to the A/B registers. Most notably, the SLP_TYP
bits can be different, as per the values returned from the _Sx
predefined methods.
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/acpica')
-rw-r--r-- | drivers/acpi/acpica/achware.h | 5 | ||||
-rw-r--r-- | drivers/acpi/acpica/aclocal.h | 10 | ||||
-rw-r--r-- | drivers/acpi/acpica/hwregs.c | 46 | ||||
-rw-r--r-- | drivers/acpi/acpica/hwsleep.c | 84 |
4 files changed, 78 insertions, 67 deletions
diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h index 58c69dc49ab4..4fa6ee6b1f7c 100644 --- a/drivers/acpi/acpica/achware.h +++ b/drivers/acpi/acpica/achware.h | |||
@@ -64,8 +64,9 @@ u32 acpi_hw_get_mode(void); | |||
64 | */ | 64 | */ |
65 | struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id); | 65 | struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id); |
66 | 66 | ||
67 | acpi_status | 67 | acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control); |
68 | acpi_hw_register_read(u32 register_id, u32 * return_value); | 68 | |
69 | acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value); | ||
69 | 70 | ||
70 | acpi_status acpi_hw_register_write(u32 register_id, u32 value); | 71 | acpi_status acpi_hw_register_write(u32 register_id, u32 value); |
71 | 72 | ||
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h index b9a0aa67ab10..6feebc8f789a 100644 --- a/drivers/acpi/acpica/aclocal.h +++ b/drivers/acpi/acpica/aclocal.h | |||
@@ -781,12 +781,10 @@ struct acpi_bit_register_info { | |||
781 | #define ACPI_REGISTER_PM1_STATUS 0x01 | 781 | #define ACPI_REGISTER_PM1_STATUS 0x01 |
782 | #define ACPI_REGISTER_PM1_ENABLE 0x02 | 782 | #define ACPI_REGISTER_PM1_ENABLE 0x02 |
783 | #define ACPI_REGISTER_PM1_CONTROL 0x03 | 783 | #define ACPI_REGISTER_PM1_CONTROL 0x03 |
784 | #define ACPI_REGISTER_PM1A_CONTROL 0x04 | 784 | #define ACPI_REGISTER_PM2_CONTROL 0x04 |
785 | #define ACPI_REGISTER_PM1B_CONTROL 0x05 | 785 | #define ACPI_REGISTER_PM_TIMER 0x05 |
786 | #define ACPI_REGISTER_PM2_CONTROL 0x06 | 786 | #define ACPI_REGISTER_PROCESSOR_BLOCK 0x06 |
787 | #define ACPI_REGISTER_PM_TIMER 0x07 | 787 | #define ACPI_REGISTER_SMI_COMMAND_BLOCK 0x07 |
788 | #define ACPI_REGISTER_PROCESSOR_BLOCK 0x08 | ||
789 | #define ACPI_REGISTER_SMI_COMMAND_BLOCK 0x09 | ||
790 | 788 | ||
791 | /* Masks used to access the bit_registers */ | 789 | /* Masks used to access the bit_registers */ |
792 | 790 | ||
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c index 5a64e577975f..edc627c9fc0d 100644 --- a/drivers/acpi/acpica/hwregs.c +++ b/drivers/acpi/acpica/hwregs.c | |||
@@ -131,6 +131,42 @@ struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id) | |||
131 | 131 | ||
132 | /****************************************************************************** | 132 | /****************************************************************************** |
133 | * | 133 | * |
134 | * FUNCTION: acpi_hw_write_pm1_control | ||
135 | * | ||
136 | * PARAMETERS: pm1a_control - Value to be written to PM1A control | ||
137 | * pm1b_control - Value to be written to PM1B control | ||
138 | * | ||
139 | * RETURN: Status | ||
140 | * | ||
141 | * DESCRIPTION: Write the PM1 A/B control registers. These registers are | ||
142 | * different than than the PM1 A/B status and enable registers | ||
143 | * in that different values can be written to the A/B registers. | ||
144 | * Most notably, the SLP_TYP bits can be different, as per the | ||
145 | * values returned from the _Sx predefined methods. | ||
146 | * | ||
147 | ******************************************************************************/ | ||
148 | |||
149 | acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control) | ||
150 | { | ||
151 | acpi_status status; | ||
152 | |||
153 | ACPI_FUNCTION_TRACE(hw_write_pm1_control); | ||
154 | |||
155 | status = acpi_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block); | ||
156 | if (ACPI_FAILURE(status)) { | ||
157 | return_ACPI_STATUS(status); | ||
158 | } | ||
159 | |||
160 | if (acpi_gbl_FADT.xpm1b_control_block.address) { | ||
161 | status = | ||
162 | acpi_write(pm1b_control, | ||
163 | &acpi_gbl_FADT.xpm1b_control_block); | ||
164 | } | ||
165 | return_ACPI_STATUS(status); | ||
166 | } | ||
167 | |||
168 | /****************************************************************************** | ||
169 | * | ||
134 | * FUNCTION: acpi_hw_register_read | 170 | * FUNCTION: acpi_hw_register_read |
135 | * | 171 | * |
136 | * PARAMETERS: register_id - ACPI Register ID | 172 | * PARAMETERS: register_id - ACPI Register ID |
@@ -295,16 +331,6 @@ acpi_status acpi_hw_register_write(u32 register_id, u32 value) | |||
295 | xpm1b_control_block); | 331 | xpm1b_control_block); |
296 | break; | 332 | break; |
297 | 333 | ||
298 | case ACPI_REGISTER_PM1A_CONTROL: /* 16-bit access */ | ||
299 | |||
300 | status = acpi_write(value, &acpi_gbl_FADT.xpm1a_control_block); | ||
301 | break; | ||
302 | |||
303 | case ACPI_REGISTER_PM1B_CONTROL: /* 16-bit access */ | ||
304 | |||
305 | status = acpi_write(value, &acpi_gbl_FADT.xpm1b_control_block); | ||
306 | break; | ||
307 | |||
308 | case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ | 334 | case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ |
309 | 335 | ||
310 | status = acpi_write(value, &acpi_gbl_FADT.xpm2_control_block); | 336 | status = acpi_write(value, &acpi_gbl_FADT.xpm2_control_block); |
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c index 1a7d260f7826..51868f48159c 100644 --- a/drivers/acpi/acpica/hwsleep.c +++ b/drivers/acpi/acpica/hwsleep.c | |||
@@ -147,9 +147,8 @@ acpi_status acpi_enter_sleep_state_prep(u8 sleep_state) | |||
147 | 147 | ||
148 | ACPI_FUNCTION_TRACE(acpi_enter_sleep_state_prep); | 148 | ACPI_FUNCTION_TRACE(acpi_enter_sleep_state_prep); |
149 | 149 | ||
150 | /* | 150 | /* _PSW methods could be run here to enable wake-on keyboard, LAN, etc. */ |
151 | * _PSW methods could be run here to enable wake-on keyboard, LAN, etc. | 151 | |
152 | */ | ||
153 | status = acpi_get_sleep_type_data(sleep_state, | 152 | status = acpi_get_sleep_type_data(sleep_state, |
154 | &acpi_gbl_sleep_type_a, | 153 | &acpi_gbl_sleep_type_a, |
155 | &acpi_gbl_sleep_type_b); | 154 | &acpi_gbl_sleep_type_b); |
@@ -223,8 +222,8 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state_prep) | |||
223 | ******************************************************************************/ | 222 | ******************************************************************************/ |
224 | acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state) | 223 | acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state) |
225 | { | 224 | { |
226 | u32 PM1Acontrol; | 225 | u32 pm1a_control; |
227 | u32 PM1Bcontrol; | 226 | u32 pm1b_control; |
228 | struct acpi_bit_register_info *sleep_type_reg_info; | 227 | struct acpi_bit_register_info *sleep_type_reg_info; |
229 | struct acpi_bit_register_info *sleep_enable_reg_info; | 228 | struct acpi_bit_register_info *sleep_enable_reg_info; |
230 | u32 in_value; | 229 | u32 in_value; |
@@ -289,24 +288,25 @@ acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state) | |||
289 | 288 | ||
290 | /* Get current value of PM1A control */ | 289 | /* Get current value of PM1A control */ |
291 | 290 | ||
292 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, &PM1Acontrol); | 291 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, |
292 | &pm1a_control); | ||
293 | if (ACPI_FAILURE(status)) { | 293 | if (ACPI_FAILURE(status)) { |
294 | return_ACPI_STATUS(status); | 294 | return_ACPI_STATUS(status); |
295 | } | 295 | } |
296 | ACPI_DEBUG_PRINT((ACPI_DB_INIT, | 296 | ACPI_DEBUG_PRINT((ACPI_DB_INIT, |
297 | "Entering sleep state [S%d]\n", sleep_state)); | 297 | "Entering sleep state [S%d]\n", sleep_state)); |
298 | 298 | ||
299 | /* Clear SLP_EN and SLP_TYP fields */ | 299 | /* Clear the SLP_EN and SLP_TYP fields */ |
300 | 300 | ||
301 | PM1Acontrol &= ~(sleep_type_reg_info->access_bit_mask | | 301 | pm1a_control &= ~(sleep_type_reg_info->access_bit_mask | |
302 | sleep_enable_reg_info->access_bit_mask); | 302 | sleep_enable_reg_info->access_bit_mask); |
303 | PM1Bcontrol = PM1Acontrol; | 303 | pm1b_control = pm1a_control; |
304 | 304 | ||
305 | /* Insert SLP_TYP bits */ | 305 | /* Insert the SLP_TYP bits */ |
306 | 306 | ||
307 | PM1Acontrol |= | 307 | pm1a_control |= |
308 | (acpi_gbl_sleep_type_a << sleep_type_reg_info->bit_position); | 308 | (acpi_gbl_sleep_type_a << sleep_type_reg_info->bit_position); |
309 | PM1Bcontrol |= | 309 | pm1b_control |= |
310 | (acpi_gbl_sleep_type_b << sleep_type_reg_info->bit_position); | 310 | (acpi_gbl_sleep_type_b << sleep_type_reg_info->bit_position); |
311 | 311 | ||
312 | /* | 312 | /* |
@@ -314,37 +314,25 @@ acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state) | |||
314 | * poorly implemented hardware. | 314 | * poorly implemented hardware. |
315 | */ | 315 | */ |
316 | 316 | ||
317 | /* Write #1: fill in SLP_TYP data */ | 317 | /* Write #1: write the SLP_TYP data to the PM1 Control registers */ |
318 | |||
319 | status = acpi_hw_register_write(ACPI_REGISTER_PM1A_CONTROL, | ||
320 | PM1Acontrol); | ||
321 | if (ACPI_FAILURE(status)) { | ||
322 | return_ACPI_STATUS(status); | ||
323 | } | ||
324 | 318 | ||
325 | status = acpi_hw_register_write(ACPI_REGISTER_PM1B_CONTROL, | 319 | status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control); |
326 | PM1Bcontrol); | ||
327 | if (ACPI_FAILURE(status)) { | 320 | if (ACPI_FAILURE(status)) { |
328 | return_ACPI_STATUS(status); | 321 | return_ACPI_STATUS(status); |
329 | } | 322 | } |
330 | 323 | ||
331 | /* Insert SLP_ENABLE bit */ | 324 | /* Insert the sleep enable (SLP_EN) bit */ |
332 | 325 | ||
333 | PM1Acontrol |= sleep_enable_reg_info->access_bit_mask; | 326 | pm1a_control |= sleep_enable_reg_info->access_bit_mask; |
334 | PM1Bcontrol |= sleep_enable_reg_info->access_bit_mask; | 327 | pm1b_control |= sleep_enable_reg_info->access_bit_mask; |
335 | 328 | ||
336 | /* Write #2: SLP_TYP + SLP_EN */ | 329 | /* Flush caches, as per ACPI specification */ |
337 | 330 | ||
338 | ACPI_FLUSH_CPU_CACHE(); | 331 | ACPI_FLUSH_CPU_CACHE(); |
339 | 332 | ||
340 | status = acpi_hw_register_write(ACPI_REGISTER_PM1A_CONTROL, | 333 | /* Write #2: Write both SLP_TYP + SLP_EN */ |
341 | PM1Acontrol); | ||
342 | if (ACPI_FAILURE(status)) { | ||
343 | return_ACPI_STATUS(status); | ||
344 | } | ||
345 | 334 | ||
346 | status = acpi_hw_register_write(ACPI_REGISTER_PM1B_CONTROL, | 335 | status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control); |
347 | PM1Bcontrol); | ||
348 | if (ACPI_FAILURE(status)) { | 336 | if (ACPI_FAILURE(status)) { |
349 | return_ACPI_STATUS(status); | 337 | return_ACPI_STATUS(status); |
350 | } | 338 | } |
@@ -471,8 +459,8 @@ acpi_status acpi_leave_sleep_state_prep(u8 sleep_state) | |||
471 | acpi_status status; | 459 | acpi_status status; |
472 | struct acpi_bit_register_info *sleep_type_reg_info; | 460 | struct acpi_bit_register_info *sleep_type_reg_info; |
473 | struct acpi_bit_register_info *sleep_enable_reg_info; | 461 | struct acpi_bit_register_info *sleep_enable_reg_info; |
474 | u32 PM1Acontrol; | 462 | u32 pm1a_control; |
475 | u32 PM1Bcontrol; | 463 | u32 pm1b_control; |
476 | 464 | ||
477 | ACPI_FUNCTION_TRACE(acpi_leave_sleep_state_prep); | 465 | ACPI_FUNCTION_TRACE(acpi_leave_sleep_state_prep); |
478 | 466 | ||
@@ -493,31 +481,29 @@ acpi_status acpi_leave_sleep_state_prep(u8 sleep_state) | |||
493 | /* Get current value of PM1A control */ | 481 | /* Get current value of PM1A control */ |
494 | 482 | ||
495 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, | 483 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, |
496 | &PM1Acontrol); | 484 | &pm1a_control); |
497 | if (ACPI_SUCCESS(status)) { | 485 | if (ACPI_SUCCESS(status)) { |
498 | 486 | ||
499 | /* Clear SLP_EN and SLP_TYP fields */ | 487 | /* Clear the SLP_EN and SLP_TYP fields */ |
500 | 488 | ||
501 | PM1Acontrol &= ~(sleep_type_reg_info->access_bit_mask | | 489 | pm1a_control &= ~(sleep_type_reg_info->access_bit_mask | |
502 | sleep_enable_reg_info-> | 490 | sleep_enable_reg_info-> |
503 | access_bit_mask); | 491 | access_bit_mask); |
504 | PM1Bcontrol = PM1Acontrol; | 492 | pm1b_control = pm1a_control; |
505 | 493 | ||
506 | /* Insert SLP_TYP bits */ | 494 | /* Insert the SLP_TYP bits */ |
507 | 495 | ||
508 | PM1Acontrol |= | 496 | pm1a_control |= |
509 | (acpi_gbl_sleep_type_a << sleep_type_reg_info-> | 497 | (acpi_gbl_sleep_type_a << sleep_type_reg_info-> |
510 | bit_position); | 498 | bit_position); |
511 | PM1Bcontrol |= | 499 | pm1b_control |= |
512 | (acpi_gbl_sleep_type_b << sleep_type_reg_info-> | 500 | (acpi_gbl_sleep_type_b << sleep_type_reg_info-> |
513 | bit_position); | 501 | bit_position); |
514 | 502 | ||
515 | /* Just ignore any errors */ | 503 | /* Write the control registers and ignore any errors */ |
516 | 504 | ||
517 | (void)acpi_hw_register_write(ACPI_REGISTER_PM1A_CONTROL, | 505 | (void)acpi_hw_write_pm1_control(pm1a_control, |
518 | PM1Acontrol); | 506 | pm1b_control); |
519 | (void)acpi_hw_register_write(ACPI_REGISTER_PM1B_CONTROL, | ||
520 | PM1Bcontrol); | ||
521 | } | 507 | } |
522 | } | 508 | } |
523 | 509 | ||