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authorBob Moore <robert.moore@intel.com>2009-02-18 01:36:05 -0500
committerLen Brown <len.brown@intel.com>2009-03-26 16:38:26 -0400
commit32c9ef994d91352b710b948ec369cd18d6bca51b (patch)
treed915c0c472f8d99fc2ebd8bd4ef8533489f2232d /drivers/acpi/acpica/hwregs.c
parent82d79b86646504a0ab97fe50ac137df65f651a27 (diff)
ACPICA: Add function to handle PM1 control registers
Added acpi_hw_write_pm1_control. This function writes both of the PM1 control registers (A/B). These registers are different than than the PM1 A/B status and enable registers in that different values can be written to the A/B registers. Most notably, the SLP_TYP bits can be different, as per the values returned from the _Sx predefined methods. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/acpica/hwregs.c')
-rw-r--r--drivers/acpi/acpica/hwregs.c46
1 files changed, 36 insertions, 10 deletions
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 5a64e577975f..edc627c9fc0d 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -131,6 +131,42 @@ struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
131 131
132/****************************************************************************** 132/******************************************************************************
133 * 133 *
134 * FUNCTION: acpi_hw_write_pm1_control
135 *
136 * PARAMETERS: pm1a_control - Value to be written to PM1A control
137 * pm1b_control - Value to be written to PM1B control
138 *
139 * RETURN: Status
140 *
141 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
142 * different than than the PM1 A/B status and enable registers
143 * in that different values can be written to the A/B registers.
144 * Most notably, the SLP_TYP bits can be different, as per the
145 * values returned from the _Sx predefined methods.
146 *
147 ******************************************************************************/
148
149acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
150{
151 acpi_status status;
152
153 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
154
155 status = acpi_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
156 if (ACPI_FAILURE(status)) {
157 return_ACPI_STATUS(status);
158 }
159
160 if (acpi_gbl_FADT.xpm1b_control_block.address) {
161 status =
162 acpi_write(pm1b_control,
163 &acpi_gbl_FADT.xpm1b_control_block);
164 }
165 return_ACPI_STATUS(status);
166}
167
168/******************************************************************************
169 *
134 * FUNCTION: acpi_hw_register_read 170 * FUNCTION: acpi_hw_register_read
135 * 171 *
136 * PARAMETERS: register_id - ACPI Register ID 172 * PARAMETERS: register_id - ACPI Register ID
@@ -295,16 +331,6 @@ acpi_status acpi_hw_register_write(u32 register_id, u32 value)
295 xpm1b_control_block); 331 xpm1b_control_block);
296 break; 332 break;
297 333
298 case ACPI_REGISTER_PM1A_CONTROL: /* 16-bit access */
299
300 status = acpi_write(value, &acpi_gbl_FADT.xpm1a_control_block);
301 break;
302
303 case ACPI_REGISTER_PM1B_CONTROL: /* 16-bit access */
304
305 status = acpi_write(value, &acpi_gbl_FADT.xpm1b_control_block);
306 break;
307
308 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 334 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
309 335
310 status = acpi_write(value, &acpi_gbl_FADT.xpm2_control_block); 336 status = acpi_write(value, &acpi_gbl_FADT.xpm2_control_block);