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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:42:53 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:42:53 -0400
commit83544ae9f3991bfc7d5e0fe9a3008cd05a8d57b7 (patch)
treebc4b28c2e5bdae01a2c8a250176fcdac6ae7a8ce /crypto/async_tx/async_memcpy.c
parent9308add6ea4fedeba37b0d7c4630a542bd34f214 (diff)
dmaengine, async_tx: support alignment checks
Some engines have transfer size and address alignment restrictions. Add a per-operation alignment property to struct dma_device that the async routines and dmatest can use to check alignment capabilities. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'crypto/async_tx/async_memcpy.c')
-rw-r--r--crypto/async_tx/async_memcpy.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/crypto/async_tx/async_memcpy.c b/crypto/async_tx/async_memcpy.c
index b38cbb3fd527..0ec1fb69d4ea 100644
--- a/crypto/async_tx/async_memcpy.c
+++ b/crypto/async_tx/async_memcpy.c
@@ -50,7 +50,7 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
50 struct dma_device *device = chan ? chan->device : NULL; 50 struct dma_device *device = chan ? chan->device : NULL;
51 struct dma_async_tx_descriptor *tx = NULL; 51 struct dma_async_tx_descriptor *tx = NULL;
52 52
53 if (device) { 53 if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
54 dma_addr_t dma_dest, dma_src; 54 dma_addr_t dma_dest, dma_src;
55 unsigned long dma_prep_flags = 0; 55 unsigned long dma_prep_flags = 0;
56 56