diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-07 17:55:31 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-07 17:55:31 -0500 |
commit | d004e4d3322340b6433caaef4a47ab8c933afb70 (patch) | |
tree | f9ba6e6cb960fddb09da7c322d4b1dcb3f4b0e6f /arch | |
parent | 128283a47e7cc6754db3d2704004c1ed728d26db (diff) | |
parent | 1c2a48cf65580a276552151eb8f78d78c55b828e (diff) |
Merge branch 'x86-apic-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-apic-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: apic: Cleanup and simplify setup_local_APIC()
x86: Further simplify mp_irq info handling
x86: Unify 3 similar ways of saving mp_irqs info
x86, ioapic: Avoid writing io_apic id if already correct
x86, x2apic: Don't map lapic addr for preenabled x2apic systems
x86, sfi: Use register_lapic_address()
x86, apic: Use register_lapic_address() in init_apic_mapping()
x86, apic: Remove early_init_lapic_mapping()
x86, apic: Unify identical register_lapic_address() functions
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/include/asm/apic.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/io_apic.h | 3 | ||||
-rw-r--r-- | arch/x86/kernel/acpi/boot.c | 48 | ||||
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 64 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 28 | ||||
-rw-r--r-- | arch/x86/kernel/mpparse.c | 114 | ||||
-rw-r--r-- | arch/x86/mm/amdtopology_64.c | 1 | ||||
-rw-r--r-- | arch/x86/platform/mrst/mrst.c | 30 | ||||
-rw-r--r-- | arch/x86/platform/sfi/sfi.c | 13 |
9 files changed, 75 insertions, 228 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index cf12007796db..5e3969c36d7f 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -234,6 +234,7 @@ extern void init_bsp_APIC(void); | |||
234 | extern void setup_local_APIC(void); | 234 | extern void setup_local_APIC(void); |
235 | extern void end_local_APIC_setup(void); | 235 | extern void end_local_APIC_setup(void); |
236 | extern void init_apic_mappings(void); | 236 | extern void init_apic_mappings(void); |
237 | void register_lapic_address(unsigned long address); | ||
237 | extern void setup_boot_APIC_clock(void); | 238 | extern void setup_boot_APIC_clock(void); |
238 | extern void setup_secondary_APIC_clock(void); | 239 | extern void setup_secondary_APIC_clock(void); |
239 | extern int APIC_init_uniprocessor(void); | 240 | extern int APIC_init_uniprocessor(void); |
@@ -244,7 +245,6 @@ extern int apic_force_enable(void); | |||
244 | * On 32bit this is mach-xxx local | 245 | * On 32bit this is mach-xxx local |
245 | */ | 246 | */ |
246 | #ifdef CONFIG_X86_64 | 247 | #ifdef CONFIG_X86_64 |
247 | extern void early_init_lapic_mapping(void); | ||
248 | extern int apic_is_clustered_box(void); | 248 | extern int apic_is_clustered_box(void); |
249 | #else | 249 | #else |
250 | static inline int apic_is_clustered_box(void) | 250 | static inline int apic_is_clustered_box(void) |
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 0c5ca4e30d7b..f327d386d6cc 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -169,6 +169,7 @@ extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); | |||
169 | extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); | 169 | extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); |
170 | 170 | ||
171 | extern int get_nr_irqs_gsi(void); | 171 | extern int get_nr_irqs_gsi(void); |
172 | |||
172 | extern void setup_ioapic_ids_from_mpc(void); | 173 | extern void setup_ioapic_ids_from_mpc(void); |
173 | extern void setup_ioapic_ids_from_mpc_nocheck(void); | 174 | extern void setup_ioapic_ids_from_mpc_nocheck(void); |
174 | 175 | ||
@@ -183,6 +184,8 @@ int mp_find_ioapic_pin(int ioapic, u32 gsi); | |||
183 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); | 184 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); |
184 | extern void __init pre_init_apic_IRQ0(void); | 185 | extern void __init pre_init_apic_IRQ0(void); |
185 | 186 | ||
187 | extern void mp_save_irq(struct mpc_intsrc *m); | ||
188 | |||
186 | #else /* !CONFIG_X86_IO_APIC */ | 189 | #else /* !CONFIG_X86_IO_APIC */ |
187 | 190 | ||
188 | #define io_apic_assign_pci_irqs 0 | 191 | #define io_apic_assign_pci_irqs 0 |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 17c8090fabd4..ec881c6bfee0 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -852,18 +852,6 @@ static int __init acpi_parse_fadt(struct acpi_table_header *table) | |||
852 | * returns 0 on success, < 0 on error | 852 | * returns 0 on success, < 0 on error |
853 | */ | 853 | */ |
854 | 854 | ||
855 | static void __init acpi_register_lapic_address(unsigned long address) | ||
856 | { | ||
857 | mp_lapic_addr = address; | ||
858 | |||
859 | set_fixmap_nocache(FIX_APIC_BASE, address); | ||
860 | if (boot_cpu_physical_apicid == -1U) { | ||
861 | boot_cpu_physical_apicid = read_apic_id(); | ||
862 | apic_version[boot_cpu_physical_apicid] = | ||
863 | GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
864 | } | ||
865 | } | ||
866 | |||
867 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) | 855 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
868 | { | 856 | { |
869 | int count; | 857 | int count; |
@@ -885,7 +873,7 @@ static int __init early_acpi_parse_madt_lapic_addr_ovr(void) | |||
885 | return count; | 873 | return count; |
886 | } | 874 | } |
887 | 875 | ||
888 | acpi_register_lapic_address(acpi_lapic_addr); | 876 | register_lapic_address(acpi_lapic_addr); |
889 | 877 | ||
890 | return count; | 878 | return count; |
891 | } | 879 | } |
@@ -912,7 +900,7 @@ static int __init acpi_parse_madt_lapic_entries(void) | |||
912 | return count; | 900 | return count; |
913 | } | 901 | } |
914 | 902 | ||
915 | acpi_register_lapic_address(acpi_lapic_addr); | 903 | register_lapic_address(acpi_lapic_addr); |
916 | 904 | ||
917 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, | 905 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
918 | acpi_parse_sapic, MAX_LOCAL_APIC); | 906 | acpi_parse_sapic, MAX_LOCAL_APIC); |
@@ -954,32 +942,6 @@ static int __init acpi_parse_madt_lapic_entries(void) | |||
954 | extern int es7000_plat; | 942 | extern int es7000_plat; |
955 | #endif | 943 | #endif |
956 | 944 | ||
957 | static void assign_to_mp_irq(struct mpc_intsrc *m, | ||
958 | struct mpc_intsrc *mp_irq) | ||
959 | { | ||
960 | memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); | ||
961 | } | ||
962 | |||
963 | static int mp_irq_cmp(struct mpc_intsrc *mp_irq, | ||
964 | struct mpc_intsrc *m) | ||
965 | { | ||
966 | return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); | ||
967 | } | ||
968 | |||
969 | static void save_mp_irq(struct mpc_intsrc *m) | ||
970 | { | ||
971 | int i; | ||
972 | |||
973 | for (i = 0; i < mp_irq_entries; i++) { | ||
974 | if (!mp_irq_cmp(&mp_irqs[i], m)) | ||
975 | return; | ||
976 | } | ||
977 | |||
978 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | ||
979 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | ||
980 | panic("Max # of irq sources exceeded!!\n"); | ||
981 | } | ||
982 | |||
983 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) | 945 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
984 | { | 946 | { |
985 | int ioapic; | 947 | int ioapic; |
@@ -1010,7 +972,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) | |||
1010 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ | 972 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ |
1011 | mp_irq.dstirq = pin; /* INTIN# */ | 973 | mp_irq.dstirq = pin; /* INTIN# */ |
1012 | 974 | ||
1013 | save_mp_irq(&mp_irq); | 975 | mp_save_irq(&mp_irq); |
1014 | 976 | ||
1015 | isa_irq_to_gsi[bus_irq] = gsi; | 977 | isa_irq_to_gsi[bus_irq] = gsi; |
1016 | } | 978 | } |
@@ -1085,7 +1047,7 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1085 | mp_irq.srcbusirq = i; /* Identity mapped */ | 1047 | mp_irq.srcbusirq = i; /* Identity mapped */ |
1086 | mp_irq.dstirq = pin; | 1048 | mp_irq.dstirq = pin; |
1087 | 1049 | ||
1088 | save_mp_irq(&mp_irq); | 1050 | mp_save_irq(&mp_irq); |
1089 | } | 1051 | } |
1090 | } | 1052 | } |
1091 | 1053 | ||
@@ -1122,7 +1084,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, | |||
1122 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; | 1084 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; |
1123 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | 1085 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); |
1124 | 1086 | ||
1125 | save_mp_irq(&mp_irq); | 1087 | mp_save_irq(&mp_irq); |
1126 | #endif | 1088 | #endif |
1127 | return 0; | 1089 | return 0; |
1128 | } | 1090 | } |
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 879999a5230f..ce65d449b750 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -1191,12 +1191,15 @@ static void __cpuinit lapic_setup_esr(void) | |||
1191 | oldvalue, value); | 1191 | oldvalue, value); |
1192 | } | 1192 | } |
1193 | 1193 | ||
1194 | |||
1195 | /** | 1194 | /** |
1196 | * setup_local_APIC - setup the local APIC | 1195 | * setup_local_APIC - setup the local APIC |
1196 | * | ||
1197 | * Used to setup local APIC while initializing BSP or bringin up APs. | ||
1198 | * Always called with preemption disabled. | ||
1197 | */ | 1199 | */ |
1198 | void __cpuinit setup_local_APIC(void) | 1200 | void __cpuinit setup_local_APIC(void) |
1199 | { | 1201 | { |
1202 | int cpu = smp_processor_id(); | ||
1200 | unsigned int value, queued; | 1203 | unsigned int value, queued; |
1201 | int i, j, acked = 0; | 1204 | int i, j, acked = 0; |
1202 | unsigned long long tsc = 0, ntsc; | 1205 | unsigned long long tsc = 0, ntsc; |
@@ -1221,8 +1224,6 @@ void __cpuinit setup_local_APIC(void) | |||
1221 | #endif | 1224 | #endif |
1222 | perf_events_lapic_init(); | 1225 | perf_events_lapic_init(); |
1223 | 1226 | ||
1224 | preempt_disable(); | ||
1225 | |||
1226 | /* | 1227 | /* |
1227 | * Double-check whether this APIC is really registered. | 1228 | * Double-check whether this APIC is really registered. |
1228 | * This is meaningless in clustered apic mode, so we skip it. | 1229 | * This is meaningless in clustered apic mode, so we skip it. |
@@ -1338,21 +1339,19 @@ void __cpuinit setup_local_APIC(void) | |||
1338 | * TODO: set up through-local-APIC from through-I/O-APIC? --macro | 1339 | * TODO: set up through-local-APIC from through-I/O-APIC? --macro |
1339 | */ | 1340 | */ |
1340 | value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; | 1341 | value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; |
1341 | if (!smp_processor_id() && (pic_mode || !value)) { | 1342 | if (!cpu && (pic_mode || !value)) { |
1342 | value = APIC_DM_EXTINT; | 1343 | value = APIC_DM_EXTINT; |
1343 | apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", | 1344 | apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu); |
1344 | smp_processor_id()); | ||
1345 | } else { | 1345 | } else { |
1346 | value = APIC_DM_EXTINT | APIC_LVT_MASKED; | 1346 | value = APIC_DM_EXTINT | APIC_LVT_MASKED; |
1347 | apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", | 1347 | apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu); |
1348 | smp_processor_id()); | ||
1349 | } | 1348 | } |
1350 | apic_write(APIC_LVT0, value); | 1349 | apic_write(APIC_LVT0, value); |
1351 | 1350 | ||
1352 | /* | 1351 | /* |
1353 | * only the BP should see the LINT1 NMI signal, obviously. | 1352 | * only the BP should see the LINT1 NMI signal, obviously. |
1354 | */ | 1353 | */ |
1355 | if (!smp_processor_id()) | 1354 | if (!cpu) |
1356 | value = APIC_DM_NMI; | 1355 | value = APIC_DM_NMI; |
1357 | else | 1356 | else |
1358 | value = APIC_DM_NMI | APIC_LVT_MASKED; | 1357 | value = APIC_DM_NMI | APIC_LVT_MASKED; |
@@ -1360,11 +1359,9 @@ void __cpuinit setup_local_APIC(void) | |||
1360 | value |= APIC_LVT_LEVEL_TRIGGER; | 1359 | value |= APIC_LVT_LEVEL_TRIGGER; |
1361 | apic_write(APIC_LVT1, value); | 1360 | apic_write(APIC_LVT1, value); |
1362 | 1361 | ||
1363 | preempt_enable(); | ||
1364 | |||
1365 | #ifdef CONFIG_X86_MCE_INTEL | 1362 | #ifdef CONFIG_X86_MCE_INTEL |
1366 | /* Recheck CMCI information after local APIC is up on CPU #0 */ | 1363 | /* Recheck CMCI information after local APIC is up on CPU #0 */ |
1367 | if (smp_processor_id() == 0) | 1364 | if (!cpu) |
1368 | cmci_recheck(); | 1365 | cmci_recheck(); |
1369 | #endif | 1366 | #endif |
1370 | } | 1367 | } |
@@ -1633,28 +1630,6 @@ no_apic: | |||
1633 | } | 1630 | } |
1634 | #endif | 1631 | #endif |
1635 | 1632 | ||
1636 | #ifdef CONFIG_X86_64 | ||
1637 | void __init early_init_lapic_mapping(void) | ||
1638 | { | ||
1639 | /* | ||
1640 | * If no local APIC can be found then go out | ||
1641 | * : it means there is no mpatable and MADT | ||
1642 | */ | ||
1643 | if (!smp_found_config) | ||
1644 | return; | ||
1645 | |||
1646 | set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); | ||
1647 | apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", | ||
1648 | APIC_BASE, mp_lapic_addr); | ||
1649 | |||
1650 | /* | ||
1651 | * Fetch the APIC ID of the BSP in case we have a | ||
1652 | * default configuration (or the MP table is broken). | ||
1653 | */ | ||
1654 | boot_cpu_physical_apicid = read_apic_id(); | ||
1655 | } | ||
1656 | #endif | ||
1657 | |||
1658 | /** | 1633 | /** |
1659 | * init_apic_mappings - initialize APIC mappings | 1634 | * init_apic_mappings - initialize APIC mappings |
1660 | */ | 1635 | */ |
@@ -1680,10 +1655,7 @@ void __init init_apic_mappings(void) | |||
1680 | * acpi_register_lapic_address() | 1655 | * acpi_register_lapic_address() |
1681 | */ | 1656 | */ |
1682 | if (!acpi_lapic && !smp_found_config) | 1657 | if (!acpi_lapic && !smp_found_config) |
1683 | set_fixmap_nocache(FIX_APIC_BASE, apic_phys); | 1658 | register_lapic_address(apic_phys); |
1684 | |||
1685 | apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n", | ||
1686 | APIC_BASE, apic_phys); | ||
1687 | } | 1659 | } |
1688 | 1660 | ||
1689 | /* | 1661 | /* |
@@ -1705,6 +1677,22 @@ void __init init_apic_mappings(void) | |||
1705 | } | 1677 | } |
1706 | } | 1678 | } |
1707 | 1679 | ||
1680 | void __init register_lapic_address(unsigned long address) | ||
1681 | { | ||
1682 | mp_lapic_addr = address; | ||
1683 | |||
1684 | if (!x2apic_mode) { | ||
1685 | set_fixmap_nocache(FIX_APIC_BASE, address); | ||
1686 | apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", | ||
1687 | APIC_BASE, mp_lapic_addr); | ||
1688 | } | ||
1689 | if (boot_cpu_physical_apicid == -1U) { | ||
1690 | boot_cpu_physical_apicid = read_apic_id(); | ||
1691 | apic_version[boot_cpu_physical_apicid] = | ||
1692 | GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
1693 | } | ||
1694 | } | ||
1695 | |||
1708 | /* | 1696 | /* |
1709 | * This initializes the IO-APIC and APIC hardware if this is | 1697 | * This initializes the IO-APIC and APIC hardware if this is |
1710 | * a UP kernel. | 1698 | * a UP kernel. |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index f6cd5b410770..52735a710c30 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -125,6 +125,26 @@ static int __init parse_noapic(char *str) | |||
125 | } | 125 | } |
126 | early_param("noapic", parse_noapic); | 126 | early_param("noapic", parse_noapic); |
127 | 127 | ||
128 | /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ | ||
129 | void mp_save_irq(struct mpc_intsrc *m) | ||
130 | { | ||
131 | int i; | ||
132 | |||
133 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," | ||
134 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", | ||
135 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, | ||
136 | m->srcbusirq, m->dstapic, m->dstirq); | ||
137 | |||
138 | for (i = 0; i < mp_irq_entries; i++) { | ||
139 | if (!memcmp(&mp_irqs[i], m, sizeof(*m))) | ||
140 | return; | ||
141 | } | ||
142 | |||
143 | memcpy(&mp_irqs[mp_irq_entries], m, sizeof(*m)); | ||
144 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | ||
145 | panic("Max # of irq sources exceeded!!\n"); | ||
146 | } | ||
147 | |||
128 | struct irq_pin_list { | 148 | struct irq_pin_list { |
129 | int apic, pin; | 149 | int apic, pin; |
130 | struct irq_pin_list *next; | 150 | struct irq_pin_list *next; |
@@ -135,6 +155,7 @@ static struct irq_pin_list *alloc_irq_pin_list(int node) | |||
135 | return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node); | 155 | return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node); |
136 | } | 156 | } |
137 | 157 | ||
158 | |||
138 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ | 159 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
139 | #ifdef CONFIG_SPARSE_IRQ | 160 | #ifdef CONFIG_SPARSE_IRQ |
140 | static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY]; | 161 | static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY]; |
@@ -2006,9 +2027,12 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void) | |||
2006 | = mp_ioapics[apic_id].apicid; | 2027 | = mp_ioapics[apic_id].apicid; |
2007 | 2028 | ||
2008 | /* | 2029 | /* |
2009 | * Read the right value from the MPC table and | 2030 | * Update the ID register according to the right value |
2010 | * write it into the ID register. | 2031 | * from the MPC table if they are different. |
2011 | */ | 2032 | */ |
2033 | if (mp_ioapics[apic_id].apicid == reg_00.bits.ID) | ||
2034 | continue; | ||
2035 | |||
2012 | apic_printk(APIC_VERBOSE, KERN_INFO | 2036 | apic_printk(APIC_VERBOSE, KERN_INFO |
2013 | "...changing IO-APIC physical APIC ID to %d ...", | 2037 | "...changing IO-APIC physical APIC ID to %d ...", |
2014 | mp_ioapics[apic_id].apicid); | 2038 | mp_ioapics[apic_id].apicid); |
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 9af64d9c4b67..01b0f6d06451 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c | |||
@@ -118,21 +118,8 @@ static void __init MP_bus_info(struct mpc_bus *m) | |||
118 | 118 | ||
119 | static void __init MP_ioapic_info(struct mpc_ioapic *m) | 119 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
120 | { | 120 | { |
121 | if (!(m->flags & MPC_APIC_USABLE)) | 121 | if (m->flags & MPC_APIC_USABLE) |
122 | return; | 122 | mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); |
123 | |||
124 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", | ||
125 | m->apicid, m->apicver, m->apicaddr); | ||
126 | |||
127 | mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); | ||
128 | } | ||
129 | |||
130 | static void print_MP_intsrc_info(struct mpc_intsrc *m) | ||
131 | { | ||
132 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," | ||
133 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", | ||
134 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, | ||
135 | m->srcbusirq, m->dstapic, m->dstirq); | ||
136 | } | 123 | } |
137 | 124 | ||
138 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) | 125 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
@@ -144,73 +131,11 @@ static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) | |||
144 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | 131 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); |
145 | } | 132 | } |
146 | 133 | ||
147 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, | ||
148 | struct mpc_intsrc *mp_irq) | ||
149 | { | ||
150 | mp_irq->dstapic = m->dstapic; | ||
151 | mp_irq->type = m->type; | ||
152 | mp_irq->irqtype = m->irqtype; | ||
153 | mp_irq->irqflag = m->irqflag; | ||
154 | mp_irq->srcbus = m->srcbus; | ||
155 | mp_irq->srcbusirq = m->srcbusirq; | ||
156 | mp_irq->dstirq = m->dstirq; | ||
157 | } | ||
158 | |||
159 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, | ||
160 | struct mpc_intsrc *m) | ||
161 | { | ||
162 | m->dstapic = mp_irq->dstapic; | ||
163 | m->type = mp_irq->type; | ||
164 | m->irqtype = mp_irq->irqtype; | ||
165 | m->irqflag = mp_irq->irqflag; | ||
166 | m->srcbus = mp_irq->srcbus; | ||
167 | m->srcbusirq = mp_irq->srcbusirq; | ||
168 | m->dstirq = mp_irq->dstirq; | ||
169 | } | ||
170 | |||
171 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, | ||
172 | struct mpc_intsrc *m) | ||
173 | { | ||
174 | if (mp_irq->dstapic != m->dstapic) | ||
175 | return 1; | ||
176 | if (mp_irq->type != m->type) | ||
177 | return 2; | ||
178 | if (mp_irq->irqtype != m->irqtype) | ||
179 | return 3; | ||
180 | if (mp_irq->irqflag != m->irqflag) | ||
181 | return 4; | ||
182 | if (mp_irq->srcbus != m->srcbus) | ||
183 | return 5; | ||
184 | if (mp_irq->srcbusirq != m->srcbusirq) | ||
185 | return 6; | ||
186 | if (mp_irq->dstirq != m->dstirq) | ||
187 | return 7; | ||
188 | |||
189 | return 0; | ||
190 | } | ||
191 | |||
192 | static void __init MP_intsrc_info(struct mpc_intsrc *m) | ||
193 | { | ||
194 | int i; | ||
195 | |||
196 | print_MP_intsrc_info(m); | ||
197 | |||
198 | for (i = 0; i < mp_irq_entries; i++) { | ||
199 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | ||
200 | return; | ||
201 | } | ||
202 | |||
203 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | ||
204 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | ||
205 | panic("Max # of irq sources exceeded!!\n"); | ||
206 | } | ||
207 | #else /* CONFIG_X86_IO_APIC */ | 134 | #else /* CONFIG_X86_IO_APIC */ |
208 | static inline void __init MP_bus_info(struct mpc_bus *m) {} | 135 | static inline void __init MP_bus_info(struct mpc_bus *m) {} |
209 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} | 136 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} |
210 | static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} | ||
211 | #endif /* CONFIG_X86_IO_APIC */ | 137 | #endif /* CONFIG_X86_IO_APIC */ |
212 | 138 | ||
213 | |||
214 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) | 139 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
215 | { | 140 | { |
216 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," | 141 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
@@ -222,7 +147,6 @@ static void __init MP_lintsrc_info(struct mpc_lintsrc *m) | |||
222 | /* | 147 | /* |
223 | * Read/parse the MPC | 148 | * Read/parse the MPC |
224 | */ | 149 | */ |
225 | |||
226 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) | 150 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
227 | { | 151 | { |
228 | 152 | ||
@@ -275,18 +199,6 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) | |||
275 | 199 | ||
276 | void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } | 200 | void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } |
277 | 201 | ||
278 | static void __init smp_register_lapic_address(unsigned long address) | ||
279 | { | ||
280 | mp_lapic_addr = address; | ||
281 | |||
282 | set_fixmap_nocache(FIX_APIC_BASE, address); | ||
283 | if (boot_cpu_physical_apicid == -1U) { | ||
284 | boot_cpu_physical_apicid = read_apic_id(); | ||
285 | apic_version[boot_cpu_physical_apicid] = | ||
286 | GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
287 | } | ||
288 | } | ||
289 | |||
290 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | 202 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
291 | { | 203 | { |
292 | char str[16]; | 204 | char str[16]; |
@@ -301,17 +213,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
301 | #ifdef CONFIG_X86_32 | 213 | #ifdef CONFIG_X86_32 |
302 | generic_mps_oem_check(mpc, oem, str); | 214 | generic_mps_oem_check(mpc, oem, str); |
303 | #endif | 215 | #endif |
304 | /* save the local APIC address, it might be non-default */ | 216 | /* Initialize the lapic mapping */ |
305 | if (!acpi_lapic) | 217 | if (!acpi_lapic) |
306 | mp_lapic_addr = mpc->lapic; | 218 | register_lapic_address(mpc->lapic); |
307 | 219 | ||
308 | if (early) | 220 | if (early) |
309 | return 1; | 221 | return 1; |
310 | 222 | ||
311 | /* Initialize the lapic mapping */ | ||
312 | if (!acpi_lapic) | ||
313 | smp_register_lapic_address(mpc->lapic); | ||
314 | |||
315 | if (mpc->oemptr) | 223 | if (mpc->oemptr) |
316 | x86_init.mpparse.smp_read_mpc_oem(mpc); | 224 | x86_init.mpparse.smp_read_mpc_oem(mpc); |
317 | 225 | ||
@@ -337,7 +245,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
337 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); | 245 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
338 | break; | 246 | break; |
339 | case MP_INTSRC: | 247 | case MP_INTSRC: |
340 | MP_intsrc_info((struct mpc_intsrc *)mpt); | 248 | mp_save_irq((struct mpc_intsrc *)mpt); |
341 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); | 249 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
342 | break; | 250 | break; |
343 | case MP_LINTSRC: | 251 | case MP_LINTSRC: |
@@ -429,13 +337,13 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) | |||
429 | 337 | ||
430 | intsrc.srcbusirq = i; | 338 | intsrc.srcbusirq = i; |
431 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | 339 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ |
432 | MP_intsrc_info(&intsrc); | 340 | mp_save_irq(&intsrc); |
433 | } | 341 | } |
434 | 342 | ||
435 | intsrc.irqtype = mp_ExtINT; | 343 | intsrc.irqtype = mp_ExtINT; |
436 | intsrc.srcbusirq = 0; | 344 | intsrc.srcbusirq = 0; |
437 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | 345 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ |
438 | MP_intsrc_info(&intsrc); | 346 | mp_save_irq(&intsrc); |
439 | } | 347 | } |
440 | 348 | ||
441 | 349 | ||
@@ -784,11 +692,11 @@ static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) | |||
784 | int i; | 692 | int i; |
785 | 693 | ||
786 | apic_printk(APIC_VERBOSE, "OLD "); | 694 | apic_printk(APIC_VERBOSE, "OLD "); |
787 | print_MP_intsrc_info(m); | 695 | print_mp_irq_info(m); |
788 | 696 | ||
789 | i = get_MP_intsrc_index(m); | 697 | i = get_MP_intsrc_index(m); |
790 | if (i > 0) { | 698 | if (i > 0) { |
791 | assign_to_mpc_intsrc(&mp_irqs[i], m); | 699 | memcpy(m, &mp_irqs[i], sizeof(*m)); |
792 | apic_printk(APIC_VERBOSE, "NEW "); | 700 | apic_printk(APIC_VERBOSE, "NEW "); |
793 | print_mp_irq_info(&mp_irqs[i]); | 701 | print_mp_irq_info(&mp_irqs[i]); |
794 | return; | 702 | return; |
@@ -875,14 +783,14 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, | |||
875 | if (nr_m_spare > 0) { | 783 | if (nr_m_spare > 0) { |
876 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); | 784 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); |
877 | nr_m_spare--; | 785 | nr_m_spare--; |
878 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | 786 | memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); |
879 | m_spare[nr_m_spare] = NULL; | 787 | m_spare[nr_m_spare] = NULL; |
880 | } else { | 788 | } else { |
881 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; | 789 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
882 | count += sizeof(struct mpc_intsrc); | 790 | count += sizeof(struct mpc_intsrc); |
883 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) | 791 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) |
884 | goto out; | 792 | goto out; |
885 | assign_to_mpc_intsrc(&mp_irqs[i], m); | 793 | memcpy(m, &mp_irqs[i], sizeof(*m)); |
886 | mpc->length = count; | 794 | mpc->length = count; |
887 | mpt += sizeof(struct mpc_intsrc); | 795 | mpt += sizeof(struct mpc_intsrc); |
888 | } | 796 | } |
diff --git a/arch/x86/mm/amdtopology_64.c b/arch/x86/mm/amdtopology_64.c index 51fae9cfdecb..08a0069b87a5 100644 --- a/arch/x86/mm/amdtopology_64.c +++ b/arch/x86/mm/amdtopology_64.c | |||
@@ -66,7 +66,6 @@ static __init void early_get_boot_cpu_id(void) | |||
66 | if (smp_found_config) | 66 | if (smp_found_config) |
67 | early_get_smp_config(); | 67 | early_get_smp_config(); |
68 | #endif | 68 | #endif |
69 | early_init_lapic_mapping(); | ||
70 | } | 69 | } |
71 | 70 | ||
72 | int __init amd_get_nodes(struct bootnode *physnodes) | 71 | int __init amd_get_nodes(struct bootnode *physnodes) |
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index fee0b4914e07..ea6529e93c6f 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c | |||
@@ -71,32 +71,6 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; | |||
71 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); | 71 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); |
72 | int sfi_mrtc_num; | 72 | int sfi_mrtc_num; |
73 | 73 | ||
74 | static inline void assign_to_mp_irq(struct mpc_intsrc *m, | ||
75 | struct mpc_intsrc *mp_irq) | ||
76 | { | ||
77 | memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); | ||
78 | } | ||
79 | |||
80 | static inline int mp_irq_cmp(struct mpc_intsrc *mp_irq, | ||
81 | struct mpc_intsrc *m) | ||
82 | { | ||
83 | return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); | ||
84 | } | ||
85 | |||
86 | static void save_mp_irq(struct mpc_intsrc *m) | ||
87 | { | ||
88 | int i; | ||
89 | |||
90 | for (i = 0; i < mp_irq_entries; i++) { | ||
91 | if (!mp_irq_cmp(&mp_irqs[i], m)) | ||
92 | return; | ||
93 | } | ||
94 | |||
95 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | ||
96 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | ||
97 | panic("Max # of irq sources exceeded!!\n"); | ||
98 | } | ||
99 | |||
100 | /* parse all the mtimer info to a static mtimer array */ | 74 | /* parse all the mtimer info to a static mtimer array */ |
101 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) | 75 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) |
102 | { | 76 | { |
@@ -130,7 +104,7 @@ static int __init sfi_parse_mtmr(struct sfi_table_header *table) | |||
130 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ | 104 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
131 | mp_irq.dstapic = MP_APIC_ALL; | 105 | mp_irq.dstapic = MP_APIC_ALL; |
132 | mp_irq.dstirq = pentry->irq; | 106 | mp_irq.dstirq = pentry->irq; |
133 | save_mp_irq(&mp_irq); | 107 | mp_save_irq(&mp_irq); |
134 | } | 108 | } |
135 | 109 | ||
136 | return 0; | 110 | return 0; |
@@ -200,7 +174,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table) | |||
200 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ | 174 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
201 | mp_irq.dstapic = MP_APIC_ALL; | 175 | mp_irq.dstapic = MP_APIC_ALL; |
202 | mp_irq.dstirq = pentry->irq; | 176 | mp_irq.dstirq = pentry->irq; |
203 | save_mp_irq(&mp_irq); | 177 | mp_save_irq(&mp_irq); |
204 | } | 178 | } |
205 | return 0; | 179 | return 0; |
206 | } | 180 | } |
diff --git a/arch/x86/platform/sfi/sfi.c b/arch/x86/platform/sfi/sfi.c index ca54875ac795..7785b72ecc3a 100644 --- a/arch/x86/platform/sfi/sfi.c +++ b/arch/x86/platform/sfi/sfi.c | |||
@@ -34,17 +34,6 @@ | |||
34 | #ifdef CONFIG_X86_LOCAL_APIC | 34 | #ifdef CONFIG_X86_LOCAL_APIC |
35 | static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | 35 | static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; |
36 | 36 | ||
37 | static void __init mp_sfi_register_lapic_address(unsigned long address) | ||
38 | { | ||
39 | mp_lapic_addr = address; | ||
40 | |||
41 | set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); | ||
42 | if (boot_cpu_physical_apicid == -1U) | ||
43 | boot_cpu_physical_apicid = read_apic_id(); | ||
44 | |||
45 | pr_info("Boot CPU = %d\n", boot_cpu_physical_apicid); | ||
46 | } | ||
47 | |||
48 | /* All CPUs enumerated by SFI must be present and enabled */ | 37 | /* All CPUs enumerated by SFI must be present and enabled */ |
49 | static void __cpuinit mp_sfi_register_lapic(u8 id) | 38 | static void __cpuinit mp_sfi_register_lapic(u8 id) |
50 | { | 39 | { |
@@ -110,7 +99,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table) | |||
110 | int __init sfi_platform_init(void) | 99 | int __init sfi_platform_init(void) |
111 | { | 100 | { |
112 | #ifdef CONFIG_X86_LOCAL_APIC | 101 | #ifdef CONFIG_X86_LOCAL_APIC |
113 | mp_sfi_register_lapic_address(sfi_lapic_addr); | 102 | register_lapic_address(sfi_lapic_addr); |
114 | sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus); | 103 | sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus); |
115 | #endif | 104 | #endif |
116 | #ifdef CONFIG_X86_IO_APIC | 105 | #ifdef CONFIG_X86_IO_APIC |