diff options
author | Magnus Damm <magnus.damm@gmail.com> | 2008-04-24 08:30:09 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-05-08 06:52:00 -0400 |
commit | a276e588a92737889c21e736f2bbed8aecda25fb (patch) | |
tree | 523d1e14fe3dc73d616b15b25c99844ff636bdb6 /arch | |
parent | 3d2c2f3ef7c5425d23424326a2345c385bb2d415 (diff) |
sh: unify external irq pin code for sh3
This patch unifies the sh3 external irq pin code. It buys us some
savings with reduced code redundancy, but the main feature with
this change is irq sense selection support for all sh3 processors.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/kernel/cpu/sh3/Makefile | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh3.c | 64 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7705.c | 20 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh770x.c | 32 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7710.c | 20 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7720.c | 31 |
6 files changed, 75 insertions, 94 deletions
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index 3ae4d9111f19..511de55af832 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the Linux/SuperH SH-3 backends. | 2 | # Makefile for the Linux/SuperH SH-3 backends. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := ex.o probe.o entry.o | 5 | obj-y := ex.o probe.o entry.o setup-sh3.o |
6 | 6 | ||
7 | # CPU subtype setup | 7 | # CPU subtype setup |
8 | obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o | 8 | obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c new file mode 100644 index 000000000000..28e7d6553091 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c | |||
@@ -0,0 +1,64 @@ | |||
1 | /* | ||
2 | * Shared SH3 Setup code | ||
3 | * | ||
4 | * Copyright (C) 2008 Magnus Damm | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | #include <linux/irq.h> | ||
13 | #include <linux/io.h> | ||
14 | |||
15 | /* All SH3 devices are equipped with IRQ0->5 (except sh7708) */ | ||
16 | |||
17 | enum { | ||
18 | UNUSED = 0, | ||
19 | |||
20 | /* interrupt sources */ | ||
21 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, | ||
22 | }; | ||
23 | |||
24 | static struct intc_vect vectors_irq0123[] __initdata = { | ||
25 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
26 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
27 | }; | ||
28 | |||
29 | static struct intc_vect vectors_irq45[] __initdata = { | ||
30 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | ||
31 | }; | ||
32 | |||
33 | static struct intc_prio_reg prio_registers[] __initdata = { | ||
34 | { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, | ||
35 | { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, | ||
36 | }; | ||
37 | |||
38 | static struct intc_sense_reg sense_registers[] __initdata = { | ||
39 | { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, | ||
40 | }; | ||
41 | |||
42 | static DECLARE_INTC_DESC(intc_desc_irq0123, "sh3-irq0123", vectors_irq0123, | ||
43 | NULL, NULL, prio_registers, sense_registers); | ||
44 | |||
45 | static DECLARE_INTC_DESC(intc_desc_irq45, "sh3-irq45", vectors_irq45, | ||
46 | NULL, NULL, prio_registers, sense_registers); | ||
47 | |||
48 | #define INTC_ICR1 0xa4000010UL | ||
49 | #define INTC_ICR1_IRQLVL (1<<14) | ||
50 | |||
51 | void __init plat_irq_setup_pins(int mode) | ||
52 | { | ||
53 | if (mode == IRQ_MODE_IRQ) { | ||
54 | ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); | ||
55 | register_intc_controller(&intc_desc_irq0123); | ||
56 | return; | ||
57 | } | ||
58 | BUG(); | ||
59 | } | ||
60 | |||
61 | void __init plat_irq_setup_sh3(void) | ||
62 | { | ||
63 | register_intc_controller(&intc_desc_irq45); | ||
64 | } | ||
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index ba77891ee4e3..6468ae86b944 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c | |||
@@ -37,7 +37,7 @@ enum { | |||
37 | }; | 37 | }; |
38 | 38 | ||
39 | static struct intc_vect vectors[] __initdata = { | 39 | static struct intc_vect vectors[] __initdata = { |
40 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | 40 | /* IRQ0->5 are handled in setup-sh3.c */ |
41 | INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), | 41 | INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), |
42 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), | 42 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), |
43 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), | 43 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), |
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
81 | static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, | 81 | static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, |
82 | NULL, prio_registers, NULL); | 82 | NULL, prio_registers, NULL); |
83 | 83 | ||
84 | static struct intc_vect vectors_irq[] __initdata = { | ||
85 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
86 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
87 | }; | ||
88 | |||
89 | static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL, | ||
90 | NULL, prio_registers, NULL); | ||
91 | |||
92 | static struct plat_sci_port sci_platform_data[] = { | 84 | static struct plat_sci_port sci_platform_data[] = { |
93 | { | 85 | { |
94 | .mapbase = 0xa4410000, | 86 | .mapbase = 0xa4410000, |
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void) | |||
159 | } | 151 | } |
160 | __initcall(sh7705_devices_setup); | 152 | __initcall(sh7705_devices_setup); |
161 | 153 | ||
162 | void __init plat_irq_setup_pins(int mode) | ||
163 | { | ||
164 | if (mode == IRQ_MODE_IRQ) { | ||
165 | register_intc_controller(&intc_desc_irq); | ||
166 | return; | ||
167 | } | ||
168 | BUG(); | ||
169 | } | ||
170 | |||
171 | void __init plat_irq_setup(void) | 154 | void __init plat_irq_setup(void) |
172 | { | 155 | { |
173 | register_intc_controller(&intc_desc); | 156 | register_intc_controller(&intc_desc); |
157 | plat_irq_setup_sh3(); | ||
174 | } | 158 | } |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index d3733b13ea52..93c55e2ed952 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c | |||
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = { | |||
52 | #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | 52 | #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ |
53 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | 53 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ |
54 | defined(CONFIG_CPU_SUBTYPE_SH7709) | 54 | defined(CONFIG_CPU_SUBTYPE_SH7709) |
55 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | 55 | /* IRQ0->5 are handled in setup-sh3.c */ |
56 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), | 56 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), |
57 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), | 57 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), |
58 | INTC_VECT(ADC_ADI, 0x980), | 58 | INTC_VECT(ADC_ADI, 0x980), |
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
104 | static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, | 104 | static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, |
105 | NULL, prio_registers, NULL); | 105 | NULL, prio_registers, NULL); |
106 | 106 | ||
107 | #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | ||
108 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | ||
109 | defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
110 | static struct intc_vect vectors_irq[] __initdata = { | ||
111 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
112 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
113 | }; | ||
114 | |||
115 | static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL, | ||
116 | NULL, prio_registers, NULL); | ||
117 | #endif | ||
118 | |||
119 | static struct resource rtc_resources[] = { | 107 | static struct resource rtc_resources[] = { |
120 | [0] = { | 108 | [0] = { |
121 | .start = 0xfffffec0, | 109 | .start = 0xfffffec0, |
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void) | |||
194 | } | 182 | } |
195 | __initcall(sh770x_devices_setup); | 183 | __initcall(sh770x_devices_setup); |
196 | 184 | ||
197 | #define INTC_ICR1 0xa4000010UL | 185 | void __init plat_irq_setup(void) |
198 | #define INTC_ICR1_IRQLVL (1<<14) | ||
199 | |||
200 | void __init plat_irq_setup_pins(int mode) | ||
201 | { | 186 | { |
202 | if (mode == IRQ_MODE_IRQ) { | 187 | register_intc_controller(&intc_desc); |
203 | #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | 188 | #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ |
204 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | 189 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ |
205 | defined(CONFIG_CPU_SUBTYPE_SH7709) | 190 | defined(CONFIG_CPU_SUBTYPE_SH7709) |
206 | ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); | 191 | plat_irq_setup_sh3(); |
207 | register_intc_controller(&intc_desc_irq); | ||
208 | return; | ||
209 | #endif | 192 | #endif |
210 | } | ||
211 | BUG(); | ||
212 | } | ||
213 | |||
214 | void __init plat_irq_setup(void) | ||
215 | { | ||
216 | register_intc_controller(&intc_desc); | ||
217 | } | 193 | } |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 7406c9ad9259..f353a001fba6 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c | |||
@@ -38,7 +38,7 @@ enum { | |||
38 | }; | 38 | }; |
39 | 39 | ||
40 | static struct intc_vect vectors[] __initdata = { | 40 | static struct intc_vect vectors[] __initdata = { |
41 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | 41 | /* IRQ0->5 are handled in setup-sh3.c */ |
42 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), | 42 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), |
43 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), | 43 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), |
44 | INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), | 44 | INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), |
@@ -91,14 +91,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
91 | static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, | 91 | static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, |
92 | NULL, prio_registers, NULL); | 92 | NULL, prio_registers, NULL); |
93 | 93 | ||
94 | static struct intc_vect vectors_irq[] __initdata = { | ||
95 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
96 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
97 | }; | ||
98 | |||
99 | static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL, | ||
100 | NULL, prio_registers, NULL); | ||
101 | |||
102 | static struct resource rtc_resources[] = { | 94 | static struct resource rtc_resources[] = { |
103 | [0] = { | 95 | [0] = { |
104 | .start = 0xa413fec0, | 96 | .start = 0xa413fec0, |
@@ -170,16 +162,8 @@ static int __init sh7710_devices_setup(void) | |||
170 | } | 162 | } |
171 | __initcall(sh7710_devices_setup); | 163 | __initcall(sh7710_devices_setup); |
172 | 164 | ||
173 | void __init plat_irq_setup_pins(int mode) | ||
174 | { | ||
175 | if (mode == IRQ_MODE_IRQ) { | ||
176 | register_intc_controller(&intc_desc_irq); | ||
177 | return; | ||
178 | } | ||
179 | BUG(); | ||
180 | } | ||
181 | |||
182 | void __init plat_irq_setup(void) | 165 | void __init plat_irq_setup(void) |
183 | { | 166 | { |
184 | register_intc_controller(&intc_desc); | 167 | register_intc_controller(&intc_desc); |
168 | plat_irq_setup_sh3(); | ||
185 | } | 169 | } |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index 8028082527c5..0e6e66e7b584 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c | |||
@@ -19,10 +19,6 @@ | |||
19 | #include <linux/serial_sci.h> | 19 | #include <linux/serial_sci.h> |
20 | #include <asm/rtc.h> | 20 | #include <asm/rtc.h> |
21 | 21 | ||
22 | #define INTC_ICR1 0xA4140010UL | ||
23 | #define INTC_ICR_IRLM 0x4000 | ||
24 | #define INTC_ICR_IRQ (~INTC_ICR_IRLM) | ||
25 | |||
26 | static struct resource rtc_resources[] = { | 22 | static struct resource rtc_resources[] = { |
27 | [0] = { | 23 | [0] = { |
28 | .start = 0xa413fec0, | 24 | .start = 0xa413fec0, |
@@ -170,6 +166,7 @@ enum { | |||
170 | }; | 166 | }; |
171 | 167 | ||
172 | static struct intc_vect vectors[] __initdata = { | 168 | static struct intc_vect vectors[] __initdata = { |
169 | /* IRQ0->5 are handled in setup-sh3.c */ | ||
173 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | 170 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), |
174 | INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), | 171 | INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), |
175 | INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), | 172 | INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), |
@@ -229,32 +226,8 @@ static struct intc_prio_reg prio_registers[] __initdata = { | |||
229 | static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, | 226 | static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, |
230 | NULL, prio_registers, NULL); | 227 | NULL, prio_registers, NULL); |
231 | 228 | ||
232 | static struct intc_sense_reg sense_registers[] __initdata = { | ||
233 | { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, | ||
234 | }; | ||
235 | |||
236 | static struct intc_vect vectors_irq[] __initdata = { | ||
237 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
238 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
239 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | ||
240 | }; | ||
241 | |||
242 | static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, | ||
243 | NULL, NULL, prio_registers, sense_registers); | ||
244 | |||
245 | void __init plat_irq_setup_pins(int mode) | ||
246 | { | ||
247 | switch (mode) { | ||
248 | case IRQ_MODE_IRQ: | ||
249 | ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1); | ||
250 | register_intc_controller(&intc_irq_desc); | ||
251 | break; | ||
252 | default: | ||
253 | BUG(); | ||
254 | } | ||
255 | } | ||
256 | |||
257 | void __init plat_irq_setup(void) | 229 | void __init plat_irq_setup(void) |
258 | { | 230 | { |
259 | register_intc_controller(&intc_desc); | 231 | register_intc_controller(&intc_desc); |
232 | plat_irq_setup_sh3(); | ||
260 | } | 233 | } |