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authorKukjin Kim <kgene.kim@samsung.com>2010-01-27 02:57:07 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-27 03:43:07 -0500
commit81317960466ebd37fd958aa07993e3fea461dbe4 (patch)
treee3bfbebd233b69d426352eb7d3dc758be3997ff7 /arch
parente96b234b7e9d24e50528287b881ca229b7f094b8 (diff)
ARM: S5P6440: Move common memory map definitions for S5P
1. Moved common memory map definitions for S5P such as S5P_VA_XXX into plat-s5p/include/mach/map-s5p.h from mach-s5p6440/include/mach. 2. Removed unnecessary definitions in the map.h and irq.c 3. Removed the unnecessary support for unaligned UART address 4. Renamed S5P_VA_VICx definitions as VA_VICx 5. Moved the definitons of VIC_BASE to plat-s5p/include/plat/irqs.h Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5p6440/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-s5p6440/include/mach/map.h65
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-clock.h2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/tick.h2
-rw-r--r--arch/arm/mach-s5p6440/mach-smdk6440.c4
-rw-r--r--arch/arm/plat-s5p/cpu.c19
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h32
-rw-r--r--arch/arm/plat-s5p/irq.c5
9 files changed, 65 insertions, 70 deletions
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
index f3a5d1635be5..48cdb0da026c 100644
--- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
@@ -22,8 +22,8 @@
22 .macro addruart, rx 22 .macro addruart, rx
23 mrc p15, 0, \rx, c1, c0 23 mrc p15, 0, \rx, c1, c0
24 tst \rx, #1 24 tst \rx, #1
25 ldreq \rx, = S5P_PA_UART 25 ldreq \rx, = S3C_PA_UART
26 ldrne \rx, = (S5P_VA_UART + S5P_PA_UART & 0xfffff) 26 ldrne \rx, = S3C_VA_UART
27#if CONFIG_DEBUG_S3C_UART != 0 27#if CONFIG_DEBUG_S3C_UART != 0
28 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 28 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
29#endif 29#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 4a73e73c9428..8924e5a4d6a6 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -14,94 +14,55 @@
14#define __ASM_ARCH_MAP_H __FILE__ 14#define __ASM_ARCH_MAP_H __FILE__
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
17 18
18/* Chip ID */
19#define S5P6440_PA_CHIPID (0xE0000000) 19#define S5P6440_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6440_PA_CHIPID 20#define S5P_PA_CHIPID S5P6440_PA_CHIPID
21#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
22 21
23/* SYSCON */
24#define S5P6440_PA_SYSCON (0xE0100000) 22#define S5P6440_PA_SYSCON (0xE0100000)
25#define S5P_PA_SYSCON S5P6440_PA_SYSCON
26#define S5P_VA_SYSCON S3C_VA_SYS
27
28#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) 23#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
29#define S5P_PA_CLK S5P6440_PA_CLK 24#define S5P_PA_SYSCON S5P6440_PA_SYSCON
30#define S5P_VA_CLK (S5P_VA_SYSCON + 0x0)
31 25
32/* GPIO */
33#define S5P6440_PA_GPIO (0xE0308000) 26#define S5P6440_PA_GPIO (0xE0308000)
34#define S5P_PA_GPIO S5P6440_PA_GPIO 27#define S5P_PA_GPIO S5P6440_PA_GPIO
35#define S5P_VA_GPIO S3C_ADDR(0x00500000)
36 28
37/* VIC0 */
38#define S5P6440_PA_VIC0 (0xE4000000) 29#define S5P6440_PA_VIC0 (0xE4000000)
39#define S5P_PA_VIC0 S5P6440_PA_VIC0 30#define S5P_PA_VIC0 S5P6440_PA_VIC0
40#define S5P_VA_VIC0 (S3C_VA_IRQ + 0x0)
41#define VA_VIC0 S5P_VA_VIC0
42 31
43/* VIC1 */
44#define S5P6440_PA_VIC1 (0xE4100000) 32#define S5P6440_PA_VIC1 (0xE4100000)
45#define S5P_PA_VIC1 S5P6440_PA_VIC1 33#define S5P_PA_VIC1 S5P6440_PA_VIC1
46#define S5P_VA_VIC1 (S3C_VA_IRQ + 0x10000)
47#define VA_VIC1 S5P_VA_VIC1
48 34
49/* Timer */
50#define S5P6440_PA_TIMER (0xEA000000) 35#define S5P6440_PA_TIMER (0xEA000000)
51#define S5P_PA_TIMER S5P6440_PA_TIMER 36#define S5P_PA_TIMER S5P6440_PA_TIMER
52#define S5P_VA_TIMER S3C_VA_TIMER
53 37
54/* RTC */
55#define S5P6440_PA_RTC (0xEA100000) 38#define S5P6440_PA_RTC (0xEA100000)
56#define S5P_PA_RTC S5P6440_PA_RTC 39#define S5P_PA_RTC S5P6440_PA_RTC
57#define S5P_VA_RTC S3C_ADDR(0x00600000)
58 40
59/* WDT */
60#define S5P6440_PA_WDT (0xEA200000) 41#define S5P6440_PA_WDT (0xEA200000)
61#define S5P_PA_WDT S5P6440_PA_WDT 42#define S5P_PA_WDT S5P6440_PA_WDT
62#define S5p_VA_WDT S3C_VA_WATCHDOG
63 43
64/* UART */
65#define S5P6440_PA_UART (0xEC000000) 44#define S5P6440_PA_UART (0xEC000000)
66#define S5P_PA_UART S5P6440_PA_UART
67#define S5P_VA_UART S3C_VA_UART
68 45
69/* HS USB OtG */ 46#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
47#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
48#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
49#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
50
51#define S5P_SZ_UART SZ_256
52
53#define S5P6440_PA_IIC0 (0xEC104000)
54
70#define S5P6440_PA_HSOTG (0xED100000) 55#define S5P6440_PA_HSOTG (0xED100000)
71 56
72/* HSMMC */
73#define S5P6440_PA_HSMMC0 (0xED800000) 57#define S5P6440_PA_HSMMC0 (0xED800000)
74#define S5P6440_PA_HSMMC1 (0xED900000) 58#define S5P6440_PA_HSMMC1 (0xED900000)
75#define S5P6440_PA_HSMMC2 (0xEDA00000) 59#define S5P6440_PA_HSMMC2 (0xEDA00000)
76 60
77#define S5P_PA_UART0 (S5P_PA_UART + 0x0)
78#define S5P_PA_UART1 (S5P_PA_UART + 0x400)
79#define S5P_PA_UART2 (S5P_PA_UART + 0x800)
80#define S5P_PA_UART3 (S5P_PA_UART + 0xC00)
81#define S5P_UART_OFFSET (0x400)
82
83#define S5P_VA_UARTx(x) (S5P_VA_UART + (S5P_PA_UART & 0xfffff) \
84 + ((x) * S5P_UART_OFFSET))
85
86#define S5P_VA_UART0 S5P_VA_UARTx(0)
87#define S5P_VA_UART1 S5P_VA_UARTx(1)
88#define S5P_VA_UART2 S5P_VA_UARTx(2)
89#define S5P_VA_UART3 S5P_VA_UARTx(3)
90#define S5P_SZ_UART SZ_256
91
92/* I2C */
93#define S5P6440_PA_IIC0 (0xEC104000)
94#define S5P_PA_IIC0 S5P6440_PA_IIC0
95#define S5p_VA_IIC0 S3C_ADDR(0x00700000)
96
97/* SDRAM */
98#define S5P6440_PA_SDRAM (0x20000000) 61#define S5P6440_PA_SDRAM (0x20000000)
99#define S5P_PA_SDRAM S5P6440_PA_SDRAM 62#define S5P_PA_SDRAM S5P6440_PA_SDRAM
100 63
101/* compatibiltiy defines. */ 64/* compatibiltiy defines. */
102#define S3C_PA_UART S5P_PA_UART 65#define S3C_PA_UART S5P6440_PA_UART
103#define S3C_UART_OFFSET S5P_UART_OFFSET 66#define S3C_PA_IIC S5P6440_PA_IIC0
104#define S3C_PA_TIMER S5P_PA_TIMER
105#define S3C_PA_IIC S5P_PA_IIC0
106 67
107#endif /* __ASM_ARCH_MAP_H */ 68#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
index b7af28342bc4..c783ecc9f193 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
@@ -15,7 +15,7 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17 17
18#define S5P_CLKREG(x) (S5P_VA_CLK + (x)) 18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19 19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00) 20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x04) 21#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h
index 0815aeb4f2cf..2f25c7f07970 100644
--- a/arch/arm/mach-s5p6440/include/mach/tick.h
+++ b/arch/arm/mach-s5p6440/include/mach/tick.h
@@ -15,7 +15,7 @@
15 15
16static inline u32 s3c24xx_ostimer_pending(void) 16static inline u32 s3c24xx_ostimer_pending(void)
17{ 17{
18 u32 pend = __raw_readl(S5P_VA_VIC0 + VIC_RAW_STATUS); 18 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
19 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); 19 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
20} 20}
21 21
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
index 760ea5424a78..3ae88f2c7c77 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -100,8 +100,8 @@ static void __init smdk6440_machine_init(void)
100 100
101MACHINE_START(SMDK6440, "SMDK6440") 101MACHINE_START(SMDK6440, "SMDK6440")
102 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 102 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
103 .phys_io = S5P_PA_UART & 0xfff00000, 103 .phys_io = S3C_PA_UART & 0xfff00000,
104 .io_pg_offst = (((u32)S5P_VA_UART) >> 18) & 0xfffc, 104 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
105 .boot_params = S5P_PA_SDRAM + 0x100, 105 .boot_params = S5P_PA_SDRAM + 0x100,
106 106
107 .init_irq = s5p6440_init_irq, 107 .init_irq = s5p6440_init_irq,
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 0895a77a2835..ee9c6b302ded 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -37,31 +37,34 @@ static struct cpu_table cpu_ids[] __initdata = {
37 37
38/* minimal IO mapping */ 38/* minimal IO mapping */
39 39
40#define UART_OFFS (S5P_PA_UART & 0xfffff)
41
42static struct map_desc s5p_iodesc[] __initdata = { 40static struct map_desc s5p_iodesc[] __initdata = {
43 { 41 {
44 .virtual = (unsigned long)S5P_VA_SYSCON, 42 .virtual = (unsigned long)S5P_VA_CHIPID,
43 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
44 .length = SZ_4K,
45 .type = MT_DEVICE,
46 }, {
47 .virtual = (unsigned long)S3C_VA_SYS,
45 .pfn = __phys_to_pfn(S5P_PA_SYSCON), 48 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
46 .length = SZ_64K, 49 .length = SZ_64K,
47 .type = MT_DEVICE, 50 .type = MT_DEVICE,
48 }, { 51 }, {
49 .virtual = (unsigned long)(S5P_VA_UART + UART_OFFS), 52 .virtual = (unsigned long)S3C_VA_UART,
50 .pfn = __phys_to_pfn(S5P_PA_UART), 53 .pfn = __phys_to_pfn(S3C_PA_UART),
51 .length = SZ_4K, 54 .length = SZ_4K,
52 .type = MT_DEVICE, 55 .type = MT_DEVICE,
53 }, { 56 }, {
54 .virtual = (unsigned long)S5P_VA_VIC0, 57 .virtual = (unsigned long)VA_VIC0,
55 .pfn = __phys_to_pfn(S5P_PA_VIC0), 58 .pfn = __phys_to_pfn(S5P_PA_VIC0),
56 .length = SZ_16K, 59 .length = SZ_16K,
57 .type = MT_DEVICE, 60 .type = MT_DEVICE,
58 }, { 61 }, {
59 .virtual = (unsigned long)S5P_VA_VIC1, 62 .virtual = (unsigned long)VA_VIC1,
60 .pfn = __phys_to_pfn(S5P_PA_VIC1), 63 .pfn = __phys_to_pfn(S5P_PA_VIC1),
61 .length = SZ_16K, 64 .length = SZ_16K,
62 .type = MT_DEVICE, 65 .type = MT_DEVICE,
63 }, { 66 }, {
64 .virtual = (unsigned long)S5P_VA_TIMER, 67 .virtual = (unsigned long)S3C_VA_TIMER,
65 .pfn = __phys_to_pfn(S5P_PA_TIMER), 68 .pfn = __phys_to_pfn(S5P_PA_TIMER),
66 .length = SZ_16K, 69 .length = SZ_16K,
67 .type = MT_DEVICE, 70 .type = MT_DEVICE,
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 5d7937dddad2..878acfe3690f 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -29,6 +29,8 @@
29#define S5P_VIC0_BASE S5P_IRQ(0) 29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32) 30#define S5P_VIC1_BASE S5P_IRQ(32)
31 31
32#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
33
32#define IRQ_VIC0_BASE S5P_VIC0_BASE 34#define IRQ_VIC0_BASE S5P_VIC0_BASE
33#define IRQ_VIC1_BASE S5P_VIC1_BASE 35#define IRQ_VIC1_BASE S5P_VIC1_BASE
34 36
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 000000000000..51d9cb5a3e2b
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,32 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S5P_H
14#define __ASM_PLAT_MAP_S5P_H __FILE__
15
16#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
17#define S5P_VA_GPIO S3C_ADDR(0x00500000)
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20
21#define S5P_VA_UART0 (S3C_VA_UART + 0x0)
22#define S5P_VA_UART1 (S3C_VA_UART + 0x400)
23#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
24#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
25
26#define S3C_UART_OFFSET (0x400)
27
28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
29#define VA_VIC0 VA_VIC(0)
30#define VA_VIC1 VA_VIC(1)
31
32#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index eada40d0847d..11535a5f534e 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -25,9 +25,6 @@
25#include <plat/irq-vic-timer.h> 25#include <plat/irq-vic-timer.h>
26#include <plat/irq-uart.h> 26#include <plat/irq-uart.h>
27 27
28#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000))
29#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32))
30
31/* 28/*
32 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] 29 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
33 * are consecutive when looking up the interrupt in the demux routines. 30 * are consecutive when looking up the interrupt in the demux routines.
@@ -61,7 +58,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
61 58
62 /* initialize the VICs */ 59 /* initialize the VICs */
63 for (irq = 0; irq < num_vic; irq++) 60 for (irq = 0; irq < num_vic; irq++)
64 vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0); 61 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
65 62
66 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); 63 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
67 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); 64 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);