Merge branch 'for_3.10/omap5_generic_updates' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux into omap-for-v3.10/fixes-non-critical

10 files changed, 48 insertions, 24 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 8111cd9ff3e5..b9c0ed3f648c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -408,7 +408,7 @@ config OMAP3_SDRC_AC_TIMING
 
 config OMAP4_ERRATA_I688
         bool "OMAP4 errata: Async Bridge Corruption"
-        depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
+        depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
         select ARCH_HAS_BARRIERS
         help
           If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 6e9873ff1844..3a0296cfcace 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -307,10 +307,10 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
         _omap3_noncore_dpll_bypass(clk);
 
         /*
-         * Set jitter correction. No jitter correction for OMAP4 and 3630
-         * since freqsel field is no longer present
+         * Set jitter correction. Jitter correction applicable for OMAP343X
+         * only since freqsel field is no longer present on other devices.
          */
-        if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
+        if (cpu_is_omap343x()) {
                 v = __raw_readl(dd->control_reg);
                 v &= ~dd->freqsel_mask;
                 v |= freqsel << __ffs(dd->freqsel_mask);
@@ -502,9 +502,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
                 if (dd->last_rounded_rate == 0)
                         return -EINVAL;
 
-                /* No freqsel on AM335x, OMAP4 and OMAP3630 */
-                if (!soc_is_am33xx() && !cpu_is_omap44xx() &&
-                    !cpu_is_omap3630()) {
+                /* Freqsel is available only on OMAP343X devices */
+                if (cpu_is_omap343x()) {
                         freqsel = _omap3_dpll_compute_freqsel(clk,
                                                 dd->last_rounded_n);
                         WARN_ON(!freqsel);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 8a68f1ec66b9..ff0bc9e51aa7 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -529,22 +529,28 @@ void __init omap5xxx_check_revision(void)
         case 0xb942:
                 switch (rev) {
                 case 0:
-                default:
                         omap_revision = OMAP5430_REV_ES1_0;
+                        break;
+                case 1:
+                default:
+                        omap_revision = OMAP5430_REV_ES2_0;
                 }
                 break;
 
         case 0xb998:
                 switch (rev) {
                 case 0:
-                default:
                         omap_revision = OMAP5432_REV_ES1_0;
+                        break;
+                case 1:
+                default:
+                        omap_revision = OMAP5432_REV_ES2_0;
                 }
                 break;
 
         default:
                 /* Unknown default to latest silicon rev as default*/
-                omap_revision = OMAP5430_REV_ES1_0;
+                omap_revision = OMAP5430_REV_ES2_0;
         }
 
         pr_info("OMAP%04x ES%d.0\n",
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2c3fdd65387b..2bef5a7e6af8 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -271,6 +271,14 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
                 .length         = L4_PER_54XX_SIZE,
                 .type           = MT_DEVICE,
         },
+#ifdef CONFIG_OMAP4_ERRATA_I688
+        {
+                .virtual        = OMAP4_SRAM_VA,
+                .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
+                .length         = PAGE_SIZE,
+                .type           = MT_MEMORY_SO,
+        },
+#endif
 };
 #endif
 
@@ -323,6 +331,7 @@ void __init omap4_map_io(void)
 void __init omap5_map_io(void)
 {
         iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
+        omap_barriers_init();
 }
 #endif
 /*
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 708bb115a27f..2aeb928efdfd 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -240,15 +240,21 @@ void __iomem *omap4_get_sar_ram_base(void)
  */
 static int __init omap4_sar_ram_init(void)
 {
+        unsigned long sar_base;
+
         /*
          * To avoid code running on other OMAPs in
          * multi-omap builds
          */
-        if (!cpu_is_omap44xx())
+        if (cpu_is_omap44xx())
+                sar_base = OMAP44XX_SAR_RAM_BASE;
+        else if (soc_is_omap54xx())
+                sar_base = OMAP54XX_SAR_RAM_BASE;
+        else
                 return -ENOMEM;
 
         /* Static mapping, never released */
-        sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
+        sar_ram_base = ioremap(sar_base, SZ_16K);
         if (WARN_ON(!sar_ram_base))
                 return -ENOMEM;
 
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index e170fe803b04..937417523b8e 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -48,13 +48,13 @@
 #define SAR_BACKUP_STATUS_WAKEUPGEN             0x10
 
 /* WakeUpGen save restore offset from OMAP54XX_SAR_RAM_BASE */
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU0          (SAR_BANK3_OFFSET + 0x8d4)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0   (SAR_BANK3_OFFSET + 0x8e8)
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU1          (SAR_BANK3_OFFSET + 0x8fc)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1   (SAR_BANK3_OFFSET + 0x910)
-#define OMAP5_AUXCOREBOOT0_OFFSET               (SAR_BANK3_OFFSET + 0x924)
-#define OMAP5_AUXCOREBOOT1_OFFSET               (SAR_BANK3_OFFSET + 0x928)
-#define OMAP5_AMBA_IF_MODE_OFFSET               (SAR_BANK3_OFFSET + 0x92c)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU0          (SAR_BANK3_OFFSET + 0x9dc)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0   (SAR_BANK3_OFFSET + 0x9f0)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU1          (SAR_BANK3_OFFSET + 0xa04)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1   (SAR_BANK3_OFFSET + 0xa18)
+#define OMAP5_AUXCOREBOOT0_OFFSET               (SAR_BANK3_OFFSET + 0xa2c)
+#define OMAP5_AUXCOREBOOT1_OFFSET               (SAR_BANK3_OFFSET + 0x930)
+#define OMAP5_AMBA_IF_MODE_OFFSET               (SAR_BANK3_OFFSET + 0xa34)
 #define OMAP5_SAR_BACKUP_STATUS_OFFSET          (SAR_BANK3_OFFSET + 0x800)
 
 #endif
diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb3cab3..a086ba15868b 100644
--- a/arch/arm/mach-omap2/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
@@ -28,5 +28,6 @@
 #define OMAP54XX_PRCM_MPU_BASE          0x48243000
 #define OMAP54XX_SCM_BASE               0x4a002000
 #define OMAP54XX_CTRL_BASE              0x4a002800
+#define OMAP54XX_SAR_RAM_BASE           0x4ae26000
 
 #endif /* __ASM_SOC_OMAP555554XX_H */
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index d35f98aabf7a..415c7e0c9393 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -81,13 +81,13 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
 /* Read a register in a CM/PRM instance in the PRM module */
 u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
+        return __raw_readl(prm_base + inst + reg);
 }
 
 /* Write into a register in a CM/PRM instance in the PRM module */
 void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
+        __raw_writel(val, prm_base + inst + reg);
 }
 
 /* Read-modify-write a register in a PRM module. Caller must lock */
@@ -650,7 +650,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(void)
 {
-        if (!cpu_is_omap44xx())
+        if (!cpu_is_omap44xx() && !soc_is_omap54xx())
                 return 0;
 
         return prm_register(&omap44xx_prm_ll_data);
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index c62116bbc760..18fdeeb3a44a 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -413,7 +413,9 @@ IS_OMAP_TYPE(3430, 0x3430)
 
 #define OMAP54XX_CLASS          0x54000054
 #define OMAP5430_REV_ES1_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5430_REV_ES2_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
 #define OMAP5432_REV_ES1_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES2_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
 
 void omap2xxx_check_revision(void);
 void omap3xxx_check_revision(void);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2bdd4cf17a8f..773733fccd83 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -62,6 +62,7 @@
 #define OMAP2_MPU_SOURCE        "sys_ck"
 #define OMAP3_MPU_SOURCE        OMAP2_MPU_SOURCE
 #define OMAP4_MPU_SOURCE        "sys_clkin_ck"
+#define OMAP5_MPU_SOURCE        "sys_clkin"
 #define OMAP2_32K_SOURCE        "func_32k_ck"
 #define OMAP3_32K_SOURCE        "omap_32k_fck"
 #define OMAP4_32K_SOURCE        "sys_32k_ck"
@@ -487,7 +488,7 @@ static void __init realtime_counter_init(void)
                 pr_err("%s: ioremap failed\n", __func__);
                 return;
         }
-        sys_clk = clk_get(NULL, "sys_clkin_ck");
+        sys_clk = clk_get(NULL, OMAP5_MPU_SOURCE);
         if (IS_ERR(sys_clk)) {
                 pr_err("%s: failed to get system clock handle\n", __func__);
                 iounmap(base);
@@ -616,7 +617,7 @@ void __init omap4_local_timer_init(void)
 
 #ifdef CONFIG_SOC_OMAP5
 OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
-                        2, OMAP4_MPU_SOURCE);
+                        2, OMAP5_MPU_SOURCE);
 void __init omap5_realtime_timer_init(void)
 {
         int err;