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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:13:44 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:13:44 -0400
commit55982fd184a065b1c69279d29cbc01dbf424d2f4 (patch)
tree9b309cba341736a0766249ba51972a8ca040e502 /arch
parent1ef3e36251e4edc77a48967d015a87ca3c4283ea (diff)
parenta7e30b8d91d3291de4543d97849193ebc3ec4c1c (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: [AVR32] Fix random segfault with preemption [AVR32] Don't use __builtin_xchg() [AVR32] ngw100 i2c-gpio tweaks [AVR32] Ignore a few irrelevant syscalls [AVR32] SMC configuration in clock cycles [AVR32] Drop support for redundant "keepinitrd" boot-time parm. [AVR32] Make dma_sync_*_for_cpu no-ops [AVR32] Remove unneeded 8K alignment of .text section [AVR32] Kill a few hardcoded constants in vmlinux.lds [AVR32] rename vmlinux.lds [AVR32] fix command line parsing in early_parse_fbmem [AVR32] checkstack support [AVR32] Wire up USBA device [AVR32] add multidrive support for pio driver [AVR32] /sys/kernel/debug/at32ap_clk [AVR32] Move AT32_PM_BASE definition into pm.h
Diffstat (limited to 'arch')
-rw-r--r--arch/avr32/boards/atngw100/flash.c5
-rw-r--r--arch/avr32/boards/atngw100/setup.c14
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c1
-rw-r--r--arch/avr32/boards/atstk1000/flash.c5
-rw-r--r--arch/avr32/kernel/Makefile5
-rw-r--r--arch/avr32/kernel/entry-avr32b.S26
-rw-r--r--arch/avr32/kernel/setup.c2
-rw-r--r--arch/avr32/kernel/vmlinux.lds.S (renamed from arch/avr32/kernel/vmlinux.lds.c)9
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c74
-rw-r--r--arch/avr32/mach-at32ap/clock.c116
-rw-r--r--arch/avr32/mach-at32ap/hsmc.c129
-rw-r--r--arch/avr32/mach-at32ap/pio.c4
-rw-r--r--arch/avr32/mach-at32ap/pm.h8
-rw-r--r--arch/avr32/mm/init.c12
14 files changed, 359 insertions, 51 deletions
diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
index f9b32a8eab9b..b07ae63aa548 100644
--- a/arch/avr32/boards/atngw100/flash.c
+++ b/arch/avr32/boards/atngw100/flash.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/arch/smc.h> 16#include <asm/arch/smc.h>
17 17
18static struct smc_config flash_config __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
20 .nrd_setup = 40, 20 .nrd_setup = 40,
21 .ncs_write_setup = 0, 21 .ncs_write_setup = 0,
@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
28 28
29 .read_cycle = 120, 29 .read_cycle = 120,
30 .write_cycle = 120, 30 .write_cycle = 120,
31};
31 32
33static struct smc_config flash_config __initdata = {
32 .bus_width = 2, 34 .bus_width = 2,
33 .nrd_controlled = 1, 35 .nrd_controlled = 1,
34 .nwe_controlled = 1, 36 .nwe_controlled = 1,
@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
82{ 84{
83 int ret; 85 int ret;
84 86
87 smc_set_timing(&flash_config, &flash_timing);
85 ret = smc_set_configuration(0, &flash_config); 88 ret = smc_set_configuration(0, &flash_config);
86 if (ret < 0) { 89 if (ret < 0) {
87 printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); 90 printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index ef801563bbf5..52987c81d668 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -125,8 +125,11 @@ static struct platform_device ngw_gpio_leds = {
125}; 125};
126 126
127static struct i2c_gpio_platform_data i2c_gpio_data = { 127static struct i2c_gpio_platform_data i2c_gpio_data = {
128 .sda_pin = GPIO_PIN_PA(6), 128 .sda_pin = GPIO_PIN_PA(6),
129 .scl_pin = GPIO_PIN_PA(7), 129 .scl_pin = GPIO_PIN_PA(7),
130 .sda_is_open_drain = 1,
131 .scl_is_open_drain = 1,
132 .udelay = 2, /* close to 100 kHz */
130}; 133};
131 134
132static struct platform_device i2c_gpio_device = { 135static struct platform_device i2c_gpio_device = {
@@ -154,6 +157,7 @@ static int __init atngw100_init(void)
154 set_hw_addr(at32_add_device_eth(1, &eth_data[1])); 157 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
155 158
156 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); 159 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
160 at32_add_device_usba(0, NULL);
157 161
158 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { 162 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
159 at32_select_gpio(ngw_leds[i].gpio, 163 at32_select_gpio(ngw_leds[i].gpio,
@@ -161,8 +165,10 @@ static int __init atngw100_init(void)
161 } 165 }
162 platform_device_register(&ngw_gpio_leds); 166 platform_device_register(&ngw_gpio_leds);
163 167
164 at32_select_gpio(i2c_gpio_data.sda_pin, 0); 168 at32_select_gpio(i2c_gpio_data.sda_pin,
165 at32_select_gpio(i2c_gpio_data.scl_pin, 0); 169 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
170 at32_select_gpio(i2c_gpio_data.scl_pin,
171 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
166 platform_device_register(&i2c_gpio_device); 172 platform_device_register(&i2c_gpio_device);
167 173
168 return 0; 174 return 0;
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index c9981b731efa..6b9e466104ad 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -241,6 +241,7 @@ static int __init atstk1002_init(void)
241 at32_add_device_lcdc(0, &atstk1000_lcdc_data, 241 at32_add_device_lcdc(0, &atstk1000_lcdc_data,
242 fbmem_start, fbmem_size); 242 fbmem_start, fbmem_size);
243#endif 243#endif
244 at32_add_device_usba(0, NULL);
244#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM 245#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
245 at32_add_device_ssc(0, ATMEL_SSC_TX); 246 at32_add_device_ssc(0, ATMEL_SSC_TX);
246#endif 247#endif
diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
index aac4300cca12..3d0a102ad45e 100644
--- a/arch/avr32/boards/atstk1000/flash.c
+++ b/arch/avr32/boards/atstk1000/flash.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/arch/smc.h> 16#include <asm/arch/smc.h>
17 17
18static struct smc_config flash_config __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
20 .nrd_setup = 40, 20 .nrd_setup = 40,
21 .ncs_write_setup = 0, 21 .ncs_write_setup = 0,
@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
28 28
29 .read_cycle = 120, 29 .read_cycle = 120,
30 .write_cycle = 120, 30 .write_cycle = 120,
31};
31 32
33static struct smc_config flash_config __initdata = {
32 .bus_width = 2, 34 .bus_width = 2,
33 .nrd_controlled = 1, 35 .nrd_controlled = 1,
34 .nwe_controlled = 1, 36 .nwe_controlled = 1,
@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
82{ 84{
83 int ret; 85 int ret;
84 86
87 smc_set_timing(&flash_config, &flash_timing);
85 ret = smc_set_configuration(0, &flash_config); 88 ret = smc_set_configuration(0, &flash_config);
86 if (ret < 0) { 89 if (ret < 0) {
87 printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); 90 printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
index 90e5afff54a2..989fcd1fef7e 100644
--- a/arch/avr32/kernel/Makefile
+++ b/arch/avr32/kernel/Makefile
@@ -11,8 +11,3 @@ obj-y += signal.o sys_avr32.o process.o time.o
11obj-y += init_task.o switch_to.o cpu.o 11obj-y += init_task.o switch_to.o cpu.o
12obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o 12obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
13obj-$(CONFIG_KPROBES) += kprobes.o 13obj-$(CONFIG_KPROBES) += kprobes.o
14
15USE_STANDARD_AS_RULE := true
16
17%.lds: %.lds.c FORCE
18 $(call if_changed_dep,cpp_lds_S)
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index 42657f1703b2..ccadfd9b438d 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -159,11 +159,18 @@ handle_vmalloc_miss:
159 159
160 .section .scall.text,"ax",@progbits 160 .section .scall.text,"ax",@progbits
161system_call: 161system_call:
162#ifdef CONFIG_PREEMPT
163 mask_interrupts
164#endif
162 pushm r12 /* r12_orig */ 165 pushm r12 /* r12_orig */
163 stmts --sp, r0-lr 166 stmts --sp, r0-lr
164 zero_fp 167
165 mfsr r0, SYSREG_RAR_SUP 168 mfsr r0, SYSREG_RAR_SUP
166 mfsr r1, SYSREG_RSR_SUP 169 mfsr r1, SYSREG_RSR_SUP
170#ifdef CONFIG_PREEMPT
171 unmask_interrupts
172#endif
173 zero_fp
167 stm --sp, r0-r1 174 stm --sp, r0-r1
168 175
169 /* check for syscall tracing */ 176 /* check for syscall tracing */
@@ -638,6 +645,13 @@ irq_level\level:
638 stmts --sp,r0-lr 645 stmts --sp,r0-lr
639 mfsr r8, rar_int\level 646 mfsr r8, rar_int\level
640 mfsr r9, rsr_int\level 647 mfsr r9, rsr_int\level
648
649#ifdef CONFIG_PREEMPT
650 sub r11, pc, (. - system_call)
651 cp.w r11, r8
652 breq 4f
653#endif
654
641 pushm r8-r9 655 pushm r8-r9
642 656
643 mov r11, sp 657 mov r11, sp
@@ -668,6 +682,16 @@ irq_level\level:
668 sub sp, -4 /* ignore r12_orig */ 682 sub sp, -4 /* ignore r12_orig */
669 rete 683 rete
670 684
685#ifdef CONFIG_PREEMPT
6864: mask_interrupts
687 mfsr r8, rsr_int\level
688 sbr r8, 16
689 mtsr rsr_int\level, r8
690 ldmts sp++, r0-lr
691 sub sp, -4 /* ignore r12_orig */
692 rete
693#endif
694
6712: get_thread_info r0 6952: get_thread_info r0
672 ld.w r1, r0[TI_flags] 696 ld.w r1, r0[TI_flags]
673 bld r1, TIF_CPU_GOING_TO_SLEEP 697 bld r1, TIF_CPU_GOING_TO_SLEEP
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index d08b0bc6b2bb..4b4c1884e1c5 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
248 248
249 fbmem_size = memparse(p, &p); 249 fbmem_size = memparse(p, &p);
250 if (*p == '@') { 250 if (*p == '@') {
251 fbmem_start = memparse(p, &p); 251 fbmem_start = memparse(p + 1, &p);
252 ret = add_reserved_region(fbmem_start, 252 ret = add_reserved_region(fbmem_start,
253 fbmem_start + fbmem_size - 1, 253 fbmem_start + fbmem_size - 1,
254 "Framebuffer"); 254 "Framebuffer");
diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.S
index db0438f35c00..ce9ac9659883 100644
--- a/arch/avr32/kernel/vmlinux.lds.c
+++ b/arch/avr32/kernel/vmlinux.lds.S
@@ -9,6 +9,8 @@
9 */ 9 */
10#define LOAD_OFFSET 0x00000000 10#define LOAD_OFFSET 0x00000000
11#include <asm-generic/vmlinux.lds.h> 11#include <asm-generic/vmlinux.lds.h>
12#include <asm/cache.h>
13#include <asm/thread_info.h>
12 14
13OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") 15OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
14OUTPUT_ARCH(avr32) 16OUTPUT_ARCH(avr32)
@@ -58,11 +60,10 @@ SECTIONS
58 *(.init.ramfs) 60 *(.init.ramfs)
59 __initramfs_end = .; 61 __initramfs_end = .;
60#endif 62#endif
61 . = ALIGN(4096); 63 . = ALIGN(PAGE_SIZE);
62 __init_end = .; 64 __init_end = .;
63 } 65 }
64 66
65 . = ALIGN(8192);
66 .text : AT(ADDR(.text) - LOAD_OFFSET) { 67 .text : AT(ADDR(.text) - LOAD_OFFSET) {
67 _evba = .; 68 _evba = .;
68 _text = .; 69 _text = .;
@@ -96,7 +97,7 @@ SECTIONS
96 97
97 RODATA 98 RODATA
98 99
99 . = ALIGN(8192); 100 . = ALIGN(THREAD_SIZE);
100 101
101 .data : AT(ADDR(.data) - LOAD_OFFSET) { 102 .data : AT(ADDR(.data) - LOAD_OFFSET) {
102 _data = .; 103 _data = .;
@@ -107,7 +108,7 @@ SECTIONS
107 *(.data.init_task) 108 *(.data.init_task)
108 109
109 /* Then, the cacheline aligned data */ 110 /* Then, the cacheline aligned data */
110 . = ALIGN(32); 111 . = ALIGN(L1_CACHE_BYTES);
111 *(.data.cacheline_aligned) 112 *(.data.cacheline_aligned)
112 113
113 /* And the rest... */ 114 /* And the rest... */
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 64cc5583ddfb..f6d154ca4d24 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -25,12 +25,6 @@
25#include "pio.h" 25#include "pio.h"
26#include "pm.h" 26#include "pm.h"
27 27
28/*
29 * We can reduce the code size a bit by using a constant here. Since
30 * this file is completely chip-specific, it's safe to not use
31 * ioremap. Generic drivers should of course never do this.
32 */
33#define AT32_PM_BASE 0xfff00000
34 28
35#define PBMEM(base) \ 29#define PBMEM(base) \
36 { \ 30 { \
@@ -1168,6 +1162,72 @@ at32_add_device_ssc(unsigned int id, unsigned int flags)
1168} 1162}
1169 1163
1170/* -------------------------------------------------------------------- 1164/* --------------------------------------------------------------------
1165 * USB Device Controller
1166 * -------------------------------------------------------------------- */
1167static struct resource usba0_resource[] __initdata = {
1168 {
1169 .start = 0xff300000,
1170 .end = 0xff3fffff,
1171 .flags = IORESOURCE_MEM,
1172 }, {
1173 .start = 0xfff03000,
1174 .end = 0xfff033ff,
1175 .flags = IORESOURCE_MEM,
1176 },
1177 IRQ(31),
1178};
1179static struct clk usba0_pclk = {
1180 .name = "pclk",
1181 .parent = &pbb_clk,
1182 .mode = pbb_clk_mode,
1183 .get_rate = pbb_clk_get_rate,
1184 .index = 12,
1185};
1186static struct clk usba0_hclk = {
1187 .name = "hclk",
1188 .parent = &hsb_clk,
1189 .mode = hsb_clk_mode,
1190 .get_rate = hsb_clk_get_rate,
1191 .index = 6,
1192};
1193
1194struct platform_device *__init
1195at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
1196{
1197 struct platform_device *pdev;
1198
1199 if (id != 0)
1200 return NULL;
1201
1202 pdev = platform_device_alloc("atmel_usba_udc", 0);
1203 if (!pdev)
1204 return NULL;
1205
1206 if (platform_device_add_resources(pdev, usba0_resource,
1207 ARRAY_SIZE(usba0_resource)))
1208 goto out_free_pdev;
1209
1210 if (data) {
1211 if (platform_device_add_data(pdev, data, sizeof(*data)))
1212 goto out_free_pdev;
1213
1214 if (data->vbus_pin != GPIO_PIN_NONE)
1215 at32_select_gpio(data->vbus_pin, 0);
1216 }
1217
1218 usba0_pclk.dev = &pdev->dev;
1219 usba0_hclk.dev = &pdev->dev;
1220
1221 platform_device_add(pdev);
1222
1223 return pdev;
1224
1225out_free_pdev:
1226 platform_device_put(pdev);
1227 return NULL;
1228}
1229
1230/* --------------------------------------------------------------------
1171 * GCLK 1231 * GCLK
1172 * -------------------------------------------------------------------- */ 1232 * -------------------------------------------------------------------- */
1173static struct clk gclk0 = { 1233static struct clk gclk0 = {
@@ -1252,6 +1312,8 @@ struct clk *at32_clock_list[] = {
1252 &ssc0_pclk, 1312 &ssc0_pclk,
1253 &ssc1_pclk, 1313 &ssc1_pclk,
1254 &ssc2_pclk, 1314 &ssc2_pclk,
1315 &usba0_hclk,
1316 &usba0_pclk,
1255 &gclk0, 1317 &gclk0,
1256 &gclk1, 1318 &gclk1,
1257 &gclk2, 1319 &gclk2,
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 0f8c89c9f832..4642117cc9ab 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
150 return clk->parent; 150 return clk->parent;
151} 151}
152EXPORT_SYMBOL(clk_get_parent); 152EXPORT_SYMBOL(clk_get_parent);
153
154
155
156#ifdef CONFIG_DEBUG_FS
157
158/* /sys/kernel/debug/at32ap_clk */
159
160#include <linux/io.h>
161#include <linux/debugfs.h>
162#include <linux/seq_file.h>
163#include "pm.h"
164
165
166#define NEST_DELTA 2
167#define NEST_MAX 6
168
169struct clkinf {
170 struct seq_file *s;
171 unsigned nest;
172};
173
174static void
175dump_clock(struct clk *parent, struct clkinf *r)
176{
177 unsigned nest = r->nest;
178 char buf[16 + NEST_MAX];
179 struct clk *clk;
180 unsigned i;
181
182 /* skip clocks coupled to devices that aren't registered */
183 if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
184 return;
185
186 /* <nest spaces> name <pad to end> */
187 memset(buf, ' ', sizeof(buf) - 1);
188 buf[sizeof(buf) - 1] = 0;
189 i = strlen(parent->name);
190 memcpy(buf + nest, parent->name,
191 min(i, (unsigned)(sizeof(buf) - 1 - nest)));
192
193 seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
194 buf, parent->set_parent ? '*' : ' ',
195 parent->users,
196 parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
197 clk_get_rate(parent));
198 if (parent->dev)
199 seq_printf(r->s, ", for %s", parent->dev->bus_id);
200 seq_printf(r->s, "\n");
201
202 /* cost of this scan is small, but not linear... */
203 r->nest = nest + NEST_DELTA;
204 for (i = 3; i < at32_nr_clocks; i++) {
205 clk = at32_clock_list[i];
206 if (clk->parent == parent)
207 dump_clock(clk, r);
208 }
209 r->nest = nest;
210}
211
212static int clk_show(struct seq_file *s, void *unused)
213{
214 struct clkinf r;
215 int i;
216
217 /* show all the power manager registers */
218 seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
219 seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
220 seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
221 seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
222 seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
223 seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
224 seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
225 seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
226 seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
227 for (i = 0; i < 8; i++) {
228 if (i == 5)
229 continue;
230 seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
231 }
232
233 seq_printf(s, "\n");
234
235 /* show clock tree as derived from the three oscillators
236 * we "know" are at the head of the list
237 */
238 r.s = s;
239 r.nest = 0;
240 dump_clock(at32_clock_list[0], &r);
241 dump_clock(at32_clock_list[1], &r);
242 dump_clock(at32_clock_list[2], &r);
243
244 return 0;
245}
246
247static int clk_open(struct inode *inode, struct file *file)
248{
249 return single_open(file, clk_show, NULL);
250}
251
252static const struct file_operations clk_operations = {
253 .open = clk_open,
254 .read = seq_read,
255 .llseek = seq_lseek,
256 .release = single_release,
257};
258
259static int __init clk_debugfs_init(void)
260{
261 (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
262 NULL, NULL, &clk_operations);
263
264 return 0;
265}
266postcore_initcall(clk_debugfs_init);
267
268#endif
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 5e22a750632b..704607fbcc69 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -29,16 +29,25 @@ struct hsmc {
29 29
30static struct hsmc *hsmc; 30static struct hsmc *hsmc;
31 31
32int smc_set_configuration(int cs, const struct smc_config *config) 32void smc_set_timing(struct smc_config *config,
33 const struct smc_timing *timing)
33{ 34{
35 int recover;
36 int cycle;
37
34 unsigned long mul; 38 unsigned long mul;
35 unsigned long offset;
36 u32 setup, pulse, cycle, mode;
37 39
38 if (!hsmc) 40 /* Reset all SMC timings */
39 return -ENODEV; 41 config->ncs_read_setup = 0;
40 if (cs >= NR_CHIP_SELECTS) 42 config->nrd_setup = 0;
41 return -EINVAL; 43 config->ncs_write_setup = 0;
44 config->nwe_setup = 0;
45 config->ncs_read_pulse = 0;
46 config->nrd_pulse = 0;
47 config->ncs_write_pulse = 0;
48 config->nwe_pulse = 0;
49 config->read_cycle = 0;
50 config->write_cycle = 0;
42 51
43 /* 52 /*
44 * cycles = x / T = x * f 53 * cycles = x / T = x * f
@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
50 59
51#define ns2cyc(x) ((((x) * mul) + 65535) >> 16) 60#define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
52 61
53 setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup)) 62 if (timing->ncs_read_setup > 0)
54 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup)) 63 config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
55 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup)) 64
56 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup))); 65 if (timing->nrd_setup > 0)
57 pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse)) 66 config->nrd_setup = ns2cyc(timing->nrd_setup);
58 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse)) 67
59 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse)) 68 if (timing->ncs_write_setup > 0)
60 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse))); 69 config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
61 cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle)) 70
62 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle))); 71 if (timing->nwe_setup > 0)
72 config->nwe_setup = ns2cyc(timing->nwe_setup);
73
74 if (timing->ncs_read_pulse > 0)
75 config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
76
77 if (timing->nrd_pulse > 0)
78 config->nrd_pulse = ns2cyc(timing->nrd_pulse);
79
80 if (timing->ncs_write_pulse > 0)
81 config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
82
83 if (timing->nwe_pulse > 0)
84 config->nwe_pulse = ns2cyc(timing->nwe_pulse);
85
86 if (timing->read_cycle > 0)
87 config->read_cycle = ns2cyc(timing->read_cycle);
88
89 if (timing->write_cycle > 0)
90 config->write_cycle = ns2cyc(timing->write_cycle);
91
92 /* Extend read cycle in needed */
93 if (timing->ncs_read_recover > 0)
94 recover = ns2cyc(timing->ncs_read_recover);
95 else
96 recover = 1;
97
98 cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
99
100 if (config->read_cycle < cycle)
101 config->read_cycle = cycle;
102
103 /* Extend read cycle in needed */
104 if (timing->nrd_recover > 0)
105 recover = ns2cyc(timing->nrd_recover);
106 else
107 recover = 1;
108
109 cycle = config->nrd_setup + config->nrd_pulse + recover;
110
111 if (config->read_cycle < cycle)
112 config->read_cycle = cycle;
113
114 /* Extend write cycle in needed */
115 if (timing->ncs_write_recover > 0)
116 recover = ns2cyc(timing->ncs_write_recover);
117 else
118 recover = 1;
119
120 cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
121
122 if (config->write_cycle < cycle)
123 config->write_cycle = cycle;
124
125 /* Extend write cycle in needed */
126 if (timing->nwe_recover > 0)
127 recover = ns2cyc(timing->nwe_recover);
128 else
129 recover = 1;
130
131 cycle = config->nwe_setup + config->nwe_pulse + recover;
132
133 if (config->write_cycle < cycle)
134 config->write_cycle = cycle;
135}
136EXPORT_SYMBOL(smc_set_timing);
137
138int smc_set_configuration(int cs, const struct smc_config *config)
139{
140 unsigned long offset;
141 u32 setup, pulse, cycle, mode;
142
143 if (!hsmc)
144 return -ENODEV;
145 if (cs >= NR_CHIP_SELECTS)
146 return -EINVAL;
147
148 setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
149 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
150 | HSMC_BF(NRD_SETUP, config->nrd_setup)
151 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
152 pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
153 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
154 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
155 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
156 cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
157 | HSMC_BF(NRD_CYCLE, config->read_cycle));
63 158
64 switch (config->bus_width) { 159 switch (config->bus_width) {
65 case 1: 160 case 1:
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 1eb99b814f5b..d61a02da898c 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
110 pio_writel(pio, SODR, mask); 110 pio_writel(pio, SODR, mask);
111 else 111 else
112 pio_writel(pio, CODR, mask); 112 pio_writel(pio, CODR, mask);
113 if (flags & AT32_GPIOF_MULTIDRV)
114 pio_writel(pio, MDER, mask);
115 else
116 pio_writel(pio, MDDR, mask);
113 pio_writel(pio, PUDR, mask); 117 pio_writel(pio, PUDR, mask);
114 pio_writel(pio, OER, mask); 118 pio_writel(pio, OER, mask);
115 } else { 119 } else {
diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
index a1f8aced0a8c..47efd0d1951f 100644
--- a/arch/avr32/mach-at32ap/pm.h
+++ b/arch/avr32/mach-at32ap/pm.h
@@ -4,6 +4,14 @@
4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ 4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
5#define __ARCH_AVR32_MACH_AT32AP_PM_H__ 5#define __ARCH_AVR32_MACH_AT32AP_PM_H__
6 6
7/*
8 * We can reduce the code size a bit by using a constant here. Since
9 * this file is only used on AVR32 AP CPUs with segmentation enabled,
10 * it's safe to not use ioremap. Generic drivers should of course
11 * never do this.
12 */
13#define AT32_PM_BASE 0xfff00000
14
7/* PM register offsets */ 15/* PM register offsets */
8#define PM_MCCTRL 0x0000 16#define PM_MCCTRL 0x0000
9#define PM_CKSEL 0x0004 17#define PM_CKSEL 0x0004
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
index 82cf70854b90..480760bde63f 100644
--- a/arch/avr32/mm/init.c
+++ b/arch/avr32/mm/init.c
@@ -224,19 +224,9 @@ void free_initmem(void)
224 224
225#ifdef CONFIG_BLK_DEV_INITRD 225#ifdef CONFIG_BLK_DEV_INITRD
226 226
227static int keep_initrd;
228
229void free_initrd_mem(unsigned long start, unsigned long end) 227void free_initrd_mem(unsigned long start, unsigned long end)
230{ 228{
231 if (!keep_initrd) 229 free_area(start, end, "initrd");
232 free_area(start, end, "initrd");
233}
234
235static int __init keepinitrd_setup(char *__unused)
236{
237 keep_initrd = 1;
238 return 1;
239} 230}
240 231
241__setup("keepinitrd", keepinitrd_setup);
242#endif 232#endif