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authorBen Dooks <ben-linux@fluff.org>2008-12-11 19:24:33 -0500
committerBen Dooks <ben-linux@fluff.org>2009-02-26 18:08:59 -0500
commit28fd2d397bab5c7fb0eed0c20b6766c99ae34a8f (patch)
treec43033eed4d37a6f143da5f8c38e791e3ad86e42 /arch
parent20f4d6c3a2a23c5d7d9cc7f42fbb943ca7a03d1f (diff)
[ARM] S3C64XX: Set GPIO pin when select IRQ_EINT type
Set the GPIO pin mode to external interrupt when configuring an IRQ_EINT's IRQ type. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-s3c64xx/irq-eint.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index 1f7cc0067f5c..5d62f2799ea9 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -14,12 +14,15 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/gpio.h>
17#include <linux/irq.h> 18#include <linux/irq.h>
18#include <linux/io.h> 19#include <linux/io.h>
19 20
20#include <asm/hardware/vic.h> 21#include <asm/hardware/vic.h>
21 22
22#include <plat/regs-irqtype.h> 23#include <plat/regs-irqtype.h>
24#include <plat/regs-gpio.h>
25#include <plat/gpio-cfg.h>
23 26
24#include <mach/map.h> 27#include <mach/map.h>
25#include <plat/cpu.h> 28#include <plat/cpu.h>
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
74static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) 77static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
75{ 78{
76 int offs = eint_offset(irq); 79 int offs = eint_offset(irq);
80 int pin;
77 int shift; 81 int shift;
78 u32 ctrl, mask; 82 u32 ctrl, mask;
79 u32 newvalue = 0; 83 u32 newvalue = 0;
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
125 ctrl |= newvalue << shift; 129 ctrl |= newvalue << shift;
126 __raw_writel(ctrl, reg); 130 __raw_writel(ctrl, reg);
127 131
132 /* set the GPIO pin appropriately */
133
134 if (offs < 23)
135 pin = S3C64XX_GPN(offs);
136 else
137 pin = S3C64XX_GPM(offs - 23);
138
139 s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
140
128 return 0; 141 return 0;
129} 142}
130 143